2 * arch/xtensa/kernel/head.S
4 * Xtensa Processor startup code.
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2001 - 2008 Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
13 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
14 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
18 #include <asm/processor.h>
20 #include <asm/cacheasm.h>
21 #include <asm/initialize_mmu.h>
23 #include <linux/init.h>
24 #include <linux/linkage.h>
27 * This module contains the entry code for kernel images. It performs the
28 * minimal setup needed to call the generic C routines.
32 * - The kernel image has been loaded to the actual address where it was
34 * - a2 contains either 0 or a pointer to a list of boot parameters.
35 * (see setup.c for more details)
42 * The bootloader passes a pointer to a list of boot parameters in a2.
45 /* The first bytes of the kernel image must be an instruction, so we
46 * manually allocate and define the literal constant we need for a jx
51 .begin no-absolute-literals
55 /* Preserve the pointer to the boot parameter list in EXCSAVE_1 */
67 Offset = _SetupMMU - _start
69 #ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
71 #if defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
81 .end no-absolute-literals
93 /* Disable interrupts and exceptions. */
98 /* Start with a fresh windowbase and windowstart. */
106 /* Set a0 to 0 for the remaining initialization. */
110 /* Clear debugging registers. */
113 #if XCHAL_NUM_IBREAK > 0
121 .rept XCHAL_NUM_DBREAK - 1
122 wsr a0, SREG_DBREAKC + _index
123 .set _index, _index + 1
127 /* Clear CCOUNT (not really necessary, but nice) */
129 wsr a0, ccount # not really necessary, but nice
131 /* Disable zero-loops. */
137 /* Disable all timers. */
140 .rept XCHAL_NUM_TIMERS
141 wsr a0, SREG_CCOMPARE + _index
142 .set _index, _index + 1
145 /* Interrupt initialization. */
147 movi a2, XCHAL_INTTYPE_MASK_SOFTWARE | XCHAL_INTTYPE_MASK_EXTERN_EDGE
151 /* Disable coprocessors. */
157 /* Set PS.INTLEVEL=LOCKLEVEL, PS.WOE=0, kernel stack, PS.EXCM=0
159 * Note: PS.EXCM must be cleared before using any loop
160 * instructions; otherwise, they are silently disabled, and
161 * at most one iteration of the loop is executed.
168 /* Initialize the caches.
169 * a2, a3 are just working registers (clobbered).
172 #if XCHAL_DCACHE_LINE_LOCKABLE
173 ___unlock_dcache_all a2 a3
176 #if XCHAL_ICACHE_LINE_LOCKABLE
177 ___unlock_icache_all a2 a3
180 ___invalidate_dcache_all a2 a3
181 ___invalidate_icache_all a2 a3
185 /* Unpack data sections
187 * The linker script used to build the Linux kernel image
188 * creates a table located at __boot_reloc_table_start
189 * that contans the information what data needs to be unpacked.
194 movi a2, __boot_reloc_table_start
195 movi a3, __boot_reloc_table_end
197 1: beq a2, a3, 3f # no more entries?
198 l32i a4, a2, 0 # start destination (in RAM)
199 l32i a5, a2, 4 # end desination (in RAM)
200 l32i a6, a2, 8 # start source (in ROM)
201 addi a2, a2, 12 # next entry
202 beq a4, a5, 1b # skip, empty entry
203 beq a4, a6, 1b # skip, source and dest. are the same
205 2: l32i a7, a6, 0 # load word
207 s32i a7, a4, 0 # store word
213 /* All code and initialized data segments have been copied.
214 * Now clear the BSS segment.
217 movi a2, __bss_start # start of BSS
218 movi a3, __bss_stop # end of BSS
220 __loopt a2, a3, a4, 2
224 #if XCHAL_DCACHE_IS_WRITEBACK
226 /* After unpacking, flush the writeback cache to memory so the
227 * instructions/data are available.
230 ___flush_dcache_all a2 a3
234 ___invalidate_icache_all a2 a3
237 /* Setup stack and enable window exceptions (keep irqs disabled) */
239 movi a1, init_thread_union
240 addi a1, a1, KERNEL_STACK_SIZE
242 movi a2, (1 << PS_WOE_BIT) | LOCKLEVEL
243 # WOE=1, INTLEVEL=LOCKLEVEL, UM=0
244 wsr a2, ps # (enable reg-windows; progmode stack)
247 /* Set up EXCSAVE[DEBUGLEVEL] to point to the Debug Exception Handler.*/
249 movi a2, debug_exception
250 wsr a2, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
252 /* Set up EXCSAVE[1] to point to the exc_table. */
257 /* init_arch kick-starts the linux kernel */
262 movi a4, start_kernel
266 j should_never_return
276 ENTRY(swapper_pg_dir)
277 .fill PAGE_SIZE, 1, 0
280 ENTRY(empty_zero_page)
281 .fill PAGE_SIZE, 1, 0