drivers/gpio/gpio-dln2.c

   1 /*
   2  * Driver for the Diolan DLN-2 USB-GPIO adapter
   3  *
   4  * Copyright (c) 2014 Intel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation, version 2.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/slab.h>
  14 #include <linux/types.h>
  15 #include <linux/irqdomain.h>
  16 #include <linux/irq.h>
  17 #include <linux/irqchip/chained_irq.h>
  18 #include <linux/gpio/driver.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/mfd/dln2.h>
  21
  22 #define DLN2_GPIO_ID                    0x01
  23
  24 #define DLN2_GPIO_GET_PIN_COUNT         DLN2_CMD(0x01, DLN2_GPIO_ID)
  25 #define DLN2_GPIO_SET_DEBOUNCE          DLN2_CMD(0x04, DLN2_GPIO_ID)
  26 #define DLN2_GPIO_GET_DEBOUNCE          DLN2_CMD(0x05, DLN2_GPIO_ID)
  27 #define DLN2_GPIO_PORT_GET_VAL          DLN2_CMD(0x06, DLN2_GPIO_ID)
  28 #define DLN2_GPIO_PIN_GET_VAL           DLN2_CMD(0x0B, DLN2_GPIO_ID)
  29 #define DLN2_GPIO_PIN_SET_OUT_VAL       DLN2_CMD(0x0C, DLN2_GPIO_ID)
  30 #define DLN2_GPIO_PIN_GET_OUT_VAL       DLN2_CMD(0x0D, DLN2_GPIO_ID)
  31 #define DLN2_GPIO_CONDITION_MET_EV      DLN2_CMD(0x0F, DLN2_GPIO_ID)
  32 #define DLN2_GPIO_PIN_ENABLE            DLN2_CMD(0x10, DLN2_GPIO_ID)
  33 #define DLN2_GPIO_PIN_DISABLE           DLN2_CMD(0x11, DLN2_GPIO_ID)
  34 #define DLN2_GPIO_PIN_SET_DIRECTION     DLN2_CMD(0x13, DLN2_GPIO_ID)
  35 #define DLN2_GPIO_PIN_GET_DIRECTION     DLN2_CMD(0x14, DLN2_GPIO_ID)
  36 #define DLN2_GPIO_PIN_SET_EVENT_CFG     DLN2_CMD(0x1E, DLN2_GPIO_ID)
  37 #define DLN2_GPIO_PIN_GET_EVENT_CFG     DLN2_CMD(0x1F, DLN2_GPIO_ID)
  38
  39 #define DLN2_GPIO_EVENT_NONE            0
  40 #define DLN2_GPIO_EVENT_CHANGE          1
  41 #define DLN2_GPIO_EVENT_LVL_HIGH        2
  42 #define DLN2_GPIO_EVENT_LVL_LOW         3
  43 #define DLN2_GPIO_EVENT_CHANGE_RISING   0x11
  44 #define DLN2_GPIO_EVENT_CHANGE_FALLING  0x21
  45 #define DLN2_GPIO_EVENT_MASK            0x0F
  46
  47 #define DLN2_GPIO_MAX_PINS 32
  48
  49 struct dln2_gpio {
  50         struct platform_device *pdev;
  51         struct gpio_chip gpio;
  52
  53         /*
  54          * Cache pin direction to save us one transfer, since the hardware has
  55          * separate commands to read the in and out values.
  56          */
  57         DECLARE_BITMAP(output_enabled, DLN2_GPIO_MAX_PINS);
  58
  59         /* active IRQs - not synced to hardware */
  60         DECLARE_BITMAP(unmasked_irqs, DLN2_GPIO_MAX_PINS);
  61         /* active IRQS - synced to hardware */
  62         DECLARE_BITMAP(enabled_irqs, DLN2_GPIO_MAX_PINS);
  63         int irq_type[DLN2_GPIO_MAX_PINS];
  64         struct mutex irq_lock;
  65 };
  66
  67 struct dln2_gpio_pin {
  68         __le16 pin;
  69 };
  70
  71 struct dln2_gpio_pin_val {
  72         __le16 pin __packed;
  73         u8 value;
  74 };
  75
  76 static int dln2_gpio_get_pin_count(struct platform_device *pdev)
  77 {
  78         int ret;
  79         __le16 count;
  80         int len = sizeof(count);
  81
  82         ret = dln2_transfer_rx(pdev, DLN2_GPIO_GET_PIN_COUNT, &count, &len);
  83         if (ret < 0)
  84                 return ret;
  85         if (len < sizeof(count))
  86                 return -EPROTO;
  87
  88         return le16_to_cpu(count);
  89 }
  90
  91 static int dln2_gpio_pin_cmd(struct dln2_gpio *dln2, int cmd, unsigned pin)
  92 {
  93         struct dln2_gpio_pin req = {
  94                 .pin = cpu_to_le16(pin),
  95         };
  96
  97         return dln2_transfer_tx(dln2->pdev, cmd, &req, sizeof(req));
  98 }
  99
 100 static int dln2_gpio_pin_val(struct dln2_gpio *dln2, int cmd, unsigned int pin)
 101 {
 102         int ret;
 103         struct dln2_gpio_pin req = {
 104                 .pin = cpu_to_le16(pin),
 105         };
 106         struct dln2_gpio_pin_val rsp;
 107         int len = sizeof(rsp);
 108
 109         ret = dln2_transfer(dln2->pdev, cmd, &req, sizeof(req), &rsp, &len);
 110         if (ret < 0)
 111                 return ret;
 112         if (len < sizeof(rsp) || req.pin != rsp.pin)
 113                 return -EPROTO;
 114
 115         return rsp.value;
 116 }
 117
 118 static int dln2_gpio_pin_get_in_val(struct dln2_gpio *dln2, unsigned int pin)
 119 {
 120         int ret;
 121
 122         ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_VAL, pin);
 123         if (ret < 0)
 124                 return ret;
 125         return !!ret;
 126 }
 127
 128 static int dln2_gpio_pin_get_out_val(struct dln2_gpio *dln2, unsigned int pin)
 129 {
 130         int ret;
 131
 132         ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_OUT_VAL, pin);
 133         if (ret < 0)
 134                 return ret;
 135         return !!ret;
 136 }
 137
 138 static int dln2_gpio_pin_set_out_val(struct dln2_gpio *dln2,
 139                                      unsigned int pin, int value)
 140 {
 141         struct dln2_gpio_pin_val req = {
 142                 .pin = cpu_to_le16(pin),
 143                 .value = value,
 144         };
 145
 146         return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_OUT_VAL, &req,
 147                                 sizeof(req));
 148 }
 149
 150 #define DLN2_GPIO_DIRECTION_IN          0
 151 #define DLN2_GPIO_DIRECTION_OUT         1
 152
 153 static int dln2_gpio_request(struct gpio_chip *chip, unsigned offset)
 154 {
 155         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 156         struct dln2_gpio_pin req = {
 157                 .pin = cpu_to_le16(offset),
 158         };
 159         struct dln2_gpio_pin_val rsp;
 160         int len = sizeof(rsp);
 161         int ret;
 162
 163         ret = dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_ENABLE, offset);
 164         if (ret < 0)
 165                 return ret;
 166
 167         /* cache the pin direction */
 168         ret = dln2_transfer(dln2->pdev, DLN2_GPIO_PIN_GET_DIRECTION,
 169                             &req, sizeof(req), &rsp, &len);
 170         if (ret < 0)
 171                 return ret;
 172         if (len < sizeof(rsp) || req.pin != rsp.pin) {
 173                 ret = -EPROTO;
 174                 goto out_disable;
 175         }
 176
 177         switch (rsp.value) {
 178         case DLN2_GPIO_DIRECTION_IN:
 179                 clear_bit(offset, dln2->output_enabled);
 180                 return 0;
 181         case DLN2_GPIO_DIRECTION_OUT:
 182                 set_bit(offset, dln2->output_enabled);
 183                 return 0;
 184         default:
 185                 ret = -EPROTO;
 186                 goto out_disable;
 187         }
 188
 189 out_disable:
 190         dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset);
 191         return ret;
 192 }
 193
 194 static void dln2_gpio_free(struct gpio_chip *chip, unsigned offset)
 195 {
 196         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 197
 198         dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset);
 199 }
 200
 201 static int dln2_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
 202 {
 203         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 204
 205         if (test_bit(offset, dln2->output_enabled))
 206                 return 0;
 207
 208         return 1;
 209 }
 210
 211 static int dln2_gpio_get(struct gpio_chip *chip, unsigned int offset)
 212 {
 213         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 214         int dir;
 215
 216         dir = dln2_gpio_get_direction(chip, offset);
 217         if (dir < 0)
 218                 return dir;
 219
 220         if (dir == 1)
 221                 return dln2_gpio_pin_get_in_val(dln2, offset);
 222
 223         return dln2_gpio_pin_get_out_val(dln2, offset);
 224 }
 225
 226 static void dln2_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 227 {
 228         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 229
 230         dln2_gpio_pin_set_out_val(dln2, offset, value);
 231 }
 232
 233 static int dln2_gpio_set_direction(struct gpio_chip *chip, unsigned offset,
 234                                    unsigned dir)
 235 {
 236         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 237         struct dln2_gpio_pin_val req = {
 238                 .pin = cpu_to_le16(offset),
 239                 .value = dir,
 240         };
 241         int ret;
 242
 243         ret = dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_DIRECTION,
 244                                &req, sizeof(req));
 245         if (ret < 0)
 246                 return ret;
 247
 248         if (dir == DLN2_GPIO_DIRECTION_OUT)
 249                 set_bit(offset, dln2->output_enabled);
 250         else
 251                 clear_bit(offset, dln2->output_enabled);
 252
 253         return ret;
 254 }
 255
 256 static int dln2_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 257 {
 258         return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_IN);
 259 }
 260
 261 static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
 262                                       int value)
 263 {
 264         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 265         int ret;
 266
 267         ret = dln2_gpio_pin_set_out_val(dln2, offset, value);
 268         if (ret < 0)
 269                 return ret;
 270
 271         return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_OUT);
 272 }
 273
 274 static int dln2_gpio_set_config(struct gpio_chip *chip, unsigned offset,
 275                                 unsigned long config)
 276 {
 277         struct dln2_gpio *dln2 = gpiochip_get_data(chip);
 278         __le32 duration;
 279
 280         if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
 281                 return -ENOTSUPP;
 282
 283         duration = cpu_to_le32(pinconf_to_config_argument(config));
 284         return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE,
 285                                 &duration, sizeof(duration));
 286 }
 287
 288 static int dln2_gpio_set_event_cfg(struct dln2_gpio *dln2, unsigned pin,
 289                                    unsigned type, unsigned period)
 290 {
 291         struct {
 292                 __le16 pin;
 293                 u8 type;
 294                 __le16 period;
 295         } __packed req = {
 296                 .pin = cpu_to_le16(pin),
 297                 .type = type,
 298                 .period = cpu_to_le16(period),
 299         };
 300
 301         return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_EVENT_CFG,
 302                                 &req, sizeof(req));
 303 }
 304
 305 static void dln2_irq_unmask(struct irq_data *irqd)
 306 {
 307         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
 308         struct dln2_gpio *dln2 = gpiochip_get_data(gc);
 309         int pin = irqd_to_hwirq(irqd);
 310
 311         set_bit(pin, dln2->unmasked_irqs);
 312 }
 313
 314 static void dln2_irq_mask(struct irq_data *irqd)
 315 {
 316         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
 317         struct dln2_gpio *dln2 = gpiochip_get_data(gc);
 318         int pin = irqd_to_hwirq(irqd);
 319
 320         clear_bit(pin, dln2->unmasked_irqs);
 321 }
 322
 323 static int dln2_irq_set_type(struct irq_data *irqd, unsigned type)
 324 {
 325         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
 326         struct dln2_gpio *dln2 = gpiochip_get_data(gc);
 327         int pin = irqd_to_hwirq(irqd);
 328
 329         switch (type) {
 330         case IRQ_TYPE_LEVEL_HIGH:
 331                 dln2->irq_type[pin] = DLN2_GPIO_EVENT_LVL_HIGH;
 332                 break;
 333         case IRQ_TYPE_LEVEL_LOW:
 334                 dln2->irq_type[pin] = DLN2_GPIO_EVENT_LVL_LOW;
 335                 break;
 336         case IRQ_TYPE_EDGE_BOTH:
 337                 dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE;
 338                 break;
 339         case IRQ_TYPE_EDGE_RISING:
 340                 dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE_RISING;
 341                 break;
 342         case IRQ_TYPE_EDGE_FALLING:
 343                 dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE_FALLING;
 344                 break;
 345         default:
 346                 return -EINVAL;
 347         }
 348
 349         return 0;
 350 }
 351
 352 static void dln2_irq_bus_lock(struct irq_data *irqd)
 353 {
 354         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
 355         struct dln2_gpio *dln2 = gpiochip_get_data(gc);
 356
 357         mutex_lock(&dln2->irq_lock);
 358 }
 359
 360 static void dln2_irq_bus_unlock(struct irq_data *irqd)
 361 {
 362         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
 363         struct dln2_gpio *dln2 = gpiochip_get_data(gc);
 364         int pin = irqd_to_hwirq(irqd);
 365         int enabled, unmasked;
 366         unsigned type;
 367         int ret;
 368
 369         enabled = test_bit(pin, dln2->enabled_irqs);
 370         unmasked = test_bit(pin, dln2->unmasked_irqs);
 371
 372         if (enabled != unmasked) {
 373                 if (unmasked) {
 374                         type = dln2->irq_type[pin] & DLN2_GPIO_EVENT_MASK;
 375                         set_bit(pin, dln2->enabled_irqs);
 376                 } else {
 377                         type = DLN2_GPIO_EVENT_NONE;
 378                         clear_bit(pin, dln2->enabled_irqs);
 379                 }
 380
 381                 ret = dln2_gpio_set_event_cfg(dln2, pin, type, 0);
 382                 if (ret)
 383                         dev_err(dln2->gpio.parent, "failed to set event\n");
 384         }
 385
 386         mutex_unlock(&dln2->irq_lock);
 387 }
 388
 389 static struct irq_chip dln2_gpio_irqchip = {
 390         .name = "dln2-irq",
 391         .irq_mask = dln2_irq_mask,
 392         .irq_unmask = dln2_irq_unmask,
 393         .irq_set_type = dln2_irq_set_type,
 394         .irq_bus_lock = dln2_irq_bus_lock,
 395         .irq_bus_sync_unlock = dln2_irq_bus_unlock,
 396 };
 397
 398 static void dln2_gpio_event(struct platform_device *pdev, u16 echo,
 399                             const void *data, int len)
 400 {
 401         int pin, irq;
 402
 403         const struct {
 404                 __le16 count;
 405                 __u8 type;
 406                 __le16 pin;
 407                 __u8 value;
 408         } __packed *event = data;
 409         struct dln2_gpio *dln2 = platform_get_drvdata(pdev);
 410
 411         if (len < sizeof(*event)) {
 412                 dev_err(dln2->gpio.parent, "short event message\n");
 413                 return;
 414         }
 415
 416         pin = le16_to_cpu(event->pin);
 417         if (pin >= dln2->gpio.ngpio) {
 418                 dev_err(dln2->gpio.parent, "out of bounds pin %d\n", pin);
 419                 return;
 420         }
 421
 422         irq = irq_find_mapping(dln2->gpio.irq.domain, pin);
 423         if (!irq) {
 424                 dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);
 425                 return;
 426         }
 427
 428         switch (dln2->irq_type[pin]) {
 429         case DLN2_GPIO_EVENT_CHANGE_RISING:
 430                 if (event->value)
 431                         generic_handle_irq(irq);
 432                 break;
 433         case DLN2_GPIO_EVENT_CHANGE_FALLING:
 434                 if (!event->value)
 435                         generic_handle_irq(irq);
 436                 break;
 437         default:
 438                 generic_handle_irq(irq);
 439         }
 440 }
 441
 442 static int dln2_gpio_probe(struct platform_device *pdev)
 443 {
 444         struct dln2_gpio *dln2;
 445         struct device *dev = &pdev->dev;
 446         int pins;
 447         int ret;
 448
 449         pins = dln2_gpio_get_pin_count(pdev);
 450         if (pins < 0) {
 451                 dev_err(dev, "failed to get pin count: %d\n", pins);
 452                 return pins;
 453         }
 454         if (pins > DLN2_GPIO_MAX_PINS) {
 455                 pins = DLN2_GPIO_MAX_PINS;
 456                 dev_warn(dev, "clamping pins to %d\n", DLN2_GPIO_MAX_PINS);
 457         }
 458
 459         dln2 = devm_kzalloc(&pdev->dev, sizeof(*dln2), GFP_KERNEL);
 460         if (!dln2)
 461                 return -ENOMEM;
 462
 463         mutex_init(&dln2->irq_lock);
 464
 465         dln2->pdev = pdev;
 466
 467         dln2->gpio.label = "dln2";
 468         dln2->gpio.parent = dev;
 469         dln2->gpio.owner = THIS_MODULE;
 470         dln2->gpio.base = -1;
 471         dln2->gpio.ngpio = pins;
 472         dln2->gpio.can_sleep = true;
 473         dln2->gpio.set = dln2_gpio_set;
 474         dln2->gpio.get = dln2_gpio_get;
 475         dln2->gpio.request = dln2_gpio_request;
 476         dln2->gpio.free = dln2_gpio_free;
 477         dln2->gpio.get_direction = dln2_gpio_get_direction;
 478         dln2->gpio.direction_input = dln2_gpio_direction_input;
 479         dln2->gpio.direction_output = dln2_gpio_direction_output;
 480         dln2->gpio.set_config = dln2_gpio_set_config;
 481
 482         platform_set_drvdata(pdev, dln2);
 483
 484         ret = devm_gpiochip_add_data(dev, &dln2->gpio, dln2);
 485         if (ret < 0) {
 486                 dev_err(dev, "failed to add gpio chip: %d\n", ret);
 487                 return ret;
 488         }
 489
 490         ret = gpiochip_irqchip_add(&dln2->gpio, &dln2_gpio_irqchip, 0,
 491                                    handle_simple_irq, IRQ_TYPE_NONE);
 492         if (ret < 0) {
 493                 dev_err(dev, "failed to add irq chip: %d\n", ret);
 494                 return ret;
 495         }
 496
 497         ret = dln2_register_event_cb(pdev, DLN2_GPIO_CONDITION_MET_EV,
 498                                      dln2_gpio_event);
 499         if (ret) {
 500                 dev_err(dev, "failed to register event cb: %d\n", ret);
 501                 return ret;
 502         }
 503
 504         return 0;
 505 }
 506
 507 static int dln2_gpio_remove(struct platform_device *pdev)
 508 {
 509         dln2_unregister_event_cb(pdev, DLN2_GPIO_CONDITION_MET_EV);
 510
 511         return 0;
 512 }
 513
 514 static struct platform_driver dln2_gpio_driver = {
 515         .driver.name    = "dln2-gpio",
 516         .probe          = dln2_gpio_probe,
 517         .remove         = dln2_gpio_remove,
 518 };
 519
 520 module_platform_driver(dln2_gpio_driver);
 521
 522 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com");
 523 MODULE_DESCRIPTION("Driver for the Diolan DLN2 GPIO interface");
 524 MODULE_LICENSE("GPL v2");
 525 MODULE_ALIAS("platform:dln2-gpio");