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tracing/snapshot: Resize spare buffer if size changed
[linux/fpc-iii.git] / drivers / mmc / host / rtsx_usb_sdmmc.c
blob9a3ff22dd0fe29353ffa20a94695670b15c81737
1 /* Realtek USB SD/MMC Card Interface driver
2 *
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, see <http://www.gnu.org/licenses/>.
16 *
17 * Author:
18 * Roger Tseng <rogerable@realtek.com>
19 */
20
21 #include <linux/module.h>
22 #include <linux/slab.h>
23 #include <linux/delay.h>
24 #include <linux/platform_device.h>
25 #include <linux/usb.h>
26 #include <linux/mmc/host.h>
27 #include <linux/mmc/mmc.h>
28 #include <linux/mmc/sd.h>
29 #include <linux/mmc/card.h>
30 #include <linux/scatterlist.h>
31 #include <linux/pm_runtime.h>
32
33 #include <linux/rtsx_usb.h>
34 #include <asm/unaligned.h>
35
36 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
37 defined(CONFIG_MMC_REALTEK_USB_MODULE))
38 #include <linux/leds.h>
39 #include <linux/workqueue.h>
40 #define RTSX_USB_USE_LEDS_CLASS
41 #endif
42
43 struct rtsx_usb_sdmmc {
44 struct platform_device *pdev;
45 struct rtsx_ucr *ucr;
46 struct mmc_host *mmc;
47 struct mmc_request *mrq;
48
49 struct mutex host_mutex;
50
51 u8 ssc_depth;
52 unsigned int clock;
53 bool vpclk;
54 bool double_clk;
55 bool host_removal;
56 bool card_exist;
57 bool initial_mode;
58 bool ddr_mode;
59
60 unsigned char power_mode;
61
62 #ifdef RTSX_USB_USE_LEDS_CLASS
63 struct led_classdev led;
64 char led_name[32];
65 struct work_struct led_work;
66 #endif
67 };
68
69 static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
70 {
71 return &(host->pdev->dev);
72 }
73
74 static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
75 {
76 struct rtsx_ucr *ucr = host->ucr;
77 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
78 SD_STOP | SD_CLR_ERR,
79 SD_STOP | SD_CLR_ERR);
80
81 rtsx_usb_clear_dma_err(ucr);
82 rtsx_usb_clear_fsm_err(ucr);
83 }
84
85 #ifdef DEBUG
86 static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
87 {
88 struct rtsx_ucr *ucr = host->ucr;
89 u8 val = 0;
90
91 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
92 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
93 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
94 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
95 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
96 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
97 }
98 #else
99 #define sd_print_debug_regs(host)
100 #endif /* DEBUG */
101
102 static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
103 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
104 {
105 struct rtsx_ucr *ucr = host->ucr;
106 int err;
107 u8 trans_mode;
108
109 if (!buf)
110 buf_len = 0;
111
112 rtsx_usb_init_cmd(ucr);
113 if (cmd != NULL) {
114 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
115 , cmd->opcode);
116 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
117 trans_mode = SD_TM_AUTO_TUNING;
118 else
119 trans_mode = SD_TM_NORMAL_READ;
120
121 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
122 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
123 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
124 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
126 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
127 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
128 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
130 SD_CMD4, 0xFF, (u8)cmd->arg);
131 } else {
132 trans_mode = SD_TM_AUTO_READ_3;
133 }
134
135 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
136 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
137 0xFF, (u8)(byte_cnt >> 8));
138 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
139 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
140
141 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
142 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
143 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
144 if (trans_mode != SD_TM_AUTO_TUNING)
145 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
146 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
147
148 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
149 0xFF, trans_mode | SD_TRANSFER_START);
150 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
151 SD_TRANSFER_END, SD_TRANSFER_END);
152
153 if (cmd != NULL) {
154 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
155 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
156 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
157 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
158 }
159
160 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
161 if (err) {
162 dev_dbg(sdmmc_dev(host),
163 "rtsx_usb_send_cmd failed (err = %d)\n", err);
164 return err;
165 }
166
167 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
168 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
169 sd_print_debug_regs(host);
170
171 if (!err) {
172 dev_dbg(sdmmc_dev(host),
173 "Transfer failed (SD_TRANSFER = %02x)\n",
174 ucr->rsp_buf[0]);
175 err = -EIO;
176 } else {
177 dev_dbg(sdmmc_dev(host),
178 "rtsx_usb_get_rsp failed (err = %d)\n", err);
179 }
180
181 return err;
182 }
183
184 if (cmd != NULL) {
185 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
186 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
187 cmd->resp[0]);
188 }
189
190 if (buf && buf_len) {
191 /* 2-byte aligned part */
192 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
193 if (err) {
194 dev_dbg(sdmmc_dev(host),
195 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
196 return err;
197 }
198
199 /* unaligned byte */
200 if (byte_cnt % 2)
201 return rtsx_usb_read_register(ucr,
202 PPBUF_BASE2 + byte_cnt,
203 buf + byte_cnt - 1);
204 }
205
206 return 0;
207 }
208
209 static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
210 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
211 {
212 struct rtsx_ucr *ucr = host->ucr;
213 int err;
214 u8 trans_mode;
215
216 if (!buf)
217 buf_len = 0;
218
219 if (buf && buf_len) {
220 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
221 if (err) {
222 dev_dbg(sdmmc_dev(host),
223 "rtsx_usb_write_ppbuf failed (err = %d)\n",
224 err);
225 return err;
226 }
227 }
228
229 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
230 rtsx_usb_init_cmd(ucr);
231
232 if (cmd != NULL) {
233 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
234 cmd->opcode);
235 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
236 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
237 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
238 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
239 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
240 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
241 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
242 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
243 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
244 SD_CMD4, 0xFF, (u8)cmd->arg);
245 }
246
247 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
248 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
249 0xFF, (u8)(byte_cnt >> 8));
250 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
251 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
252
253 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
254 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
255 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
256 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
257 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
258
259 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
260 trans_mode | SD_TRANSFER_START);
261 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
262 SD_TRANSFER_END, SD_TRANSFER_END);
263
264 if (cmd != NULL) {
265 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
266 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
267 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
268 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
269 }
270
271 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
272 if (err) {
273 dev_dbg(sdmmc_dev(host),
274 "rtsx_usb_send_cmd failed (err = %d)\n", err);
275 return err;
276 }
277
278 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
279 if (err) {
280 sd_print_debug_regs(host);
281 dev_dbg(sdmmc_dev(host),
282 "rtsx_usb_get_rsp failed (err = %d)\n", err);
283 return err;
284 }
285
286 if (cmd != NULL) {
287 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
288 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
289 cmd->resp[0]);
290 }
291
292 return 0;
293 }
294
295 static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
296 struct mmc_command *cmd)
297 {
298 struct rtsx_ucr *ucr = host->ucr;
299 u8 cmd_idx = (u8)cmd->opcode;
300 u32 arg = cmd->arg;
301 int err = 0;
302 int timeout = 100;
303 int i;
304 u8 *ptr;
305 int stat_idx = 0;
306 int len = 2;
307 u8 rsp_type;
308
309 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
310 __func__, cmd_idx, arg);
311
312 /* Response type:
313 * R0
314 * R1, R5, R6, R7
315 * R1b
316 * R2
317 * R3, R4
318 */
319 switch (mmc_resp_type(cmd)) {
320 case MMC_RSP_NONE:
321 rsp_type = SD_RSP_TYPE_R0;
322 break;
323 case MMC_RSP_R1:
324 rsp_type = SD_RSP_TYPE_R1;
325 break;
326 case MMC_RSP_R1_NO_CRC:
327 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
328 break;
329 case MMC_RSP_R1B:
330 rsp_type = SD_RSP_TYPE_R1b;
331 break;
332 case MMC_RSP_R2:
333 rsp_type = SD_RSP_TYPE_R2;
334 break;
335 case MMC_RSP_R3:
336 rsp_type = SD_RSP_TYPE_R3;
337 break;
338 default:
339 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
340 err = -EINVAL;
341 goto out;
342 }
343
344 if (rsp_type == SD_RSP_TYPE_R1b)
345 timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
346
347 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
348 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
349 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
350 SD_CLK_TOGGLE_EN);
351 if (err)
352 goto out;
353 }
354
355 rtsx_usb_init_cmd(ucr);
356
357 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
358 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
359 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
360 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
361 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
362
363 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
364 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
365 0x01, PINGPONG_BUFFER);
366 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
367 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
368 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
369 SD_TRANSFER_END | SD_STAT_IDLE,
370 SD_TRANSFER_END | SD_STAT_IDLE);
371
372 if (rsp_type == SD_RSP_TYPE_R2) {
373 /* Read data from ping-pong buffer */
374 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
375 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
376 stat_idx = 16;
377 } else if (rsp_type != SD_RSP_TYPE_R0) {
378 /* Read data from SD_CMDx registers */
379 for (i = SD_CMD0; i <= SD_CMD4; i++)
380 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
381 stat_idx = 5;
382 }
383 len += stat_idx;
384
385 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
386
387 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
388 if (err) {
389 dev_dbg(sdmmc_dev(host),
390 "rtsx_usb_send_cmd error (err = %d)\n", err);
391 goto out;
392 }
393
394 err = rtsx_usb_get_rsp(ucr, len, timeout);
395 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
396 sd_print_debug_regs(host);
397 sd_clear_error(host);
398
399 if (!err) {
400 dev_dbg(sdmmc_dev(host),
401 "Transfer failed (SD_TRANSFER = %02x)\n",
402 ucr->rsp_buf[0]);
403 err = -EIO;
404 } else {
405 dev_dbg(sdmmc_dev(host),
406 "rtsx_usb_get_rsp failed (err = %d)\n", err);
407 }
408
409 goto out;
410 }
411
412 if (rsp_type == SD_RSP_TYPE_R0) {
413 err = 0;
414 goto out;
415 }
416
417 /* Skip result of CHECK_REG_CMD */
418 ptr = ucr->rsp_buf + 1;
419
420 /* Check (Start,Transmission) bit of Response */
421 if ((ptr[0] & 0xC0) != 0) {
422 err = -EILSEQ;
423 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
424 goto out;
425 }
426
427 /* Check CRC7 */
428 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
429 if (ptr[stat_idx] & SD_CRC7_ERR) {
430 err = -EILSEQ;
431 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
432 goto out;
433 }
434 }
435
436 if (rsp_type == SD_RSP_TYPE_R2) {
437 /*
438 * The controller offloads the last byte {CRC-7, end bit 1'b1}
439 * of response type R2. Assign dummy CRC, 0, and end bit to the
440 * byte(ptr[16], goes into the LSB of resp[3] later).
441 */
442 ptr[16] = 1;
443
444 for (i = 0; i < 4; i++) {
445 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
446 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
447 i, cmd->resp[i]);
448 }
449 } else {
450 cmd->resp[0] = get_unaligned_be32(ptr + 1);
451 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
452 cmd->resp[0]);
453 }
454
455 out:
456 cmd->error = err;
457 }
458
459 static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
460 {
461 struct rtsx_ucr *ucr = host->ucr;
462 struct mmc_data *data = mrq->data;
463 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
464 u8 cfg2, trans_mode;
465 int err;
466 u8 flag;
467 size_t data_len = data->blksz * data->blocks;
468 unsigned int pipe;
469
470 if (read) {
471 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
472 __func__, data_len);
473 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
474 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
475 trans_mode = SD_TM_AUTO_READ_3;
476 } else {
477 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
478 __func__, data_len);
479 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
480 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
481 trans_mode = SD_TM_AUTO_WRITE_3;
482 }
483
484 rtsx_usb_init_cmd(ucr);
485
486 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
487 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
489 0xFF, (u8)data->blocks);
490 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
491 0xFF, (u8)(data->blocks >> 8));
492
493 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
494 0x01, RING_BUFFER);
495
496 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
497 0xFF, (u8)(data_len >> 24));
498 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
499 0xFF, (u8)(data_len >> 16));
500 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
501 0xFF, (u8)(data_len >> 8));
502 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
503 0xFF, (u8)data_len);
504 if (read) {
505 flag = MODE_CDIR;
506 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
507 0x03 | DMA_PACK_SIZE_MASK,
508 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
509 } else {
510 flag = MODE_CDOR;
511 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
512 0x03 | DMA_PACK_SIZE_MASK,
513 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
514 }
515
516 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
517 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
518 trans_mode | SD_TRANSFER_START);
519 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
520 SD_TRANSFER_END, SD_TRANSFER_END);
521
522 err = rtsx_usb_send_cmd(ucr, flag, 100);
523 if (err)
524 return err;
525
526 if (read)
527 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
528 else
529 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
530
531 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
532 data->sg_len, NULL, 10000);
533 if (err) {
534 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
535 , err);
536 sd_clear_error(host);
537 return err;
538 }
539
540 return rtsx_usb_get_rsp(ucr, 1, 2000);
541 }
542
543 static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
544 {
545 rtsx_usb_write_register(host->ucr, SD_CFG1,
546 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
547 }
548
549 static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
550 {
551 rtsx_usb_write_register(host->ucr, SD_CFG1,
552 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
553 }
554
555 static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
556 struct mmc_request *mrq)
557 {
558 struct mmc_command *cmd = mrq->cmd;
559 struct mmc_data *data = mrq->data;
560 u8 *buf;
561
562 buf = kzalloc(data->blksz, GFP_NOIO);
563 if (!buf) {
564 cmd->error = -ENOMEM;
565 return;
566 }
567
568 if (data->flags & MMC_DATA_READ) {
569 if (host->initial_mode)
570 sd_disable_initial_mode(host);
571
572 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
573 data->blksz, 200);
574
575 if (host->initial_mode)
576 sd_enable_initial_mode(host);
577
578 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
579 } else {
580 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
581
582 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
583 data->blksz, 200);
584 }
585
586 kfree(buf);
587 }
588
589 static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
590 {
591 struct rtsx_ucr *ucr = host->ucr;
592 int err;
593
594 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
595 __func__, tx ? "TX" : "RX", sample_point);
596
597 rtsx_usb_init_cmd(ucr);
598
599 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
600
601 if (tx)
602 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
603 0x0F, sample_point);
604 else
605 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
606 0x0F, sample_point);
607
608 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
609 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
610 PHASE_NOT_RESET, PHASE_NOT_RESET);
611 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
612 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
613
614 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
615 if (err)
616 return err;
617
618 return 0;
619 }
620
621 static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
622 {
623 idx &= MAX_PHASE;
624 return phase_map & (1 << idx);
625 }
626
627 static int get_phase_len(u32 phase_map, unsigned int idx)
628 {
629 int i;
630
631 for (i = 0; i < MAX_PHASE + 1; i++) {
632 if (get_phase_point(phase_map, idx + i) == 0)
633 return i;
634 }
635 return MAX_PHASE + 1;
636 }
637
638 static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
639 {
640 int start = 0, len = 0;
641 int start_final = 0, len_final = 0;
642 u8 final_phase = 0xFF;
643
644 if (phase_map == 0) {
645 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
646 return final_phase;
647 }
648
649 while (start < MAX_PHASE + 1) {
650 len = get_phase_len(phase_map, start);
651 if (len_final < len) {
652 start_final = start;
653 len_final = len;
654 }
655 start += len ? len : 1;
656 }
657
658 final_phase = (start_final + len_final / 2) & MAX_PHASE;
659 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
660 phase_map, len_final, final_phase);
661
662 return final_phase;
663 }
664
665 static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
666 {
667 int err, i;
668 u8 val = 0;
669
670 for (i = 0; i < 100; i++) {
671 err = rtsx_usb_ep0_read_register(host->ucr,
672 SD_DATA_STATE, &val);
673 if (val & SD_DATA_IDLE)
674 return;
675
676 usleep_range(100, 1000);
677 }
678 }
679
680 static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
681 u8 opcode, u8 sample_point)
682 {
683 int err;
684 struct mmc_command cmd = {};
685
686 err = sd_change_phase(host, sample_point, 0);
687 if (err)
688 return err;
689
690 cmd.opcode = MMC_SEND_TUNING_BLOCK;
691 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
692 if (err) {
693 /* Wait till SD DATA IDLE */
694 sd_wait_data_idle(host);
695 sd_clear_error(host);
696 return err;
697 }
698
699 return 0;
700 }
701
702 static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
703 u8 opcode, u16 *phase_map)
704 {
705 int err, i;
706 u16 raw_phase_map = 0;
707
708 for (i = MAX_PHASE; i >= 0; i--) {
709 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
710 if (!err)
711 raw_phase_map |= 1 << i;
712 }
713
714 if (phase_map)
715 *phase_map = raw_phase_map;
716 }
717
718 static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
719 {
720 int err, i;
721 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
722 u8 final_phase;
723
724 /* setting fixed default TX phase */
725 err = sd_change_phase(host, 0x01, 1);
726 if (err) {
727 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
728 return err;
729 }
730
731 /* tuning RX phase */
732 for (i = 0; i < RX_TUNING_CNT; i++) {
733 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
734
735 if (raw_phase_map[i] == 0)
736 break;
737 }
738
739 phase_map = 0xFFFF;
740 for (i = 0; i < RX_TUNING_CNT; i++) {
741 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
742 i, raw_phase_map[i]);
743 phase_map &= raw_phase_map[i];
744 }
745 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
746
747 if (phase_map) {
748 final_phase = sd_search_final_phase(host, phase_map);
749 if (final_phase == 0xFF)
750 return -EINVAL;
751
752 err = sd_change_phase(host, final_phase, 0);
753 if (err)
754 return err;
755 } else {
756 return -EINVAL;
757 }
758
759 return 0;
760 }
761
762 static int sdmmc_get_ro(struct mmc_host *mmc)
763 {
764 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
765 struct rtsx_ucr *ucr = host->ucr;
766 int err;
767 u16 val;
768
769 if (host->host_removal)
770 return -ENOMEDIUM;
771
772 mutex_lock(&ucr->dev_mutex);
773
774 /* Check SD card detect */
775 err = rtsx_usb_get_card_status(ucr, &val);
776
777 mutex_unlock(&ucr->dev_mutex);
778
779
780 /* Treat failed detection as non-ro */
781 if (err)
782 return 0;
783
784 if (val & SD_WP)
785 return 1;
786
787 return 0;
788 }
789
790 static int sdmmc_get_cd(struct mmc_host *mmc)
791 {
792 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
793 struct rtsx_ucr *ucr = host->ucr;
794 int err;
795 u16 val;
796
797 if (host->host_removal)
798 return -ENOMEDIUM;
799
800 mutex_lock(&ucr->dev_mutex);
801
802 /* Check SD card detect */
803 err = rtsx_usb_get_card_status(ucr, &val);
804
805 mutex_unlock(&ucr->dev_mutex);
806
807 /* Treat failed detection as non-exist */
808 if (err)
809 goto no_card;
810
811 if (val & SD_CD) {
812 host->card_exist = true;
813 return 1;
814 }
815
816 no_card:
817 host->card_exist = false;
818 return 0;
819 }
820
821 static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
822 {
823 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
824 struct rtsx_ucr *ucr = host->ucr;
825 struct mmc_command *cmd = mrq->cmd;
826 struct mmc_data *data = mrq->data;
827 unsigned int data_size = 0;
828
829 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
830
831 if (host->host_removal) {
832 cmd->error = -ENOMEDIUM;
833 goto finish;
834 }
835
836 if ((!host->card_exist)) {
837 cmd->error = -ENOMEDIUM;
838 goto finish_detect_card;
839 }
840
841 mutex_lock(&ucr->dev_mutex);
842
843 mutex_lock(&host->host_mutex);
844 host->mrq = mrq;
845 mutex_unlock(&host->host_mutex);
846
847 if (mrq->data)
848 data_size = data->blocks * data->blksz;
849
850 if (!data_size) {
851 sd_send_cmd_get_rsp(host, cmd);
852 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
853 mmc_op_multi(cmd->opcode)) {
854 sd_send_cmd_get_rsp(host, cmd);
855
856 if (!cmd->error) {
857 sd_rw_multi(host, mrq);
858
859 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
860 sd_send_cmd_get_rsp(host, mrq->stop);
861 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
862 FIFO_FLUSH, FIFO_FLUSH);
863 }
864 }
865 } else {
866 sd_normal_rw(host, mrq);
867 }
868
869 if (mrq->data) {
870 if (cmd->error || data->error)
871 data->bytes_xfered = 0;
872 else
873 data->bytes_xfered = data->blocks * data->blksz;
874 }
875
876 mutex_unlock(&ucr->dev_mutex);
877
878 finish_detect_card:
879 if (cmd->error) {
880 /*
881 * detect card when fail to update card existence state and
882 * speed up card removal when retry
883 */
884 sdmmc_get_cd(mmc);
885 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
886 }
887
888 finish:
889 mutex_lock(&host->host_mutex);
890 host->mrq = NULL;
891 mutex_unlock(&host->host_mutex);
892
893 mmc_request_done(mmc, mrq);
894 }
895
896 static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
897 unsigned char bus_width)
898 {
899 int err = 0;
900 static const u8 width[] = {
901 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
902 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
903 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
904 };
905
906 if (bus_width <= MMC_BUS_WIDTH_8)
907 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
908 0x03, width[bus_width]);
909
910 return err;
911 }
912
913 static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
914 {
915 rtsx_usb_init_cmd(ucr);
916
917 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
918 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
919 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
920 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
921 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
922 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
923
924 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
925 }
926
927 static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
928 {
929 rtsx_usb_init_cmd(ucr);
930
931 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
932 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
933 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
934 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
935 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
936 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
937
938 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
939 }
940
941 static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
942 {
943 rtsx_usb_init_cmd(ucr);
944
945 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
946 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
947 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
948 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
949 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
950 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
951
952 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
953 }
954
955 static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
956 {
957 rtsx_usb_init_cmd(ucr);
958
959 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
960 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
961 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
962 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
963 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
964 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
965
966 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
967 }
968
969 static int sd_power_on(struct rtsx_usb_sdmmc *host)
970 {
971 struct rtsx_ucr *ucr = host->ucr;
972 int err;
973
974 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
975 rtsx_usb_init_cmd(ucr);
976 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
977 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
978 CARD_SHARE_MASK, CARD_SHARE_SD);
979 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
980 SD_CLK_EN, SD_CLK_EN);
981 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
982 if (err)
983 return err;
984
985 if (CHECK_PKG(ucr, LQFP48))
986 err = sd_pull_ctl_enable_lqfp48(ucr);
987 else
988 err = sd_pull_ctl_enable_qfn24(ucr);
989 if (err)
990 return err;
991
992 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
993 POWER_MASK, PARTIAL_POWER_ON);
994 if (err)
995 return err;
996
997 usleep_range(800, 1000);
998
999 rtsx_usb_init_cmd(ucr);
1000 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1001 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
1002 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
1003 SD_OUTPUT_EN, SD_OUTPUT_EN);
1004
1005 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1006 }
1007
1008 static int sd_power_off(struct rtsx_usb_sdmmc *host)
1009 {
1010 struct rtsx_ucr *ucr = host->ucr;
1011 int err;
1012
1013 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1014 rtsx_usb_init_cmd(ucr);
1015
1016 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1017 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1018 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1019 POWER_MASK, POWER_OFF);
1020 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1021 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1022
1023 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1024 if (err)
1025 return err;
1026
1027 if (CHECK_PKG(ucr, LQFP48))
1028 return sd_pull_ctl_disable_lqfp48(ucr);
1029 return sd_pull_ctl_disable_qfn24(ucr);
1030 }
1031
1032 static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1033 unsigned char power_mode)
1034 {
1035 int err;
1036
1037 if (power_mode != MMC_POWER_OFF)
1038 power_mode = MMC_POWER_ON;
1039
1040 if (power_mode == host->power_mode)
1041 return 0;
1042
1043 if (power_mode == MMC_POWER_OFF) {
1044 err = sd_power_off(host);
1045 pm_runtime_put(sdmmc_dev(host));
1046 } else {
1047 pm_runtime_get_sync(sdmmc_dev(host));
1048 err = sd_power_on(host);
1049 }
1050
1051 if (!err)
1052 host->power_mode = power_mode;
1053
1054 return err;
1055 }
1056
1057 static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1058 unsigned char timing, bool *ddr_mode)
1059 {
1060 struct rtsx_ucr *ucr = host->ucr;
1061 int err;
1062
1063 *ddr_mode = false;
1064
1065 rtsx_usb_init_cmd(ucr);
1066
1067 switch (timing) {
1068 case MMC_TIMING_UHS_SDR104:
1069 case MMC_TIMING_UHS_SDR50:
1070 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1071 0x0C | SD_ASYNC_FIFO_RST,
1072 SD_30_MODE | SD_ASYNC_FIFO_RST);
1073 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1074 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1075 break;
1076
1077 case MMC_TIMING_UHS_DDR50:
1078 *ddr_mode = true;
1079
1080 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1081 0x0C | SD_ASYNC_FIFO_RST,
1082 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1083 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1084 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1085 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1086 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1087 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1088 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1089 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1090 break;
1091
1092 case MMC_TIMING_MMC_HS:
1093 case MMC_TIMING_SD_HS:
1094 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1095 0x0C, SD_20_MODE);
1096 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1097 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1098 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1099 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1100 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1101 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1102 break;
1103
1104 default:
1105 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1106 SD_CFG1, 0x0C, SD_20_MODE);
1107 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1108 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1109 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1110 SD_PUSH_POINT_CTL, 0xFF, 0);
1111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1112 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1113 break;
1114 }
1115
1116 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1117
1118 return err;
1119 }
1120
1121 static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1122 {
1123 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1124 struct rtsx_ucr *ucr = host->ucr;
1125
1126 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1127 mutex_lock(&ucr->dev_mutex);
1128
1129 sd_set_power_mode(host, ios->power_mode);
1130 sd_set_bus_width(host, ios->bus_width);
1131 sd_set_timing(host, ios->timing, &host->ddr_mode);
1132
1133 host->vpclk = false;
1134 host->double_clk = true;
1135
1136 switch (ios->timing) {
1137 case MMC_TIMING_UHS_SDR104:
1138 case MMC_TIMING_UHS_SDR50:
1139 host->ssc_depth = SSC_DEPTH_2M;
1140 host->vpclk = true;
1141 host->double_clk = false;
1142 break;
1143 case MMC_TIMING_UHS_DDR50:
1144 case MMC_TIMING_UHS_SDR25:
1145 host->ssc_depth = SSC_DEPTH_1M;
1146 break;
1147 default:
1148 host->ssc_depth = SSC_DEPTH_512K;
1149 break;
1150 }
1151
1152 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1153 host->clock = ios->clock;
1154
1155 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1156 host->initial_mode, host->double_clk, host->vpclk);
1157
1158 mutex_unlock(&ucr->dev_mutex);
1159 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1160 }
1161
1162 static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1163 {
1164 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1165 struct rtsx_ucr *ucr = host->ucr;
1166 int err = 0;
1167
1168 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1169 __func__, ios->signal_voltage);
1170
1171 if (host->host_removal)
1172 return -ENOMEDIUM;
1173
1174 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1175 return -EPERM;
1176
1177 mutex_lock(&ucr->dev_mutex);
1178
1179 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1180 if (err) {
1181 mutex_unlock(&ucr->dev_mutex);
1182 return err;
1183 }
1184
1185 /* Let mmc core do the busy checking, simply stop the forced-toggle
1186 * clock(while issuing CMD11) and switch voltage.
1187 */
1188 rtsx_usb_init_cmd(ucr);
1189
1190 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1191 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1192 SD_IO_USING_1V8, SD_IO_USING_3V3);
1193 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1194 TUNE_SD18_MASK, TUNE_SD18_3V3);
1195 } else {
1196 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1197 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1198 SD_CLK_FORCE_STOP);
1199 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1200 SD_IO_USING_1V8, SD_IO_USING_1V8);
1201 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1202 TUNE_SD18_MASK, TUNE_SD18_1V8);
1203 }
1204
1205 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1206 mutex_unlock(&ucr->dev_mutex);
1207
1208 return err;
1209 }
1210
1211 static int sdmmc_card_busy(struct mmc_host *mmc)
1212 {
1213 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1214 struct rtsx_ucr *ucr = host->ucr;
1215 int err;
1216 u8 stat;
1217 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1218 | SD_DAT0_STATUS;
1219
1220 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1221
1222 mutex_lock(&ucr->dev_mutex);
1223
1224 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1225 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1226 SD_CLK_TOGGLE_EN);
1227 if (err)
1228 goto out;
1229
1230 mdelay(1);
1231
1232 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1233 if (err)
1234 goto out;
1235
1236 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1237 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1238 out:
1239 mutex_unlock(&ucr->dev_mutex);
1240
1241 if (err)
1242 return err;
1243
1244 /* check if any pin between dat[0:3] is low */
1245 if ((stat & mask) != mask)
1246 return 1;
1247 else
1248 return 0;
1249 }
1250
1251 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1252 {
1253 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1254 struct rtsx_ucr *ucr = host->ucr;
1255 int err = 0;
1256
1257 if (host->host_removal)
1258 return -ENOMEDIUM;
1259
1260 mutex_lock(&ucr->dev_mutex);
1261
1262 if (!host->ddr_mode)
1263 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1264
1265 mutex_unlock(&ucr->dev_mutex);
1266
1267 return err;
1268 }
1269
1270 static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1271 .request = sdmmc_request,
1272 .set_ios = sdmmc_set_ios,
1273 .get_ro = sdmmc_get_ro,
1274 .get_cd = sdmmc_get_cd,
1275 .start_signal_voltage_switch = sdmmc_switch_voltage,
1276 .card_busy = sdmmc_card_busy,
1277 .execute_tuning = sdmmc_execute_tuning,
1278 };
1279
1280 #ifdef RTSX_USB_USE_LEDS_CLASS
1281 static void rtsx_usb_led_control(struct led_classdev *led,
1282 enum led_brightness brightness)
1283 {
1284 struct rtsx_usb_sdmmc *host = container_of(led,
1285 struct rtsx_usb_sdmmc, led);
1286
1287 if (host->host_removal)
1288 return;
1289
1290 host->led.brightness = brightness;
1291 schedule_work(&host->led_work);
1292 }
1293
1294 static void rtsx_usb_update_led(struct work_struct *work)
1295 {
1296 struct rtsx_usb_sdmmc *host =
1297 container_of(work, struct rtsx_usb_sdmmc, led_work);
1298 struct rtsx_ucr *ucr = host->ucr;
1299
1300 pm_runtime_get_sync(sdmmc_dev(host));
1301 mutex_lock(&ucr->dev_mutex);
1302
1303 if (host->led.brightness == LED_OFF)
1304 rtsx_usb_turn_off_led(ucr);
1305 else
1306 rtsx_usb_turn_on_led(ucr);
1307
1308 mutex_unlock(&ucr->dev_mutex);
1309 pm_runtime_put(sdmmc_dev(host));
1310 }
1311 #endif
1312
1313 static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1314 {
1315 struct mmc_host *mmc = host->mmc;
1316
1317 mmc->f_min = 250000;
1318 mmc->f_max = 208000000;
1319 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1320 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1321 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1322 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1323 MMC_CAP_NEEDS_POLL | MMC_CAP_ERASE;
1324 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
1325 MMC_CAP2_NO_SDIO;
1326
1327 mmc->max_current_330 = 400;
1328 mmc->max_current_180 = 800;
1329 mmc->ops = &rtsx_usb_sdmmc_ops;
1330 mmc->max_segs = 256;
1331 mmc->max_seg_size = 65536;
1332 mmc->max_blk_size = 512;
1333 mmc->max_blk_count = 65535;
1334 mmc->max_req_size = 524288;
1335
1336 host->power_mode = MMC_POWER_OFF;
1337 }
1338
1339 static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1340 {
1341 struct mmc_host *mmc;
1342 struct rtsx_usb_sdmmc *host;
1343 struct rtsx_ucr *ucr;
1344 #ifdef RTSX_USB_USE_LEDS_CLASS
1345 int err;
1346 #endif
1347
1348 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1349 if (!ucr)
1350 return -ENXIO;
1351
1352 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1353
1354 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1355 if (!mmc)
1356 return -ENOMEM;
1357
1358 host = mmc_priv(mmc);
1359 host->ucr = ucr;
1360 host->mmc = mmc;
1361 host->pdev = pdev;
1362 platform_set_drvdata(pdev, host);
1363
1364 mutex_init(&host->host_mutex);
1365 rtsx_usb_init_host(host);
1366 pm_runtime_use_autosuspend(&pdev->dev);
1367 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1368 pm_runtime_enable(&pdev->dev);
1369
1370 #ifdef RTSX_USB_USE_LEDS_CLASS
1371 snprintf(host->led_name, sizeof(host->led_name),
1372 "%s::", mmc_hostname(mmc));
1373 host->led.name = host->led_name;
1374 host->led.brightness = LED_OFF;
1375 host->led.default_trigger = mmc_hostname(mmc);
1376 host->led.brightness_set = rtsx_usb_led_control;
1377
1378 err = led_classdev_register(mmc_dev(mmc), &host->led);
1379 if (err)
1380 dev_err(&(pdev->dev),
1381 "Failed to register LED device: %d\n", err);
1382 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1383
1384 #endif
1385 mmc_add_host(mmc);
1386
1387 return 0;
1388 }
1389
1390 static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1391 {
1392 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1393 struct mmc_host *mmc;
1394
1395 if (!host)
1396 return 0;
1397
1398 mmc = host->mmc;
1399 host->host_removal = true;
1400
1401 mutex_lock(&host->host_mutex);
1402 if (host->mrq) {
1403 dev_dbg(&(pdev->dev),
1404 "%s: Controller removed during transfer\n",
1405 mmc_hostname(mmc));
1406 host->mrq->cmd->error = -ENOMEDIUM;
1407 if (host->mrq->stop)
1408 host->mrq->stop->error = -ENOMEDIUM;
1409 mmc_request_done(mmc, host->mrq);
1410 }
1411 mutex_unlock(&host->host_mutex);
1412
1413 mmc_remove_host(mmc);
1414
1415 #ifdef RTSX_USB_USE_LEDS_CLASS
1416 cancel_work_sync(&host->led_work);
1417 led_classdev_unregister(&host->led);
1418 #endif
1419
1420 mmc_free_host(mmc);
1421 pm_runtime_disable(&pdev->dev);
1422 pm_runtime_dont_use_autosuspend(&pdev->dev);
1423 platform_set_drvdata(pdev, NULL);
1424
1425 dev_dbg(&(pdev->dev),
1426 ": Realtek USB SD/MMC module has been removed\n");
1427
1428 return 0;
1429 }
1430
1431 static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1432 {
1433 .name = "rtsx_usb_sdmmc",
1434 }, {
1435 /* sentinel */
1436 }
1437 };
1438 MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1439
1440 static struct platform_driver rtsx_usb_sdmmc_driver = {
1441 .probe = rtsx_usb_sdmmc_drv_probe,
1442 .remove = rtsx_usb_sdmmc_drv_remove,
1443 .id_table = rtsx_usb_sdmmc_ids,
1444 .driver = {
1445 .name = "rtsx_usb_sdmmc",
1446 },
1447 };
1448 module_platform_driver(rtsx_usb_sdmmc_driver);
1449
1450 MODULE_LICENSE("GPL v2");
1451 MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1452 MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");
Linux with added FPC-III support