Linux 3.15-rc1
[linux/fpc-iii.git] / arch / mips / ath79 / mach-ap136.c
blob07eac58c3641bc9be9b8262100189c4f4b94ae50
1 /*
2 * Qualcomm Atheros AP136 reference board support
4 * Copyright (c) 2012 Qualcomm Atheros
5 * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 #include <linux/pci.h>
22 #include <linux/ath9k_platform.h>
24 #include "machtypes.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-spi.h"
28 #include "dev-usb.h"
29 #include "dev-wmac.h"
30 #include "pci.h"
32 #define AP136_GPIO_LED_STATUS_RED 14
33 #define AP136_GPIO_LED_STATUS_GREEN 19
34 #define AP136_GPIO_LED_USB 4
35 #define AP136_GPIO_LED_WLAN_2G 13
36 #define AP136_GPIO_LED_WLAN_5G 12
37 #define AP136_GPIO_LED_WPS_RED 15
38 #define AP136_GPIO_LED_WPS_GREEN 20
40 #define AP136_GPIO_BTN_WPS 16
41 #define AP136_GPIO_BTN_RFKILL 21
43 #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
44 #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
46 #define AP136_WMAC_CALDATA_OFFSET 0x1000
47 #define AP136_PCIE_CALDATA_OFFSET 0x5000
49 static struct gpio_led ap136_leds_gpio[] __initdata = {
51 .name = "qca:green:status",
52 .gpio = AP136_GPIO_LED_STATUS_GREEN,
53 .active_low = 1,
56 .name = "qca:red:status",
57 .gpio = AP136_GPIO_LED_STATUS_RED,
58 .active_low = 1,
61 .name = "qca:green:wps",
62 .gpio = AP136_GPIO_LED_WPS_GREEN,
63 .active_low = 1,
66 .name = "qca:red:wps",
67 .gpio = AP136_GPIO_LED_WPS_RED,
68 .active_low = 1,
71 .name = "qca:red:wlan-2g",
72 .gpio = AP136_GPIO_LED_WLAN_2G,
73 .active_low = 1,
76 .name = "qca:red:usb",
77 .gpio = AP136_GPIO_LED_USB,
78 .active_low = 1,
82 static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
84 .desc = "WPS button",
85 .type = EV_KEY,
86 .code = KEY_WPS_BUTTON,
87 .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
88 .gpio = AP136_GPIO_BTN_WPS,
89 .active_low = 1,
92 .desc = "RFKILL button",
93 .type = EV_KEY,
94 .code = KEY_RFKILL,
95 .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
96 .gpio = AP136_GPIO_BTN_RFKILL,
97 .active_low = 1,
101 static struct spi_board_info ap136_spi_info[] = {
103 .bus_num = 0,
104 .chip_select = 0,
105 .max_speed_hz = 25000000,
106 .modalias = "mx25l6405d",
110 static struct ath79_spi_platform_data ap136_spi_data = {
111 .bus_num = 0,
112 .num_chipselect = 1,
115 #ifdef CONFIG_PCI
116 static struct ath9k_platform_data ap136_ath9k_data;
118 static int ap136_pci_plat_dev_init(struct pci_dev *dev)
120 if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
121 dev->dev.platform_data = &ap136_ath9k_data;
123 return 0;
126 static void __init ap136_pci_init(u8 *eeprom)
128 memcpy(ap136_ath9k_data.eeprom_data, eeprom,
129 sizeof(ap136_ath9k_data.eeprom_data));
131 ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
132 ath79_register_pci();
134 #else
135 static inline void ap136_pci_init(u8 *eeprom) {}
136 #endif /* CONFIG_PCI */
138 static void __init ap136_setup(void)
140 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
142 ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
143 ap136_leds_gpio);
144 ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
145 ARRAY_SIZE(ap136_gpio_keys),
146 ap136_gpio_keys);
147 ath79_register_spi(&ap136_spi_data, ap136_spi_info,
148 ARRAY_SIZE(ap136_spi_info));
149 ath79_register_usb();
150 ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
151 ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
154 MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
155 "Atheros AP136-010 reference board",
156 ap136_setup);