2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2003, 07 Ralf Baechle
8 #ifndef __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
9 #define __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
14 * IP27 only comes with R10000 family processors all using the same config
16 #define cpu_has_watch 1
17 #define cpu_has_mips16 0
18 #define cpu_has_divec 0
20 #define cpu_has_cache_cdex_p 0
21 #define cpu_has_cache_cdex_s 0
22 #define cpu_has_prefetch 1
23 #define cpu_has_mcheck 0
24 #define cpu_has_ejtag 0
26 #define cpu_has_llsc 1
27 #define cpu_has_vtag_icache 0
28 #define cpu_has_dc_aliases 0
29 #define cpu_has_ic_fills_f_dc 0
31 #define cpu_has_dsp2 0
32 #define cpu_icache_snoops_remote_store 1
33 #define cpu_has_mipsmt 0
34 #define cpu_has_userlocal 0
36 #define cpu_has_nofpuex 0
37 #define cpu_has_64bits 1
39 #define cpu_has_4kex 1
40 #define cpu_has_3k_cache 0
41 #define cpu_has_6k_cache 0
42 #define cpu_has_4k_cache 1
43 #define cpu_has_8k_cache 0
44 #define cpu_has_tx39_cache 0
46 #define cpu_has_inclusive_pcaches 1
48 #define cpu_dcache_line_size() 32
49 #define cpu_icache_line_size() 64
50 #define cpu_scache_line_size() 128
52 #define cpu_has_mips32r1 0
53 #define cpu_has_mips32r2 0
54 #define cpu_has_mips64r1 0
55 #define cpu_has_mips64r2 0
57 #endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */