arch/mips/pci/ops-lantiq.c

   1 /*
   2  *  This program is free software; you can redistribute it and/or modify it
   3  *  under the terms of the GNU General Public License version 2 as published
   4  *  by the Free Software Foundation.
   5  *
   6  *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/mm.h>
  14 #include <asm/addrspace.h>
  15 #include <linux/vmalloc.h>
  16
  17 #include <lantiq_soc.h>
  18
  19 #include "pci-lantiq.h"
  20
  21 #define LTQ_PCI_CFG_BUSNUM_SHF 16
  22 #define LTQ_PCI_CFG_DEVNUM_SHF 11
  23 #define LTQ_PCI_CFG_FUNNUM_SHF 8
  24
  25 #define PCI_ACCESS_READ  0
  26 #define PCI_ACCESS_WRITE 1
  27
  28 static int ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus,
  29         unsigned int devfn, unsigned int where, u32 *data)
  30 {
  31         unsigned long cfg_base;
  32         unsigned long flags;
  33         u32 temp;
  34
  35         /* we support slot from 0 to 15 dev_fn & 0x68 (AD29) is the
  36            SoC itself */
  37         if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
  38                 || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
  39                 return 1;
  40
  41         spin_lock_irqsave(&ebu_lock, flags);
  42
  43         cfg_base = (unsigned long) ltq_pci_mapped_cfg;
  44         cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn <<
  45                         LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3);
  46
  47         /* Perform access */
  48         if (access_type == PCI_ACCESS_WRITE) {
  49                 ltq_w32(swab32(*data), ((u32 *)cfg_base));
  50         } else {
  51                 *data = ltq_r32(((u32 *)(cfg_base)));
  52                 *data = swab32(*data);
  53         }
  54         wmb();
  55
  56         /* clean possible Master abort */
  57         cfg_base = (unsigned long) ltq_pci_mapped_cfg;
  58         cfg_base |= (0x0 << LTQ_PCI_CFG_FUNNUM_SHF) + 4;
  59         temp = ltq_r32(((u32 *)(cfg_base)));
  60         temp = swab32(temp);
  61         cfg_base = (unsigned long) ltq_pci_mapped_cfg;
  62         cfg_base |= (0x68 << LTQ_PCI_CFG_FUNNUM_SHF) + 4;
  63         ltq_w32(temp, ((u32 *)cfg_base));
  64
  65         spin_unlock_irqrestore(&ebu_lock, flags);
  66
  67         if (((*data) == 0xffffffff) && (access_type == PCI_ACCESS_READ))
  68                 return 1;
  69
  70         return 0;
  71 }
  72
  73 int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
  74         int where, int size, u32 *val)
  75 {
  76         u32 data = 0;
  77
  78         if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
  79                 return PCIBIOS_DEVICE_NOT_FOUND;
  80
  81         if (size == 1)
  82                 *val = (data >> ((where & 3) << 3)) & 0xff;
  83         else if (size == 2)
  84                 *val = (data >> ((where & 3) << 3)) & 0xffff;
  85         else
  86                 *val = data;
  87
  88         return PCIBIOS_SUCCESSFUL;
  89 }
  90
  91 int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
  92         int where, int size, u32 val)
  93 {
  94         u32 data = 0;
  95
  96         if (size == 4) {
  97                 data = val;
  98         } else {
  99                 if (ltq_pci_config_access(PCI_ACCESS_READ, bus,
 100                                 devfn, where, &data))
 101                         return PCIBIOS_DEVICE_NOT_FOUND;
 102
 103                 if (size == 1)
 104                         data = (data & ~(0xff << ((where & 3) << 3))) |
 105                                 (val << ((where & 3) << 3));
 106                 else if (size == 2)
 107                         data = (data & ~(0xffff << ((where & 3) << 3))) |
 108                                 (val << ((where & 3) << 3));
 109         }
 110
 111         if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
 112                 return PCIBIOS_DEVICE_NOT_FOUND;
 113
 114         return PCIBIOS_SUCCESSFUL;
 115 }