virt/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <asm/processor.h>
  40 #include <asm/page.h>
  41 #include <asm/current.h>
  42 #include <trace/events/kvm.h>
  43
  44 #include "ioapic.h"
  45 #include "lapic.h"
  46 #include "irq.h"
  47
  48 #if 0
  49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  50 #else
  51 #define ioapic_debug(fmt, arg...)
  52 #endif
  53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  54                 bool line_status);
  55
  56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  57                                           unsigned long addr,
  58                                           unsigned long length)
  59 {
  60         unsigned long result = 0;
  61
  62         switch (ioapic->ioregsel) {
  63         case IOAPIC_REG_VERSION:
  64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  65                           | (IOAPIC_VERSION_ID & 0xff));
  66                 break;
  67
  68         case IOAPIC_REG_APIC_ID:
  69         case IOAPIC_REG_ARB_ID:
  70                 result = ((ioapic->id & 0xf) << 24);
  71                 break;
  72
  73         default:
  74                 {
  75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  76                         u64 redir_content;
  77
  78                         if (redir_index < IOAPIC_NUM_PINS)
  79                                 redir_content =
  80                                         ioapic->redirtbl[redir_index].bits;
  81                         else
  82                                 redir_content = ~0ULL;
  83
  84                         result = (ioapic->ioregsel & 0x1) ?
  85                             (redir_content >> 32) & 0xffffffff :
  86                             redir_content & 0xffffffff;
  87                         break;
  88                 }
  89         }
  90
  91         return result;
  92 }
  93
  94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  95 {
  96         ioapic->rtc_status.pending_eoi = 0;
  97         bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
  98 }
  99
 100 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 101 {
 102         bool new_val, old_val;
 103         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 104         union kvm_ioapic_redirect_entry *e;
 105
 106         e = &ioapic->redirtbl[RTC_GSI];
 107         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 108                                 e->fields.dest_mode))
 109                 return;
 110
 111         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 112         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 113
 114         if (new_val == old_val)
 115                 return;
 116
 117         if (new_val) {
 118                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 119                 ioapic->rtc_status.pending_eoi++;
 120         } else {
 121                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 122                 ioapic->rtc_status.pending_eoi--;
 123         }
 124
 125         WARN_ON(ioapic->rtc_status.pending_eoi < 0);
 126 }
 127
 128 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 129 {
 130         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 131
 132         spin_lock(&ioapic->lock);
 133         __rtc_irq_eoi_tracking_restore_one(vcpu);
 134         spin_unlock(&ioapic->lock);
 135 }
 136
 137 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 138 {
 139         struct kvm_vcpu *vcpu;
 140         int i;
 141
 142         if (RTC_GSI >= IOAPIC_NUM_PINS)
 143                 return;
 144
 145         rtc_irq_eoi_tracking_reset(ioapic);
 146         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 147             __rtc_irq_eoi_tracking_restore_one(vcpu);
 148 }
 149
 150 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 151 {
 152         if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map))
 153                 --ioapic->rtc_status.pending_eoi;
 154
 155         WARN_ON(ioapic->rtc_status.pending_eoi < 0);
 156 }
 157
 158 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 159 {
 160         if (ioapic->rtc_status.pending_eoi > 0)
 161                 return true; /* coalesced */
 162
 163         return false;
 164 }
 165
 166 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 167                 int irq_level, bool line_status)
 168 {
 169         union kvm_ioapic_redirect_entry entry;
 170         u32 mask = 1 << irq;
 171         u32 old_irr;
 172         int edge, ret;
 173
 174         entry = ioapic->redirtbl[irq];
 175         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 176
 177         if (!irq_level) {
 178                 ioapic->irr &= ~mask;
 179                 ret = 1;
 180                 goto out;
 181         }
 182
 183         /*
 184          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 185          * this only happens if a previous edge has not been delivered due
 186          * do masking.  For level interrupts, the remote_irr field tells
 187          * us if the interrupt is waiting for an EOI.
 188          *
 189          * RTC is special: it is edge-triggered, but userspace likes to know
 190          * if it has been already ack-ed via EOI because coalesced RTC
 191          * interrupts lead to time drift in Windows guests.  So we track
 192          * EOI manually for the RTC interrupt.
 193          */
 194         if (irq == RTC_GSI && line_status &&
 195                 rtc_irq_check_coalesced(ioapic)) {
 196                 ret = 0;
 197                 goto out;
 198         }
 199
 200         old_irr = ioapic->irr;
 201         ioapic->irr |= mask;
 202         if ((edge && old_irr == ioapic->irr) ||
 203             (!edge && entry.fields.remote_irr)) {
 204                 ret = 0;
 205                 goto out;
 206         }
 207
 208         ret = ioapic_service(ioapic, irq, line_status);
 209
 210 out:
 211         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 212         return ret;
 213 }
 214
 215 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 216 {
 217         u32 idx;
 218
 219         rtc_irq_eoi_tracking_reset(ioapic);
 220         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 221                 ioapic_set_irq(ioapic, idx, 1, true);
 222
 223         kvm_rtc_eoi_tracking_restore_all(ioapic);
 224 }
 225
 226
 227 static void update_handled_vectors(struct kvm_ioapic *ioapic)
 228 {
 229         DECLARE_BITMAP(handled_vectors, 256);
 230         int i;
 231
 232         memset(handled_vectors, 0, sizeof(handled_vectors));
 233         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
 234                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
 235         memcpy(ioapic->handled_vectors, handled_vectors,
 236                sizeof(handled_vectors));
 237         smp_wmb();
 238 }
 239
 240 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
 241                         u32 *tmr)
 242 {
 243         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 244         union kvm_ioapic_redirect_entry *e;
 245         int index;
 246
 247         spin_lock(&ioapic->lock);
 248         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 249                 e = &ioapic->redirtbl[index];
 250                 if (!e->fields.mask &&
 251                         (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 252                          kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC,
 253                                  index) || index == RTC_GSI)) {
 254                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 255                                 e->fields.dest_id, e->fields.dest_mode)) {
 256                                 __set_bit(e->fields.vector,
 257                                         (unsigned long *)eoi_exit_bitmap);
 258                                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
 259                                         __set_bit(e->fields.vector,
 260                                                 (unsigned long *)tmr);
 261                         }
 262                 }
 263         }
 264         spin_unlock(&ioapic->lock);
 265 }
 266
 267 #ifdef CONFIG_X86
 268 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
 269 {
 270         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 271
 272         if (!ioapic)
 273                 return;
 274         kvm_make_scan_ioapic_request(kvm);
 275 }
 276 #else
 277 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
 278 {
 279         return;
 280 }
 281 #endif
 282
 283 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 284 {
 285         unsigned index;
 286         bool mask_before, mask_after;
 287         union kvm_ioapic_redirect_entry *e;
 288
 289         switch (ioapic->ioregsel) {
 290         case IOAPIC_REG_VERSION:
 291                 /* Writes are ignored. */
 292                 break;
 293
 294         case IOAPIC_REG_APIC_ID:
 295                 ioapic->id = (val >> 24) & 0xf;
 296                 break;
 297
 298         case IOAPIC_REG_ARB_ID:
 299                 break;
 300
 301         default:
 302                 index = (ioapic->ioregsel - 0x10) >> 1;
 303
 304                 ioapic_debug("change redir index %x val %x\n", index, val);
 305                 if (index >= IOAPIC_NUM_PINS)
 306                         return;
 307                 e = &ioapic->redirtbl[index];
 308                 mask_before = e->fields.mask;
 309                 if (ioapic->ioregsel & 1) {
 310                         e->bits &= 0xffffffff;
 311                         e->bits |= (u64) val << 32;
 312                 } else {
 313                         e->bits &= ~0xffffffffULL;
 314                         e->bits |= (u32) val;
 315                         e->fields.remote_irr = 0;
 316                 }
 317                 update_handled_vectors(ioapic);
 318                 mask_after = e->fields.mask;
 319                 if (mask_before != mask_after)
 320                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 321                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 322                     && ioapic->irr & (1 << index))
 323                         ioapic_service(ioapic, index, false);
 324                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
 325                 break;
 326         }
 327 }
 328
 329 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 330 {
 331         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 332         struct kvm_lapic_irq irqe;
 333         int ret;
 334
 335         if (entry->fields.mask)
 336                 return -1;
 337
 338         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 339                      "vector=%x trig_mode=%x\n",
 340                      entry->fields.dest_id, entry->fields.dest_mode,
 341                      entry->fields.delivery_mode, entry->fields.vector,
 342                      entry->fields.trig_mode);
 343
 344         irqe.dest_id = entry->fields.dest_id;
 345         irqe.vector = entry->fields.vector;
 346         irqe.dest_mode = entry->fields.dest_mode;
 347         irqe.trig_mode = entry->fields.trig_mode;
 348         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 349         irqe.level = 1;
 350         irqe.shorthand = 0;
 351
 352         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 353                 ioapic->irr &= ~(1 << irq);
 354
 355         if (irq == RTC_GSI && line_status) {
 356                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 357                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 358                                 ioapic->rtc_status.dest_map);
 359                 ioapic->rtc_status.pending_eoi = ret;
 360         } else
 361                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 362
 363         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 364                 entry->fields.remote_irr = 1;
 365
 366         return ret;
 367 }
 368
 369 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 370                        int level, bool line_status)
 371 {
 372         int ret, irq_level;
 373
 374         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 375
 376         spin_lock(&ioapic->lock);
 377         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 378                                          irq_source_id, level);
 379         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 380
 381         spin_unlock(&ioapic->lock);
 382
 383         return ret;
 384 }
 385
 386 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 387 {
 388         int i;
 389
 390         spin_lock(&ioapic->lock);
 391         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 392                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 393         spin_unlock(&ioapic->lock);
 394 }
 395
 396 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 397                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 398 {
 399         int i;
 400
 401         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 402                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 403
 404                 if (ent->fields.vector != vector)
 405                         continue;
 406
 407                 if (i == RTC_GSI)
 408                         rtc_irq_eoi(ioapic, vcpu);
 409                 /*
 410                  * We are dropping lock while calling ack notifiers because ack
 411                  * notifier callbacks for assigned devices call into IOAPIC
 412                  * recursively. Since remote_irr is cleared only after call
 413                  * to notifiers if the same vector will be delivered while lock
 414                  * is dropped it will be put into irr and will be delivered
 415                  * after ack notifier returns.
 416                  */
 417                 spin_unlock(&ioapic->lock);
 418                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 419                 spin_lock(&ioapic->lock);
 420
 421                 if (trigger_mode != IOAPIC_LEVEL_TRIG)
 422                         continue;
 423
 424                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 425                 ent->fields.remote_irr = 0;
 426                 if (ioapic->irr & (1 << i))
 427                         ioapic_service(ioapic, i, false);
 428         }
 429 }
 430
 431 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
 432 {
 433         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 434         smp_rmb();
 435         return test_bit(vector, ioapic->handled_vectors);
 436 }
 437
 438 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 439 {
 440         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 441
 442         spin_lock(&ioapic->lock);
 443         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 444         spin_unlock(&ioapic->lock);
 445 }
 446
 447 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 448 {
 449         return container_of(dev, struct kvm_ioapic, dev);
 450 }
 451
 452 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 453 {
 454         return ((addr >= ioapic->base_address &&
 455                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 456 }
 457
 458 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
 459                             void *val)
 460 {
 461         struct kvm_ioapic *ioapic = to_ioapic(this);
 462         u32 result;
 463         if (!ioapic_in_range(ioapic, addr))
 464                 return -EOPNOTSUPP;
 465
 466         ioapic_debug("addr %lx\n", (unsigned long)addr);
 467         ASSERT(!(addr & 0xf));  /* check alignment */
 468
 469         addr &= 0xff;
 470         spin_lock(&ioapic->lock);
 471         switch (addr) {
 472         case IOAPIC_REG_SELECT:
 473                 result = ioapic->ioregsel;
 474                 break;
 475
 476         case IOAPIC_REG_WINDOW:
 477                 result = ioapic_read_indirect(ioapic, addr, len);
 478                 break;
 479
 480         default:
 481                 result = 0;
 482                 break;
 483         }
 484         spin_unlock(&ioapic->lock);
 485
 486         switch (len) {
 487         case 8:
 488                 *(u64 *) val = result;
 489                 break;
 490         case 1:
 491         case 2:
 492         case 4:
 493                 memcpy(val, (char *)&result, len);
 494                 break;
 495         default:
 496                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 497         }
 498         return 0;
 499 }
 500
 501 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
 502                              const void *val)
 503 {
 504         struct kvm_ioapic *ioapic = to_ioapic(this);
 505         u32 data;
 506         if (!ioapic_in_range(ioapic, addr))
 507                 return -EOPNOTSUPP;
 508
 509         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 510                      (void*)addr, len, val);
 511         ASSERT(!(addr & 0xf));  /* check alignment */
 512
 513         switch (len) {
 514         case 8:
 515         case 4:
 516                 data = *(u32 *) val;
 517                 break;
 518         case 2:
 519                 data = *(u16 *) val;
 520                 break;
 521         case 1:
 522                 data = *(u8  *) val;
 523                 break;
 524         default:
 525                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 526                 return 0;
 527         }
 528
 529         addr &= 0xff;
 530         spin_lock(&ioapic->lock);
 531         switch (addr) {
 532         case IOAPIC_REG_SELECT:
 533                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 534                 break;
 535
 536         case IOAPIC_REG_WINDOW:
 537                 ioapic_write_indirect(ioapic, data);
 538                 break;
 539 #ifdef  CONFIG_IA64
 540         case IOAPIC_REG_EOI:
 541                 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
 542                 break;
 543 #endif
 544
 545         default:
 546                 break;
 547         }
 548         spin_unlock(&ioapic->lock);
 549         return 0;
 550 }
 551
 552 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 553 {
 554         int i;
 555
 556         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 557                 ioapic->redirtbl[i].fields.mask = 1;
 558         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 559         ioapic->ioregsel = 0;
 560         ioapic->irr = 0;
 561         ioapic->id = 0;
 562         rtc_irq_eoi_tracking_reset(ioapic);
 563         update_handled_vectors(ioapic);
 564 }
 565
 566 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 567         .read     = ioapic_mmio_read,
 568         .write    = ioapic_mmio_write,
 569 };
 570
 571 int kvm_ioapic_init(struct kvm *kvm)
 572 {
 573         struct kvm_ioapic *ioapic;
 574         int ret;
 575
 576         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 577         if (!ioapic)
 578                 return -ENOMEM;
 579         spin_lock_init(&ioapic->lock);
 580         kvm->arch.vioapic = ioapic;
 581         kvm_ioapic_reset(ioapic);
 582         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 583         ioapic->kvm = kvm;
 584         mutex_lock(&kvm->slots_lock);
 585         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 586                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 587         mutex_unlock(&kvm->slots_lock);
 588         if (ret < 0) {
 589                 kvm->arch.vioapic = NULL;
 590                 kfree(ioapic);
 591         }
 592
 593         return ret;
 594 }
 595
 596 void kvm_ioapic_destroy(struct kvm *kvm)
 597 {
 598         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 599
 600         if (ioapic) {
 601                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 602                 kvm->arch.vioapic = NULL;
 603                 kfree(ioapic);
 604         }
 605 }
 606
 607 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 608 {
 609         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 610         if (!ioapic)
 611                 return -EINVAL;
 612
 613         spin_lock(&ioapic->lock);
 614         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 615         spin_unlock(&ioapic->lock);
 616         return 0;
 617 }
 618
 619 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 620 {
 621         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 622         if (!ioapic)
 623                 return -EINVAL;
 624
 625         spin_lock(&ioapic->lock);
 626         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 627         ioapic->irr = 0;
 628         update_handled_vectors(ioapic);
 629         kvm_vcpu_request_scan_ioapic(kvm);
 630         kvm_ioapic_inject_all(ioapic, state->irr);
 631         spin_unlock(&ioapic->lock);
 632         return 0;
 633 }