2 * linux/arch/arm/mach-realview/core.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/device.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
29 #include <linux/smsc911x.h>
30 #include <linux/ata_platform.h>
31 #include <linux/amba/mmci.h>
32 #include <linux/gfp.h>
33 #include <linux/mtd/physmap.h>
35 #include <mach/hardware.h>
37 #include <asm/mach-types.h>
38 #include <asm/hardware/arm_timer.h>
39 #include <asm/hardware/icst.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/irq.h>
43 #include <asm/mach/map.h>
46 #include <mach/platform.h>
47 #include <mach/irqs.h>
48 #include <asm/hardware/timer-sp.h>
50 #include <plat/clcd.h>
51 #include <plat/sched_clock.h>
55 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
57 static void realview_flash_set_vpp(struct platform_device
*pdev
, int on
)
61 val
= __raw_readl(REALVIEW_FLASHCTRL
);
63 val
|= REALVIEW_FLASHPROG_FLVPPEN
;
65 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
66 __raw_writel(val
, REALVIEW_FLASHCTRL
);
69 static struct physmap_flash_data realview_flash_data
= {
71 .set_vpp
= realview_flash_set_vpp
,
74 struct platform_device realview_flash_device
= {
75 .name
= "physmap-flash",
78 .platform_data
= &realview_flash_data
,
82 int realview_flash_register(struct resource
*res
, u32 num
)
84 realview_flash_device
.resource
= res
;
85 realview_flash_device
.num_resources
= num
;
86 return platform_device_register(&realview_flash_device
);
89 static struct smsc911x_platform_config smsc911x_config
= {
90 .flags
= SMSC911X_USE_32BIT
,
91 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
,
92 .irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
,
93 .phy_interface
= PHY_INTERFACE_MODE_MII
,
96 static struct platform_device realview_eth_device
= {
102 int realview_eth_register(const char *name
, struct resource
*res
)
105 realview_eth_device
.name
= name
;
106 realview_eth_device
.resource
= res
;
107 if (strcmp(realview_eth_device
.name
, "smsc911x") == 0)
108 realview_eth_device
.dev
.platform_data
= &smsc911x_config
;
110 return platform_device_register(&realview_eth_device
);
113 struct platform_device realview_usb_device
= {
118 int realview_usb_register(struct resource
*res
)
120 realview_usb_device
.resource
= res
;
121 return platform_device_register(&realview_usb_device
);
124 static struct pata_platform_info pata_platform_data
= {
128 static struct resource pata_resources
[] = {
130 .start
= REALVIEW_CF_BASE
,
131 .end
= REALVIEW_CF_BASE
+ 0xff,
132 .flags
= IORESOURCE_MEM
,
135 .start
= REALVIEW_CF_BASE
+ 0x100,
136 .end
= REALVIEW_CF_BASE
+ SZ_4K
- 1,
137 .flags
= IORESOURCE_MEM
,
141 struct platform_device realview_cf_device
= {
142 .name
= "pata_platform",
144 .num_resources
= ARRAY_SIZE(pata_resources
),
145 .resource
= pata_resources
,
147 .platform_data
= &pata_platform_data
,
151 static struct resource realview_i2c_resource
= {
152 .start
= REALVIEW_I2C_BASE
,
153 .end
= REALVIEW_I2C_BASE
+ SZ_4K
- 1,
154 .flags
= IORESOURCE_MEM
,
157 struct platform_device realview_i2c_device
= {
158 .name
= "versatile-i2c",
161 .resource
= &realview_i2c_resource
,
164 static struct i2c_board_info realview_i2c_board_info
[] = {
166 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
170 static int __init
realview_i2c_init(void)
172 return i2c_register_board_info(0, realview_i2c_board_info
,
173 ARRAY_SIZE(realview_i2c_board_info
));
175 arch_initcall(realview_i2c_init
);
177 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
180 * This is only used if GPIOLIB support is disabled
182 static unsigned int realview_mmc_status(struct device
*dev
)
184 struct amba_device
*adev
= container_of(dev
, struct amba_device
, dev
);
187 if (machine_is_realview_pb1176()) {
188 static bool inserted
= false;
191 * The PB1176 does not have the status register,
192 * assume it is inserted at startup, then invert
193 * for each call so card insertion/removal will
194 * be detected anyway. This will not be called if
195 * GPIO on PL061 is active, which is the proper
196 * way to do this on the PB1176.
198 inserted
= !inserted
;
199 return inserted
? 0 : 1;
202 if (adev
->res
.start
== REALVIEW_MMCI0_BASE
)
207 return readl(REALVIEW_SYSMCI
) & mask
;
210 struct mmci_platform_data realview_mmc0_plat_data
= {
211 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
212 .status
= realview_mmc_status
,
218 struct mmci_platform_data realview_mmc1_plat_data
= {
219 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
220 .status
= realview_mmc_status
,
226 void __init
realview_init_early(void)
228 void __iomem
*sys
= __io_address(REALVIEW_SYS_BASE
);
230 versatile_sched_clock_init(sys
+ REALVIEW_SYS_24MHz_OFFSET
, 24000000);
236 #define SYS_CLCD_NLCDIOON (1 << 2)
237 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
238 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
239 #define SYS_CLCD_ID_MASK (0x1f << 8)
240 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
241 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
242 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
243 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
244 #define SYS_CLCD_ID_VGA (0x1f << 8)
247 * Disable all display connectors on the interface module.
249 static void realview_clcd_disable(struct clcd_fb
*fb
)
251 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
254 val
= readl(sys_clcd
);
255 val
&= ~SYS_CLCD_NLCDIOON
| SYS_CLCD_PWR3V5SWITCH
;
256 writel(val
, sys_clcd
);
260 * Enable the relevant connector on the interface module.
262 static void realview_clcd_enable(struct clcd_fb
*fb
)
264 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
270 val
= readl(sys_clcd
);
271 val
|= SYS_CLCD_NLCDIOON
| SYS_CLCD_PWR3V5SWITCH
;
272 writel(val
, sys_clcd
);
276 * Detect which LCD panel is connected, and return the appropriate
277 * clcd_panel structure. Note: we do not have any information on
278 * the required timings for the 8.4in panel, so we presently assume
281 static int realview_clcd_setup(struct clcd_fb
*fb
)
283 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
284 const char *panel_name
, *vga_panel_name
;
285 unsigned long framesize
;
288 if (machine_is_realview_eb()) {
290 framesize
= 640 * 480 * 2;
291 vga_panel_name
= "VGA";
294 framesize
= 1024 * 768 * 2;
295 vga_panel_name
= "XVGA";
298 val
= readl(sys_clcd
) & SYS_CLCD_ID_MASK
;
299 if (val
== SYS_CLCD_ID_SANYO_3_8
)
300 panel_name
= "Sanyo TM38QV67A02A";
301 else if (val
== SYS_CLCD_ID_SANYO_2_5
)
302 panel_name
= "Sanyo QVGA Portrait";
303 else if (val
== SYS_CLCD_ID_EPSON_2_2
)
304 panel_name
= "Epson L2F50113T00";
305 else if (val
== SYS_CLCD_ID_VGA
)
306 panel_name
= vga_panel_name
;
308 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val
);
309 panel_name
= vga_panel_name
;
312 fb
->panel
= versatile_clcd_get_panel(panel_name
);
316 return versatile_clcd_setup_dma(fb
, framesize
);
319 struct clcd_board clcd_plat_data
= {
321 .caps
= CLCD_CAP_ALL
,
322 .check
= clcdfb_check
,
323 .decode
= clcdfb_decode
,
324 .disable
= realview_clcd_disable
,
325 .enable
= realview_clcd_enable
,
326 .setup
= realview_clcd_setup
,
327 .mmap
= versatile_clcd_mmap_dma
,
328 .remove
= versatile_clcd_remove_dma
,
332 * Where is the timer (VA)?
334 void __iomem
*timer0_va_base
;
335 void __iomem
*timer1_va_base
;
336 void __iomem
*timer2_va_base
;
337 void __iomem
*timer3_va_base
;
340 * Set up the clock source and clock events devices
342 void __init
realview_timer_init(unsigned int timer_irq
)
347 * set clock frequency:
348 * REALVIEW_REFCLK is 32KHz
349 * REALVIEW_TIMCLK is 1MHz
351 val
= readl(__io_address(REALVIEW_SCTL_BASE
));
352 writel((REALVIEW_TIMCLK
<< REALVIEW_TIMER1_EnSel
) |
353 (REALVIEW_TIMCLK
<< REALVIEW_TIMER2_EnSel
) |
354 (REALVIEW_TIMCLK
<< REALVIEW_TIMER3_EnSel
) |
355 (REALVIEW_TIMCLK
<< REALVIEW_TIMER4_EnSel
) | val
,
356 __io_address(REALVIEW_SCTL_BASE
));
359 * Initialise to a known state (all timers off)
361 writel(0, timer0_va_base
+ TIMER_CTRL
);
362 writel(0, timer1_va_base
+ TIMER_CTRL
);
363 writel(0, timer2_va_base
+ TIMER_CTRL
);
364 writel(0, timer3_va_base
+ TIMER_CTRL
);
366 sp804_clocksource_init(timer3_va_base
, "timer3");
367 sp804_clockevents_init(timer0_va_base
, timer_irq
, "timer0");
371 * Setup the memory banks.
373 void realview_fixup(struct tag
*tags
, char **from
, struct meminfo
*meminfo
)
376 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
377 * Half of this is mirrored at 0.
379 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
380 meminfo
->bank
[0].start
= 0x70000000;
381 meminfo
->bank
[0].size
= SZ_512M
;
382 meminfo
->nr_banks
= 1;
384 meminfo
->bank
[0].start
= 0;
385 meminfo
->bank
[0].size
= SZ_256M
;
386 meminfo
->nr_banks
= 1;