arch/arm/mach-ux500/cpu.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   5  * Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson
   6  * License terms: GNU General Public License (GPL) version 2
   7  */
   8
   9 #include <linux/platform_device.h>
  10 #include <linux/io.h>
  11 #include <linux/mfd/dbx500-prcmu.h>
  12 #include <linux/clksrc-dbx500-prcmu.h>
  13 #include <linux/sys_soc.h>
  14 #include <linux/err.h>
  15 #include <linux/slab.h>
  16 #include <linux/stat.h>
  17 #include <linux/of.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/irq.h>
  20 #include <linux/irqchip.h>
  21 #include <linux/irqchip/arm-gic.h>
  22 #include <linux/platform_data/clk-ux500.h>
  23 #include <linux/platform_data/arm-ux500-pm.h>
  24
  25 #include <asm/mach/map.h>
  26
  27 #include "setup.h"
  28
  29 #include "board-mop500.h"
  30 #include "db8500-regs.h"
  31 #include "id.h"
  32
  33 void ux500_restart(enum reboot_mode mode, const char *cmd)
  34 {
  35         local_irq_disable();
  36         local_fiq_disable();
  37
  38         prcmu_system_reset(0);
  39 }
  40
  41 /*
  42  * FIXME: Should we set up the GPIO domain here?
  43  *
  44  * The problem is that we cannot put the interrupt resources into the platform
  45  * device until the irqdomain has been added. Right now, we set the GIC interrupt
  46  * domain from init_irq(), then load the gpio driver from
  47  * core_initcall(nmk_gpio_init) and add the platform devices from
  48  * arch_initcall(customize_machine).
  49  *
  50  * This feels fragile because it depends on the gpio device getting probed
  51  * _before_ any device uses the gpio interrupts.
  52 */
  53 void __init ux500_init_irq(void)
  54 {
  55         void __iomem *dist_base;
  56         void __iomem *cpu_base;
  57
  58         gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
  59
  60         if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
  61                 dist_base = __io_address(U8500_GIC_DIST_BASE);
  62                 cpu_base = __io_address(U8500_GIC_CPU_BASE);
  63         } else
  64                 ux500_unknown_soc();
  65
  66         irqchip_init();
  67
  68         /*
  69          * Init clocks here so that they are available for system timer
  70          * initialization.
  71          */
  72         if (cpu_is_u8500_family()) {
  73                 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
  74                 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
  75
  76                 u8500_of_clk_init(U8500_CLKRST1_BASE,
  77                                   U8500_CLKRST2_BASE,
  78                                   U8500_CLKRST3_BASE,
  79                                   U8500_CLKRST5_BASE,
  80                                   U8500_CLKRST6_BASE);
  81         } else if (cpu_is_u9540()) {
  82                 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
  83                 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
  84                 u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
  85                                U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
  86                                U8500_CLKRST6_BASE);
  87         } else if (cpu_is_u8540()) {
  88                 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
  89                 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
  90                 u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
  91                                U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
  92                                U8500_CLKRST6_BASE);
  93         }
  94 }
  95
  96 static const char * __init ux500_get_machine(void)
  97 {
  98         return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
  99 }
 100
 101 static const char * __init ux500_get_family(void)
 102 {
 103         return kasprintf(GFP_KERNEL, "ux500");
 104 }
 105
 106 static const char * __init ux500_get_revision(void)
 107 {
 108         unsigned int rev = dbx500_revision();
 109
 110         if (rev == 0x01)
 111                 return kasprintf(GFP_KERNEL, "%s", "ED");
 112         else if (rev >= 0xA0)
 113                 return kasprintf(GFP_KERNEL, "%d.%d",
 114                                  (rev >> 4) - 0xA + 1, rev & 0xf);
 115
 116         return kasprintf(GFP_KERNEL, "%s", "Unknown");
 117 }
 118
 119 static ssize_t ux500_get_process(struct device *dev,
 120                                         struct device_attribute *attr,
 121                                         char *buf)
 122 {
 123         if (dbx500_id.process == 0x00)
 124                 return sprintf(buf, "Standard\n");
 125
 126         return sprintf(buf, "%02xnm\n", dbx500_id.process);
 127 }
 128
 129 static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr,
 130                                      const char *soc_id)
 131 {
 132         soc_dev_attr->soc_id   = soc_id;
 133         soc_dev_attr->machine  = ux500_get_machine();
 134         soc_dev_attr->family   = ux500_get_family();
 135         soc_dev_attr->revision = ux500_get_revision();
 136 }
 137
 138 struct device_attribute ux500_soc_attr =
 139         __ATTR(process,  S_IRUGO, ux500_get_process,  NULL);
 140
 141 struct device * __init ux500_soc_device_init(const char *soc_id)
 142 {
 143         struct device *parent;
 144         struct soc_device *soc_dev;
 145         struct soc_device_attribute *soc_dev_attr;
 146
 147         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 148         if (!soc_dev_attr)
 149                 return ERR_PTR(-ENOMEM);
 150
 151         soc_info_populate(soc_dev_attr, soc_id);
 152
 153         soc_dev = soc_device_register(soc_dev_attr);
 154         if (IS_ERR(soc_dev)) {
 155                 kfree(soc_dev_attr);
 156                 return NULL;
 157         }
 158
 159         parent = soc_device_to_device(soc_dev);
 160         device_create_file(parent, &ux500_soc_attr);
 161
 162         return parent;
 163 }