drivers/ata/ata_generic.c

   1 /*
   2  *  ata_generic.c - Generic PATA/SATA controller driver.
   3  *  Copyright 2005 Red Hat Inc, all rights reserved.
   4  *
   5  *  Elements from ide/pci/generic.c
   6  *          Copyright (C) 2001-2002     Andre Hedrick <andre@linux-ide.org>
   7  *          Portions (C) Copyright 2002  Red Hat Inc <alan@redhat.com>
   8  *
   9  *  May be copied or modified under the terms of the GNU General Public License
  10  *
  11  *  Driver for PCI IDE interfaces implementing the standard bus mastering
  12  *  interface functionality. This assumes the BIOS did the drive set up and
  13  *  tuning for us. By default we do not grab all IDE class devices as they
  14  *  may have other drivers or need fixups to avoid problems. Instead we keep
  15  *  a default list of stuff without documentation/driver that appears to
  16  *  work.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/pci.h>
  22 #include <linux/init.h>
  23 #include <linux/blkdev.h>
  24 #include <linux/delay.h>
  25 #include <scsi/scsi_host.h>
  26 #include <linux/libata.h>
  27
  28 #define DRV_NAME "ata_generic"
  29 #define DRV_VERSION "0.2.15"
  30
  31 /*
  32  *      A generic parallel ATA driver using libata
  33  */
  34
  35 enum {
  36         ATA_GEN_CLASS_MATCH             = (1 << 0),
  37         ATA_GEN_FORCE_DMA               = (1 << 1),
  38         ATA_GEN_INTEL_IDER              = (1 << 2),
  39 };
  40
  41 /**
  42  *      generic_set_mode        -       mode setting
  43  *      @link: link to set up
  44  *      @unused: returned device on error
  45  *
  46  *      Use a non standard set_mode function. We don't want to be tuned.
  47  *      The BIOS configured everything. Our job is not to fiddle. We
  48  *      read the dma enabled bits from the PCI configuration of the device
  49  *      and respect them.
  50  */
  51
  52 static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
  53 {
  54         struct ata_port *ap = link->ap;
  55         const struct pci_device_id *id = ap->host->private_data;
  56         int dma_enabled = 0;
  57         struct ata_device *dev;
  58
  59         if (id->driver_data & ATA_GEN_FORCE_DMA) {
  60                 dma_enabled = 0xff;
  61         } else if (ap->ioaddr.bmdma_addr) {
  62                 /* Bits 5 and 6 indicate if DMA is active on master/slave */
  63                 dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
  64         }
  65
  66         ata_for_each_dev(dev, link, ENABLED) {
  67                 /* We don't really care */
  68                 dev->pio_mode = XFER_PIO_0;
  69                 dev->dma_mode = XFER_MW_DMA_0;
  70                 /* We do need the right mode information for DMA or PIO
  71                    and this comes from the current configuration flags */
  72                 if (dma_enabled & (1 << (5 + dev->devno))) {
  73                         unsigned int xfer_mask = ata_id_xfermask(dev->id);
  74                         const char *name;
  75
  76                         if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
  77                                 name = ata_mode_string(xfer_mask);
  78                         else {
  79                                 /* SWDMA perhaps? */
  80                                 name = "DMA";
  81                                 xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
  82                         }
  83
  84                         ata_dev_info(dev, "configured for %s\n", name);
  85
  86                         dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
  87                         dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
  88                         dev->flags &= ~ATA_DFLAG_PIO;
  89                 } else {
  90                         ata_dev_info(dev, "configured for PIO\n");
  91                         dev->xfer_mode = XFER_PIO_0;
  92                         dev->xfer_shift = ATA_SHIFT_PIO;
  93                         dev->flags |= ATA_DFLAG_PIO;
  94                 }
  95         }
  96         return 0;
  97 }
  98
  99 static struct scsi_host_template generic_sht = {
 100         ATA_BMDMA_SHT(DRV_NAME),
 101 };
 102
 103 static struct ata_port_operations generic_port_ops = {
 104         .inherits       = &ata_bmdma_port_ops,
 105         .cable_detect   = ata_cable_unknown,
 106         .set_mode       = generic_set_mode,
 107 };
 108
 109 static int all_generic_ide;             /* Set to claim all devices */
 110
 111 /**
 112  *      is_intel_ider           -       identify intel IDE-R devices
 113  *      @dev: PCI device
 114  *
 115  *      Distinguish Intel IDE-R controller devices from other Intel IDE
 116  *      devices. IDE-R devices have no timing registers and are in
 117  *      most respects virtual. They should be driven by the ata_generic
 118  *      driver.
 119  *
 120  *      IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
 121  *      it non zero. All Intel ATA has 0x40 writable (timing), but it is
 122  *      not writable on IDE-R devices (this is guaranteed).
 123  */
 124
 125 static int is_intel_ider(struct pci_dev *dev)
 126 {
 127         /* For Intel IDE the value at 0xF8 is only zero on IDE-R
 128            interfaces */
 129         u32 r;
 130         u16 t;
 131
 132         /* Check the manufacturing ID, it will be zero for IDE-R */
 133         pci_read_config_dword(dev, 0xF8, &r);
 134         /* Not IDE-R: punt so that ata_(old)piix gets it */
 135         if (r != 0)
 136                 return 0;
 137         /* 0xF8 will also be zero on some early Intel IDE devices
 138            but they will have a sane timing register */
 139         pci_read_config_word(dev, 0x40, &t);
 140         if (t != 0)
 141                 return 0;
 142         /* Finally check if the timing register is writable so that
 143            we eliminate any early devices hot-docked in a docking
 144            station */
 145         pci_write_config_word(dev, 0x40, 1);
 146         pci_read_config_word(dev, 0x40, &t);
 147         if (t) {
 148                 pci_write_config_word(dev, 0x40, 0);
 149                 return 0;
 150         }
 151         return 1;
 152 }
 153
 154 /**
 155  *      ata_generic_init                -       attach generic IDE
 156  *      @dev: PCI device found
 157  *      @id: match entry
 158  *
 159  *      Called each time a matching IDE interface is found. We check if the
 160  *      interface is one we wish to claim and if so we perform any chip
 161  *      specific hacks then let the ATA layer do the heavy lifting.
 162  */
 163
 164 static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 165 {
 166         u16 command;
 167         static const struct ata_port_info info = {
 168                 .flags = ATA_FLAG_SLAVE_POSS,
 169                 .pio_mask = ATA_PIO4,
 170                 .mwdma_mask = ATA_MWDMA2,
 171                 .udma_mask = ATA_UDMA5,
 172                 .port_ops = &generic_port_ops
 173         };
 174         const struct ata_port_info *ppi[] = { &info, NULL };
 175
 176         /* Don't use the generic entry unless instructed to do so */
 177         if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
 178                 return -ENODEV;
 179
 180         if ((id->driver_data & ATA_GEN_INTEL_IDER) && !all_generic_ide)
 181                 if (!is_intel_ider(dev))
 182                         return -ENODEV;
 183
 184         /* Devices that need care */
 185         if (dev->vendor == PCI_VENDOR_ID_UMC &&
 186             dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
 187             (!(PCI_FUNC(dev->devfn) & 1)))
 188                 return -ENODEV;
 189
 190         if (dev->vendor == PCI_VENDOR_ID_OPTI &&
 191             dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
 192             (!(PCI_FUNC(dev->devfn) & 1)))
 193                 return -ENODEV;
 194
 195         /* Don't re-enable devices in generic mode or we will break some
 196            motherboards with disabled and unused IDE controllers */
 197         pci_read_config_word(dev, PCI_COMMAND, &command);
 198         if (!(command & PCI_COMMAND_IO))
 199                 return -ENODEV;
 200
 201         if (dev->vendor == PCI_VENDOR_ID_AL)
 202                 ata_pci_bmdma_clear_simplex(dev);
 203
 204         if (dev->vendor == PCI_VENDOR_ID_ATI) {
 205                 int rc = pcim_enable_device(dev);
 206                 if (rc < 0)
 207                         return rc;
 208                 pcim_pin_device(dev);
 209         }
 210         return ata_pci_bmdma_init_one(dev, ppi, &generic_sht, (void *)id, 0);
 211 }
 212
 213 static struct pci_device_id ata_generic[] = {
 214         { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
 215         { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
 216         { PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8673F), },
 217         { PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886A), },
 218         { PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886BF), },
 219         { PCI_DEVICE(PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE), },
 220         { PCI_DEVICE(PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_82C561), },
 221         { PCI_DEVICE(PCI_VENDOR_ID_OPTI,   PCI_DEVICE_ID_OPTI_82C558), },
 222         { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
 223           .driver_data = ATA_GEN_FORCE_DMA },
 224 #if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
 225         { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
 226         { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2),  },
 227         { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3),  },
 228         { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5),  },
 229 #endif
 230         /* Intel, IDE class device */
 231         { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
 232           PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL,
 233           .driver_data = ATA_GEN_INTEL_IDER },
 234         /* Must come last. If you add entries adjust this table appropriately */
 235         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
 236           .driver_data = ATA_GEN_CLASS_MATCH },
 237         { 0, },
 238 };
 239
 240 static struct pci_driver ata_generic_pci_driver = {
 241         .name           = DRV_NAME,
 242         .id_table       = ata_generic,
 243         .probe          = ata_generic_init_one,
 244         .remove         = ata_pci_remove_one,
 245 #ifdef CONFIG_PM
 246         .suspend        = ata_pci_device_suspend,
 247         .resume         = ata_pci_device_resume,
 248 #endif
 249 };
 250
 251 module_pci_driver(ata_generic_pci_driver);
 252
 253 MODULE_AUTHOR("Alan Cox");
 254 MODULE_DESCRIPTION("low-level driver for generic ATA");
 255 MODULE_LICENSE("GPL");
 256 MODULE_DEVICE_TABLE(pci, ata_generic);
 257 MODULE_VERSION(DRV_VERSION);
 258
 259 module_param(all_generic_ide, int, 0);