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fix a kmap leak in virtio_console
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath10k / wmi.c
blob712a606a080a02617fe839737ce4c2f5084a5881
1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/skbuff.h>
19 #include <linux/ctype.h>
20
21 #include "core.h"
22 #include "htc.h"
23 #include "debug.h"
24 #include "wmi.h"
25 #include "mac.h"
26
27 /* MAIN WMI cmd track */
28 static struct wmi_cmd_map wmi_cmd_map = {
29 .init_cmdid = WMI_INIT_CMDID,
30 .start_scan_cmdid = WMI_START_SCAN_CMDID,
31 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
32 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
33 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
34 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
35 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
36 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
37 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
38 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
39 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
40 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
41 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
42 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
43 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
44 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
45 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
46 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
47 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
48 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
49 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
50 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
51 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
52 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
53 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
54 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
55 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
56 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
57 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
58 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
59 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
60 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
61 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
62 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
63 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
64 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
65 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
66 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
67 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
68 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
69 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
70 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
71 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
72 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
73 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
74 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
75 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
76 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
77 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
78 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
79 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
80 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
81 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
82 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
83 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
84 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
85 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
86 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
87 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
89 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
90 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
91 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
92 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
93 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
94 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
95 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
96 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
97 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
98 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
99 .wlan_profile_set_hist_intvl_cmdid =
100 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
101 .wlan_profile_get_profile_data_cmdid =
102 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
103 .wlan_profile_enable_profile_id_cmdid =
104 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
105 .wlan_profile_list_profile_id_cmdid =
106 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
107 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
108 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
109 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
110 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
111 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
112 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
113 .wow_enable_disable_wake_event_cmdid =
114 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
115 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
116 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
117 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
118 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
119 .vdev_spectral_scan_configure_cmdid =
120 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
121 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
122 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
123 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
124 .network_list_offload_config_cmdid =
125 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
126 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
127 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
128 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
129 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
130 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
131 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
132 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
133 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
134 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
135 .echo_cmdid = WMI_ECHO_CMDID,
136 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
137 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
138 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
139 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
140 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
141 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
142 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
143 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
144 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
145 };
146
147 /* 10.X WMI cmd track */
148 static struct wmi_cmd_map wmi_10x_cmd_map = {
149 .init_cmdid = WMI_10X_INIT_CMDID,
150 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
151 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
152 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
153 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
154 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
155 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
156 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
157 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
158 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
159 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
160 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
161 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
162 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
163 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
164 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
165 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
166 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
167 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
168 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
169 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
170 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
171 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
172 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
173 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
174 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
175 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
176 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
177 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
178 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
179 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
180 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
181 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
182 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
183 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
184 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
185 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
186 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
187 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
188 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
189 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
190 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
191 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
192 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
193 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
194 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
195 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
196 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
197 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
198 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
199 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
200 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
201 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
202 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
203 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
204 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
205 .roam_scan_rssi_change_threshold =
206 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
207 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
208 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
209 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
210 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
211 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
212 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
213 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
214 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
215 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
216 .ap_ps_peer_param_cmdid = WMI_CMD_UNSUPPORTED,
217 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
218 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
219 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
220 .wlan_profile_set_hist_intvl_cmdid =
221 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
222 .wlan_profile_get_profile_data_cmdid =
223 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
224 .wlan_profile_enable_profile_id_cmdid =
225 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
226 .wlan_profile_list_profile_id_cmdid =
227 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
228 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
229 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
230 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
231 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
232 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
233 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
234 .wow_enable_disable_wake_event_cmdid =
235 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
236 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
237 .wow_hostwakeup_from_sleep_cmdid =
238 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
239 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
240 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
241 .vdev_spectral_scan_configure_cmdid =
242 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
243 .vdev_spectral_scan_enable_cmdid =
244 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
245 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
246 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
247 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
248 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
249 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
251 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
252 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
254 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
257 .echo_cmdid = WMI_10X_ECHO_CMDID,
258 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
259 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
260 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
261 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
262 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
265 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
266 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
267 };
268
269 /* MAIN WMI VDEV param map */
270 static struct wmi_vdev_param_map wmi_vdev_param_map = {
271 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
272 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
273 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
274 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
275 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
276 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
277 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
278 .preamble = WMI_VDEV_PARAM_PREAMBLE,
279 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
280 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
281 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
282 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
283 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
284 .wmi_vdev_oc_scheduler_air_time_limit =
285 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
286 .wds = WMI_VDEV_PARAM_WDS,
287 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
288 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
289 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
290 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
291 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
292 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
293 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
294 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
295 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
296 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
297 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
298 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
299 .sgi = WMI_VDEV_PARAM_SGI,
300 .ldpc = WMI_VDEV_PARAM_LDPC,
301 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
302 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
303 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
304 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
305 .nss = WMI_VDEV_PARAM_NSS,
306 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
307 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
308 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
309 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
310 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
311 .ap_keepalive_min_idle_inactive_time_secs =
312 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
313 .ap_keepalive_max_idle_inactive_time_secs =
314 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
315 .ap_keepalive_max_unresponsive_time_secs =
316 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
317 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
318 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
319 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
320 .txbf = WMI_VDEV_PARAM_TXBF,
321 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
322 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
323 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
324 .ap_detect_out_of_sync_sleeping_sta_time_secs =
325 WMI_VDEV_PARAM_UNSUPPORTED,
326 };
327
328 /* 10.X WMI VDEV param map */
329 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
330 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
331 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
332 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
333 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
334 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
335 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
336 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
337 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
338 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
339 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
340 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
341 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
342 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
343 .wmi_vdev_oc_scheduler_air_time_limit =
344 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
345 .wds = WMI_10X_VDEV_PARAM_WDS,
346 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
347 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
348 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
349 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
351 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
352 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
353 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
354 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
355 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
356 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
357 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
358 .sgi = WMI_10X_VDEV_PARAM_SGI,
359 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
360 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
361 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
362 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
363 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
364 .nss = WMI_10X_VDEV_PARAM_NSS,
365 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
366 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
367 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
368 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
369 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
370 .ap_keepalive_min_idle_inactive_time_secs =
371 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
372 .ap_keepalive_max_idle_inactive_time_secs =
373 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
374 .ap_keepalive_max_unresponsive_time_secs =
375 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
376 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
377 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
378 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
379 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
380 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
381 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
382 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
383 .ap_detect_out_of_sync_sleeping_sta_time_secs =
384 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
385 };
386
387 static struct wmi_pdev_param_map wmi_pdev_param_map = {
388 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
389 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
390 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
391 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
392 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
393 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
394 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
395 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
396 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
397 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
398 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
399 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
400 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
401 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
402 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
403 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
404 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
405 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
406 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
407 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
408 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
409 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
410 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
411 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
412 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
413 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
414 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
415 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
417 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
418 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
419 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
420 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
421 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
422 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
423 .arpdhcp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
424 .dcs = WMI_PDEV_PARAM_DCS,
425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
437 };
438
439 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
472 .bcnflt_stats_update_period =
473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
475 .arp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
476 .arpdhcp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
477 .dcs = WMI_10X_PDEV_PARAM_DCS,
478 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
479 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
480 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
481 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
482 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
483 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
484 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
485 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
486 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
487 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
488 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
489 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
490 };
491
492 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
493 {
494 int ret;
495 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
496 WMI_SERVICE_READY_TIMEOUT_HZ);
497 return ret;
498 }
499
500 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
501 {
502 int ret;
503 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
504 WMI_UNIFIED_READY_TIMEOUT_HZ);
505 return ret;
506 }
507
508 static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
509 {
510 struct sk_buff *skb;
511 u32 round_len = roundup(len, 4);
512
513 skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
514 if (!skb)
515 return NULL;
516
517 skb_reserve(skb, WMI_SKB_HEADROOM);
518 if (!IS_ALIGNED((unsigned long)skb->data, 4))
519 ath10k_warn("Unaligned WMI skb\n");
520
521 skb_put(skb, round_len);
522 memset(skb->data, 0, round_len);
523
524 return skb;
525 }
526
527 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
528 {
529 dev_kfree_skb(skb);
530 }
531
532 static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
533 u32 cmd_id)
534 {
535 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
536 struct wmi_cmd_hdr *cmd_hdr;
537 int ret;
538 u32 cmd = 0;
539
540 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
541 return -ENOMEM;
542
543 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
544
545 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
546 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
547
548 memset(skb_cb, 0, sizeof(*skb_cb));
549 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
550 trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
551
552 if (ret)
553 goto err_pull;
554
555 return 0;
556
557 err_pull:
558 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
559 return ret;
560 }
561
562 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
563 {
564 struct wmi_bcn_tx_arg arg = {0};
565 int ret;
566
567 lockdep_assert_held(&arvif->ar->data_lock);
568
569 if (arvif->beacon == NULL)
570 return;
571
572 arg.vdev_id = arvif->vdev_id;
573 arg.tx_rate = 0;
574 arg.tx_power = 0;
575 arg.bcn = arvif->beacon->data;
576 arg.bcn_len = arvif->beacon->len;
577
578 ret = ath10k_wmi_beacon_send_nowait(arvif->ar, &arg);
579 if (ret)
580 return;
581
582 dev_kfree_skb_any(arvif->beacon);
583 arvif->beacon = NULL;
584 }
585
586 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
587 struct ieee80211_vif *vif)
588 {
589 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
590
591 ath10k_wmi_tx_beacon_nowait(arvif);
592 }
593
594 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
595 {
596 spin_lock_bh(&ar->data_lock);
597 ieee80211_iterate_active_interfaces_atomic(ar->hw,
598 IEEE80211_IFACE_ITER_NORMAL,
599 ath10k_wmi_tx_beacons_iter,
600 NULL);
601 spin_unlock_bh(&ar->data_lock);
602 }
603
604 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
605 {
606 /* try to send pending beacons first. they take priority */
607 ath10k_wmi_tx_beacons_nowait(ar);
608
609 wake_up(&ar->wmi.tx_credits_wq);
610 }
611
612 static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
613 u32 cmd_id)
614 {
615 int ret = -EOPNOTSUPP;
616
617 might_sleep();
618
619 if (cmd_id == WMI_CMD_UNSUPPORTED) {
620 ath10k_warn("wmi command %d is not supported by firmware\n",
621 cmd_id);
622 return ret;
623 }
624
625 wait_event_timeout(ar->wmi.tx_credits_wq, ({
626 /* try to send pending beacons first. they take priority */
627 ath10k_wmi_tx_beacons_nowait(ar);
628
629 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
630 (ret != -EAGAIN);
631 }), 3*HZ);
632
633 if (ret)
634 dev_kfree_skb_any(skb);
635
636 return ret;
637 }
638
639 int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
640 {
641 int ret = 0;
642 struct wmi_mgmt_tx_cmd *cmd;
643 struct ieee80211_hdr *hdr;
644 struct sk_buff *wmi_skb;
645 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
646 int len;
647 u16 fc;
648
649 hdr = (struct ieee80211_hdr *)skb->data;
650 fc = le16_to_cpu(hdr->frame_control);
651
652 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
653 return -EINVAL;
654
655 len = sizeof(cmd->hdr) + skb->len;
656 len = round_up(len, 4);
657
658 wmi_skb = ath10k_wmi_alloc_skb(len);
659 if (!wmi_skb)
660 return -ENOMEM;
661
662 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
663
664 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
665 cmd->hdr.tx_rate = 0;
666 cmd->hdr.tx_power = 0;
667 cmd->hdr.buf_len = __cpu_to_le32((u32)(skb->len));
668
669 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
670 memcpy(cmd->buf, skb->data, skb->len);
671
672 ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
673 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
674 fc & IEEE80211_FCTL_STYPE);
675
676 /* Send the management frame buffer to the target */
677 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
678 if (ret)
679 return ret;
680
681 /* TODO: report tx status to mac80211 - temporary just ACK */
682 info->flags |= IEEE80211_TX_STAT_ACK;
683 ieee80211_tx_status_irqsafe(ar->hw, skb);
684
685 return ret;
686 }
687
688 static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
689 {
690 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
691 enum wmi_scan_event_type event_type;
692 enum wmi_scan_completion_reason reason;
693 u32 freq;
694 u32 req_id;
695 u32 scan_id;
696 u32 vdev_id;
697
698 event_type = __le32_to_cpu(event->event_type);
699 reason = __le32_to_cpu(event->reason);
700 freq = __le32_to_cpu(event->channel_freq);
701 req_id = __le32_to_cpu(event->scan_req_id);
702 scan_id = __le32_to_cpu(event->scan_id);
703 vdev_id = __le32_to_cpu(event->vdev_id);
704
705 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
706 ath10k_dbg(ATH10K_DBG_WMI,
707 "scan event type %d reason %d freq %d req_id %d "
708 "scan_id %d vdev_id %d\n",
709 event_type, reason, freq, req_id, scan_id, vdev_id);
710
711 spin_lock_bh(&ar->data_lock);
712
713 switch (event_type) {
714 case WMI_SCAN_EVENT_STARTED:
715 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
716 if (ar->scan.in_progress && ar->scan.is_roc)
717 ieee80211_ready_on_channel(ar->hw);
718
719 complete(&ar->scan.started);
720 break;
721 case WMI_SCAN_EVENT_COMPLETED:
722 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
723 switch (reason) {
724 case WMI_SCAN_REASON_COMPLETED:
725 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
726 break;
727 case WMI_SCAN_REASON_CANCELLED:
728 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
729 break;
730 case WMI_SCAN_REASON_PREEMPTED:
731 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
732 break;
733 case WMI_SCAN_REASON_TIMEDOUT:
734 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
735 break;
736 default:
737 break;
738 }
739
740 ar->scan_channel = NULL;
741 if (!ar->scan.in_progress) {
742 ath10k_warn("no scan requested, ignoring\n");
743 break;
744 }
745
746 if (ar->scan.is_roc) {
747 ath10k_offchan_tx_purge(ar);
748
749 if (!ar->scan.aborting)
750 ieee80211_remain_on_channel_expired(ar->hw);
751 } else {
752 ieee80211_scan_completed(ar->hw, ar->scan.aborting);
753 }
754
755 del_timer(&ar->scan.timeout);
756 complete_all(&ar->scan.completed);
757 ar->scan.in_progress = false;
758 break;
759 case WMI_SCAN_EVENT_BSS_CHANNEL:
760 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
761 ar->scan_channel = NULL;
762 break;
763 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
764 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
765 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
766 if (ar->scan.in_progress && ar->scan.is_roc &&
767 ar->scan.roc_freq == freq) {
768 complete(&ar->scan.on_channel);
769 }
770 break;
771 case WMI_SCAN_EVENT_DEQUEUED:
772 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
773 break;
774 case WMI_SCAN_EVENT_PREEMPTED:
775 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
776 break;
777 case WMI_SCAN_EVENT_START_FAILED:
778 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
779 break;
780 default:
781 break;
782 }
783
784 spin_unlock_bh(&ar->data_lock);
785 return 0;
786 }
787
788 static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
789 {
790 enum ieee80211_band band;
791
792 switch (phy_mode) {
793 case MODE_11A:
794 case MODE_11NA_HT20:
795 case MODE_11NA_HT40:
796 case MODE_11AC_VHT20:
797 case MODE_11AC_VHT40:
798 case MODE_11AC_VHT80:
799 band = IEEE80211_BAND_5GHZ;
800 break;
801 case MODE_11G:
802 case MODE_11B:
803 case MODE_11GONLY:
804 case MODE_11NG_HT20:
805 case MODE_11NG_HT40:
806 case MODE_11AC_VHT20_2G:
807 case MODE_11AC_VHT40_2G:
808 case MODE_11AC_VHT80_2G:
809 default:
810 band = IEEE80211_BAND_2GHZ;
811 }
812
813 return band;
814 }
815
816 static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
817 {
818 u8 rate_idx = 0;
819
820 /* rate in Kbps */
821 switch (rate) {
822 case 1000:
823 rate_idx = 0;
824 break;
825 case 2000:
826 rate_idx = 1;
827 break;
828 case 5500:
829 rate_idx = 2;
830 break;
831 case 11000:
832 rate_idx = 3;
833 break;
834 case 6000:
835 rate_idx = 4;
836 break;
837 case 9000:
838 rate_idx = 5;
839 break;
840 case 12000:
841 rate_idx = 6;
842 break;
843 case 18000:
844 rate_idx = 7;
845 break;
846 case 24000:
847 rate_idx = 8;
848 break;
849 case 36000:
850 rate_idx = 9;
851 break;
852 case 48000:
853 rate_idx = 10;
854 break;
855 case 54000:
856 rate_idx = 11;
857 break;
858 default:
859 break;
860 }
861
862 if (band == IEEE80211_BAND_5GHZ) {
863 if (rate_idx > 3)
864 /* Omit CCK rates */
865 rate_idx -= 4;
866 else
867 rate_idx = 0;
868 }
869
870 return rate_idx;
871 }
872
873 static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
874 {
875 struct wmi_mgmt_rx_event_v1 *ev_v1;
876 struct wmi_mgmt_rx_event_v2 *ev_v2;
877 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
878 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
879 struct ieee80211_channel *ch;
880 struct ieee80211_hdr *hdr;
881 u32 rx_status;
882 u32 channel;
883 u32 phy_mode;
884 u32 snr;
885 u32 rate;
886 u32 buf_len;
887 u16 fc;
888 int pull_len;
889
890 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
891 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
892 ev_hdr = &ev_v2->hdr.v1;
893 pull_len = sizeof(*ev_v2);
894 } else {
895 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
896 ev_hdr = &ev_v1->hdr;
897 pull_len = sizeof(*ev_v1);
898 }
899
900 channel = __le32_to_cpu(ev_hdr->channel);
901 buf_len = __le32_to_cpu(ev_hdr->buf_len);
902 rx_status = __le32_to_cpu(ev_hdr->status);
903 snr = __le32_to_cpu(ev_hdr->snr);
904 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
905 rate = __le32_to_cpu(ev_hdr->rate);
906
907 memset(status, 0, sizeof(*status));
908
909 ath10k_dbg(ATH10K_DBG_MGMT,
910 "event mgmt rx status %08x\n", rx_status);
911
912 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
913 dev_kfree_skb(skb);
914 return 0;
915 }
916
917 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
918 dev_kfree_skb(skb);
919 return 0;
920 }
921
922 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
923 dev_kfree_skb(skb);
924 return 0;
925 }
926
927 if (rx_status & WMI_RX_STATUS_ERR_CRC)
928 status->flag |= RX_FLAG_FAILED_FCS_CRC;
929 if (rx_status & WMI_RX_STATUS_ERR_MIC)
930 status->flag |= RX_FLAG_MMIC_ERROR;
931
932 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
933 * MODE_11B. This means phy_mode is not a reliable source for the band
934 * of mgmt rx. */
935
936 ch = ar->scan_channel;
937 if (!ch)
938 ch = ar->rx_channel;
939
940 if (ch) {
941 status->band = ch->band;
942
943 if (phy_mode == MODE_11B &&
944 status->band == IEEE80211_BAND_5GHZ)
945 ath10k_dbg(ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
946 } else {
947 ath10k_warn("using (unreliable) phy_mode to extract band for mgmt rx\n");
948 status->band = phy_mode_to_band(phy_mode);
949 }
950
951 status->freq = ieee80211_channel_to_frequency(channel, status->band);
952 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
953 status->rate_idx = get_rate_idx(rate, status->band);
954
955 skb_pull(skb, pull_len);
956
957 hdr = (struct ieee80211_hdr *)skb->data;
958 fc = le16_to_cpu(hdr->frame_control);
959
960 /* FW delivers WEP Shared Auth frame with Protected Bit set and
961 * encrypted payload. However in case of PMF it delivers decrypted
962 * frames with Protected Bit set. */
963 if (ieee80211_has_protected(hdr->frame_control) &&
964 !ieee80211_is_auth(hdr->frame_control)) {
965 status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
966 RX_FLAG_MMIC_STRIPPED;
967 hdr->frame_control = __cpu_to_le16(fc &
968 ~IEEE80211_FCTL_PROTECTED);
969 }
970
971 ath10k_dbg(ATH10K_DBG_MGMT,
972 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
973 skb, skb->len,
974 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
975
976 ath10k_dbg(ATH10K_DBG_MGMT,
977 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
978 status->freq, status->band, status->signal,
979 status->rate_idx);
980
981 /*
982 * packets from HTC come aligned to 4byte boundaries
983 * because they can originally come in along with a trailer
984 */
985 skb_trim(skb, buf_len);
986
987 ieee80211_rx(ar->hw, skb);
988 return 0;
989 }
990
991 static int freq_to_idx(struct ath10k *ar, int freq)
992 {
993 struct ieee80211_supported_band *sband;
994 int band, ch, idx = 0;
995
996 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
997 sband = ar->hw->wiphy->bands[band];
998 if (!sband)
999 continue;
1000
1001 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1002 if (sband->channels[ch].center_freq == freq)
1003 goto exit;
1004 }
1005
1006 exit:
1007 return idx;
1008 }
1009
1010 static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1011 {
1012 struct wmi_chan_info_event *ev;
1013 struct survey_info *survey;
1014 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1015 int idx;
1016
1017 ev = (struct wmi_chan_info_event *)skb->data;
1018
1019 err_code = __le32_to_cpu(ev->err_code);
1020 freq = __le32_to_cpu(ev->freq);
1021 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1022 noise_floor = __le32_to_cpu(ev->noise_floor);
1023 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1024 cycle_count = __le32_to_cpu(ev->cycle_count);
1025
1026 ath10k_dbg(ATH10K_DBG_WMI,
1027 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1028 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1029 cycle_count);
1030
1031 spin_lock_bh(&ar->data_lock);
1032
1033 if (!ar->scan.in_progress) {
1034 ath10k_warn("chan info event without a scan request?\n");
1035 goto exit;
1036 }
1037
1038 idx = freq_to_idx(ar, freq);
1039 if (idx >= ARRAY_SIZE(ar->survey)) {
1040 ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
1041 freq, idx);
1042 goto exit;
1043 }
1044
1045 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1046 /* During scanning chan info is reported twice for each
1047 * visited channel. The reported cycle count is global
1048 * and per-channel cycle count must be calculated */
1049
1050 cycle_count -= ar->survey_last_cycle_count;
1051 rx_clear_count -= ar->survey_last_rx_clear_count;
1052
1053 survey = &ar->survey[idx];
1054 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1055 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1056 survey->noise = noise_floor;
1057 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1058 SURVEY_INFO_CHANNEL_TIME_RX |
1059 SURVEY_INFO_NOISE_DBM;
1060 }
1061
1062 ar->survey_last_rx_clear_count = rx_clear_count;
1063 ar->survey_last_cycle_count = cycle_count;
1064
1065 exit:
1066 spin_unlock_bh(&ar->data_lock);
1067 }
1068
1069 static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1070 {
1071 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1072 }
1073
1074 static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
1075 {
1076 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1077 skb->len);
1078
1079 trace_ath10k_wmi_dbglog(skb->data, skb->len);
1080
1081 return 0;
1082 }
1083
1084 static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1085 struct sk_buff *skb)
1086 {
1087 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1088
1089 ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1090
1091 ath10k_debug_read_target_stats(ar, ev);
1092 }
1093
1094 static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1095 struct sk_buff *skb)
1096 {
1097 struct wmi_vdev_start_response_event *ev;
1098
1099 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1100
1101 ev = (struct wmi_vdev_start_response_event *)skb->data;
1102
1103 if (WARN_ON(__le32_to_cpu(ev->status)))
1104 return;
1105
1106 complete(&ar->vdev_setup_done);
1107 }
1108
1109 static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1110 struct sk_buff *skb)
1111 {
1112 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1113 complete(&ar->vdev_setup_done);
1114 }
1115
1116 static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1117 struct sk_buff *skb)
1118 {
1119 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PEER_STA_KICKOUT_EVENTID\n");
1120 }
1121
1122 /*
1123 * FIXME
1124 *
1125 * We don't report to mac80211 sleep state of connected
1126 * stations. Due to this mac80211 can't fill in TIM IE
1127 * correctly.
1128 *
1129 * I know of no way of getting nullfunc frames that contain
1130 * sleep transition from connected stations - these do not
1131 * seem to be sent from the target to the host. There also
1132 * doesn't seem to be a dedicated event for that. So the
1133 * only way left to do this would be to read tim_bitmap
1134 * during SWBA.
1135 *
1136 * We could probably try using tim_bitmap from SWBA to tell
1137 * mac80211 which stations are asleep and which are not. The
1138 * problem here is calling mac80211 functions so many times
1139 * could take too long and make us miss the time to submit
1140 * the beacon to the target.
1141 *
1142 * So as a workaround we try to extend the TIM IE if there
1143 * is unicast buffered for stations with aid > 7 and fill it
1144 * in ourselves.
1145 */
1146 static void ath10k_wmi_update_tim(struct ath10k *ar,
1147 struct ath10k_vif *arvif,
1148 struct sk_buff *bcn,
1149 struct wmi_bcn_info *bcn_info)
1150 {
1151 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1152 struct ieee80211_tim_ie *tim;
1153 u8 *ies, *ie;
1154 u8 ie_len, pvm_len;
1155
1156 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1157 * we must copy the bitmap upon change and reuse it later */
1158 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1159 int i;
1160
1161 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1162 sizeof(bcn_info->tim_info.tim_bitmap));
1163
1164 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1165 __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
1166 u32 v = __le32_to_cpu(t);
1167 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1168 }
1169
1170 /* FW reports either length 0 or 16
1171 * so we calculate this on our own */
1172 arvif->u.ap.tim_len = 0;
1173 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1174 if (arvif->u.ap.tim_bitmap[i])
1175 arvif->u.ap.tim_len = i;
1176
1177 arvif->u.ap.tim_len++;
1178 }
1179
1180 ies = bcn->data;
1181 ies += ieee80211_hdrlen(hdr->frame_control);
1182 ies += 12; /* fixed parameters */
1183
1184 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1185 (u8 *)skb_tail_pointer(bcn) - ies);
1186 if (!ie) {
1187 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
1188 ath10k_warn("no tim ie found;\n");
1189 return;
1190 }
1191
1192 tim = (void *)ie + 2;
1193 ie_len = ie[1];
1194 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1195
1196 if (pvm_len < arvif->u.ap.tim_len) {
1197 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1198 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1199 void *next_ie = ie + 2 + ie_len;
1200
1201 if (skb_put(bcn, expand_size)) {
1202 memmove(next_ie + expand_size, next_ie, move_size);
1203
1204 ie[1] += expand_size;
1205 ie_len += expand_size;
1206 pvm_len += expand_size;
1207 } else {
1208 ath10k_warn("tim expansion failed\n");
1209 }
1210 }
1211
1212 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
1213 ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
1214 return;
1215 }
1216
1217 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1218 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1219
1220 ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
1221 tim->dtim_count, tim->dtim_period,
1222 tim->bitmap_ctrl, pvm_len);
1223 }
1224
1225 static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1226 struct wmi_p2p_noa_info *noa)
1227 {
1228 struct ieee80211_p2p_noa_attr *noa_attr;
1229 u8 ctwindow_oppps = noa->ctwindow_oppps;
1230 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1231 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1232 __le16 *noa_attr_len;
1233 u16 attr_len;
1234 u8 noa_descriptors = noa->num_descriptors;
1235 int i;
1236
1237 /* P2P IE */
1238 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1239 data[1] = len - 2;
1240 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1241 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1242 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1243 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1244
1245 /* NOA ATTR */
1246 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1247 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1248 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1249
1250 noa_attr->index = noa->index;
1251 noa_attr->oppps_ctwindow = ctwindow;
1252 if (oppps)
1253 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1254
1255 for (i = 0; i < noa_descriptors; i++) {
1256 noa_attr->desc[i].count =
1257 __le32_to_cpu(noa->descriptors[i].type_count);
1258 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1259 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1260 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1261 }
1262
1263 attr_len = 2; /* index + oppps_ctwindow */
1264 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1265 *noa_attr_len = __cpu_to_le16(attr_len);
1266 }
1267
1268 static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1269 {
1270 u32 len = 0;
1271 u8 noa_descriptors = noa->num_descriptors;
1272 u8 opp_ps_info = noa->ctwindow_oppps;
1273 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1274
1275
1276 if (!noa_descriptors && !opps_enabled)
1277 return len;
1278
1279 len += 1 + 1 + 4; /* EID + len + OUI */
1280 len += 1 + 2; /* noa attr + attr len */
1281 len += 1 + 1; /* index + oppps_ctwindow */
1282 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1283
1284 return len;
1285 }
1286
1287 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1288 struct sk_buff *bcn,
1289 struct wmi_bcn_info *bcn_info)
1290 {
1291 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1292 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1293 u32 new_len;
1294
1295 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1296 return;
1297
1298 ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
1299 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1300 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1301 if (!new_len)
1302 goto cleanup;
1303
1304 new_data = kmalloc(new_len, GFP_ATOMIC);
1305 if (!new_data)
1306 goto cleanup;
1307
1308 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1309
1310 spin_lock_bh(&ar->data_lock);
1311 arvif->u.ap.noa_data = new_data;
1312 arvif->u.ap.noa_len = new_len;
1313 spin_unlock_bh(&ar->data_lock);
1314 kfree(old_data);
1315 }
1316
1317 if (arvif->u.ap.noa_data)
1318 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1319 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1320 arvif->u.ap.noa_data,
1321 arvif->u.ap.noa_len);
1322 return;
1323
1324 cleanup:
1325 spin_lock_bh(&ar->data_lock);
1326 arvif->u.ap.noa_data = NULL;
1327 arvif->u.ap.noa_len = 0;
1328 spin_unlock_bh(&ar->data_lock);
1329 kfree(old_data);
1330 }
1331
1332
1333 static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1334 {
1335 struct wmi_host_swba_event *ev;
1336 u32 map;
1337 int i = -1;
1338 struct wmi_bcn_info *bcn_info;
1339 struct ath10k_vif *arvif;
1340 struct sk_buff *bcn;
1341 int vdev_id = 0;
1342
1343 ath10k_dbg(ATH10K_DBG_MGMT, "WMI_HOST_SWBA_EVENTID\n");
1344
1345 ev = (struct wmi_host_swba_event *)skb->data;
1346 map = __le32_to_cpu(ev->vdev_map);
1347
1348 ath10k_dbg(ATH10K_DBG_MGMT, "host swba:\n"
1349 "-vdev map 0x%x\n",
1350 ev->vdev_map);
1351
1352 for (; map; map >>= 1, vdev_id++) {
1353 if (!(map & 0x1))
1354 continue;
1355
1356 i++;
1357
1358 if (i >= WMI_MAX_AP_VDEV) {
1359 ath10k_warn("swba has corrupted vdev map\n");
1360 break;
1361 }
1362
1363 bcn_info = &ev->bcn_info[i];
1364
1365 ath10k_dbg(ATH10K_DBG_MGMT,
1366 "-bcn_info[%d]:\n"
1367 "--tim_len %d\n"
1368 "--tim_mcast %d\n"
1369 "--tim_changed %d\n"
1370 "--tim_num_ps_pending %d\n"
1371 "--tim_bitmap 0x%08x%08x%08x%08x\n",
1372 i,
1373 __le32_to_cpu(bcn_info->tim_info.tim_len),
1374 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1375 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1376 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1377 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1378 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1379 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1380 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1381
1382 arvif = ath10k_get_arvif(ar, vdev_id);
1383 if (arvif == NULL) {
1384 ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
1385 continue;
1386 }
1387
1388 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1389 if (!bcn) {
1390 ath10k_warn("could not get mac80211 beacon\n");
1391 continue;
1392 }
1393
1394 ath10k_tx_h_seq_no(bcn);
1395 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1396 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1397
1398 spin_lock_bh(&ar->data_lock);
1399 if (arvif->beacon) {
1400 ath10k_warn("SWBA overrun on vdev %d\n",
1401 arvif->vdev_id);
1402 dev_kfree_skb_any(arvif->beacon);
1403 }
1404
1405 arvif->beacon = bcn;
1406
1407 ath10k_wmi_tx_beacon_nowait(arvif);
1408 spin_unlock_bh(&ar->data_lock);
1409 }
1410 }
1411
1412 static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1413 struct sk_buff *skb)
1414 {
1415 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
1416 }
1417
1418 static void ath10k_dfs_radar_report(struct ath10k *ar,
1419 struct wmi_single_phyerr_rx_event *event,
1420 struct phyerr_radar_report *rr,
1421 u64 tsf)
1422 {
1423 u32 reg0, reg1, tsf32l;
1424 struct pulse_event pe;
1425 u64 tsf64;
1426 u8 rssi, width;
1427
1428 reg0 = __le32_to_cpu(rr->reg0);
1429 reg1 = __le32_to_cpu(rr->reg1);
1430
1431 ath10k_dbg(ATH10K_DBG_REGULATORY,
1432 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1433 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1434 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1435 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1436 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
1437 ath10k_dbg(ATH10K_DBG_REGULATORY,
1438 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1439 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1440 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1441 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1442 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1443 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
1444 ath10k_dbg(ATH10K_DBG_REGULATORY,
1445 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1446 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1447 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1448
1449 if (!ar->dfs_detector)
1450 return;
1451
1452 /* report event to DFS pattern detector */
1453 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1454 tsf64 = tsf & (~0xFFFFFFFFULL);
1455 tsf64 |= tsf32l;
1456
1457 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1458 rssi = event->hdr.rssi_combined;
1459
1460 /* hardware store this as 8 bit signed value,
1461 * set to zero if negative number
1462 */
1463 if (rssi & 0x80)
1464 rssi = 0;
1465
1466 pe.ts = tsf64;
1467 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1468 pe.width = width;
1469 pe.rssi = rssi;
1470
1471 ath10k_dbg(ATH10K_DBG_REGULATORY,
1472 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1473 pe.freq, pe.width, pe.rssi, pe.ts);
1474
1475 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1476
1477 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
1478 ath10k_dbg(ATH10K_DBG_REGULATORY,
1479 "dfs no pulse pattern detected, yet\n");
1480 return;
1481 }
1482
1483 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
1484 ATH10K_DFS_STAT_INC(ar, radar_detected);
1485
1486 /* Control radar events reporting in debugfs file
1487 dfs_block_radar_events */
1488 if (ar->dfs_block_radar_events) {
1489 ath10k_info("DFS Radar detected, but ignored as requested\n");
1490 return;
1491 }
1492
1493 ieee80211_radar_detected(ar->hw);
1494 }
1495
1496 static int ath10k_dfs_fft_report(struct ath10k *ar,
1497 struct wmi_single_phyerr_rx_event *event,
1498 struct phyerr_fft_report *fftr,
1499 u64 tsf)
1500 {
1501 u32 reg0, reg1;
1502 u8 rssi, peak_mag;
1503
1504 reg0 = __le32_to_cpu(fftr->reg0);
1505 reg1 = __le32_to_cpu(fftr->reg1);
1506 rssi = event->hdr.rssi_combined;
1507
1508 ath10k_dbg(ATH10K_DBG_REGULATORY,
1509 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1510 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1511 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1512 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1513 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
1514 ath10k_dbg(ATH10K_DBG_REGULATORY,
1515 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1516 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1517 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1518 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1519 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1520
1521 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1522
1523 /* false event detection */
1524 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1525 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
1526 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
1527 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1528 return -EINVAL;
1529 }
1530
1531 return 0;
1532 }
1533
1534 static void ath10k_wmi_event_dfs(struct ath10k *ar,
1535 struct wmi_single_phyerr_rx_event *event,
1536 u64 tsf)
1537 {
1538 int buf_len, tlv_len, res, i = 0;
1539 struct phyerr_tlv *tlv;
1540 struct phyerr_radar_report *rr;
1541 struct phyerr_fft_report *fftr;
1542 u8 *tlv_buf;
1543
1544 buf_len = __le32_to_cpu(event->hdr.buf_len);
1545 ath10k_dbg(ATH10K_DBG_REGULATORY,
1546 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1547 event->hdr.phy_err_code, event->hdr.rssi_combined,
1548 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1549
1550 /* Skip event if DFS disabled */
1551 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1552 return;
1553
1554 ATH10K_DFS_STAT_INC(ar, pulses_total);
1555
1556 while (i < buf_len) {
1557 if (i + sizeof(*tlv) > buf_len) {
1558 ath10k_warn("too short buf for tlv header (%d)\n", i);
1559 return;
1560 }
1561
1562 tlv = (struct phyerr_tlv *)&event->bufp[i];
1563 tlv_len = __le16_to_cpu(tlv->len);
1564 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1565 ath10k_dbg(ATH10K_DBG_REGULATORY,
1566 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1567 tlv_len, tlv->tag, tlv->sig);
1568
1569 switch (tlv->tag) {
1570 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1571 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
1572 ath10k_warn("too short radar pulse summary (%d)\n",
1573 i);
1574 return;
1575 }
1576
1577 rr = (struct phyerr_radar_report *)tlv_buf;
1578 ath10k_dfs_radar_report(ar, event, rr, tsf);
1579 break;
1580 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1581 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
1582 ath10k_warn("too short fft report (%d)\n", i);
1583 return;
1584 }
1585
1586 fftr = (struct phyerr_fft_report *)tlv_buf;
1587 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1588 if (res)
1589 return;
1590 break;
1591 }
1592
1593 i += sizeof(*tlv) + tlv_len;
1594 }
1595 }
1596
1597 static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1598 struct wmi_single_phyerr_rx_event *event,
1599 u64 tsf)
1600 {
1601 ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
1602 }
1603
1604 static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1605 {
1606 struct wmi_comb_phyerr_rx_event *comb_event;
1607 struct wmi_single_phyerr_rx_event *event;
1608 u32 count, i, buf_len, phy_err_code;
1609 u64 tsf;
1610 int left_len = skb->len;
1611
1612 ATH10K_DFS_STAT_INC(ar, phy_errors);
1613
1614 /* Check if combined event available */
1615 if (left_len < sizeof(*comb_event)) {
1616 ath10k_warn("wmi phyerr combined event wrong len\n");
1617 return;
1618 }
1619
1620 left_len -= sizeof(*comb_event);
1621
1622 /* Check number of included events */
1623 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1624 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1625
1626 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1627 tsf <<= 32;
1628 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1629
1630 ath10k_dbg(ATH10K_DBG_WMI,
1631 "wmi event phyerr count %d tsf64 0x%llX\n",
1632 count, tsf);
1633
1634 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1635 for (i = 0; i < count; i++) {
1636 /* Check if we can read event header */
1637 if (left_len < sizeof(*event)) {
1638 ath10k_warn("single event (%d) wrong head len\n", i);
1639 return;
1640 }
1641
1642 left_len -= sizeof(*event);
1643
1644 buf_len = __le32_to_cpu(event->hdr.buf_len);
1645 phy_err_code = event->hdr.phy_err_code;
1646
1647 if (left_len < buf_len) {
1648 ath10k_warn("single event (%d) wrong buf len\n", i);
1649 return;
1650 }
1651
1652 left_len -= buf_len;
1653
1654 switch (phy_err_code) {
1655 case PHY_ERROR_RADAR:
1656 ath10k_wmi_event_dfs(ar, event, tsf);
1657 break;
1658 case PHY_ERROR_SPECTRAL_SCAN:
1659 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1660 break;
1661 case PHY_ERROR_FALSE_RADAR_EXT:
1662 ath10k_wmi_event_dfs(ar, event, tsf);
1663 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1664 break;
1665 default:
1666 break;
1667 }
1668
1669 event += sizeof(*event) + buf_len;
1670 }
1671 }
1672
1673 static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1674 {
1675 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
1676 }
1677
1678 static void ath10k_wmi_event_profile_match(struct ath10k *ar,
1679 struct sk_buff *skb)
1680 {
1681 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
1682 }
1683
1684 static void ath10k_wmi_event_debug_print(struct ath10k *ar,
1685 struct sk_buff *skb)
1686 {
1687 char buf[101], c;
1688 int i;
1689
1690 for (i = 0; i < sizeof(buf) - 1; i++) {
1691 if (i >= skb->len)
1692 break;
1693
1694 c = skb->data[i];
1695
1696 if (c == '\0')
1697 break;
1698
1699 if (isascii(c) && isprint(c))
1700 buf[i] = c;
1701 else
1702 buf[i] = '.';
1703 }
1704
1705 if (i == sizeof(buf) - 1)
1706 ath10k_warn("wmi debug print truncated: %d\n", skb->len);
1707
1708 /* for some reason the debug prints end with \n, remove that */
1709 if (skb->data[i - 1] == '\n')
1710 i--;
1711
1712 /* the last byte is always reserved for the null character */
1713 buf[i] = '\0';
1714
1715 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
1716 }
1717
1718 static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
1719 {
1720 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
1721 }
1722
1723 static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
1724 struct sk_buff *skb)
1725 {
1726 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
1727 }
1728
1729 static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
1730 struct sk_buff *skb)
1731 {
1732 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
1733 }
1734
1735 static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
1736 struct sk_buff *skb)
1737 {
1738 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
1739 }
1740
1741 static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
1742 struct sk_buff *skb)
1743 {
1744 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
1745 }
1746
1747 static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
1748 struct sk_buff *skb)
1749 {
1750 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
1751 }
1752
1753 static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
1754 struct sk_buff *skb)
1755 {
1756 ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
1757 }
1758
1759 static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
1760 struct sk_buff *skb)
1761 {
1762 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
1763 }
1764
1765 static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
1766 struct sk_buff *skb)
1767 {
1768 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
1769 }
1770
1771 static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
1772 struct sk_buff *skb)
1773 {
1774 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
1775 }
1776
1777 static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
1778 struct sk_buff *skb)
1779 {
1780 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
1781 }
1782
1783 static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
1784 struct sk_buff *skb)
1785 {
1786 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
1787 }
1788
1789 static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
1790 struct sk_buff *skb)
1791 {
1792 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
1793 }
1794
1795 static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
1796 struct sk_buff *skb)
1797 {
1798 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
1799 }
1800
1801 static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
1802 struct sk_buff *skb)
1803 {
1804 ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
1805 }
1806
1807 static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
1808 struct sk_buff *skb)
1809 {
1810 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
1811 }
1812
1813 static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
1814 struct sk_buff *skb)
1815 {
1816 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
1817 }
1818
1819 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
1820 u32 num_units, u32 unit_len)
1821 {
1822 dma_addr_t paddr;
1823 u32 pool_size;
1824 int idx = ar->wmi.num_mem_chunks;
1825
1826 pool_size = num_units * round_up(unit_len, 4);
1827
1828 if (!pool_size)
1829 return -EINVAL;
1830
1831 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
1832 pool_size,
1833 &paddr,
1834 GFP_ATOMIC);
1835 if (!ar->wmi.mem_chunks[idx].vaddr) {
1836 ath10k_warn("failed to allocate memory chunk\n");
1837 return -ENOMEM;
1838 }
1839
1840 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
1841
1842 ar->wmi.mem_chunks[idx].paddr = paddr;
1843 ar->wmi.mem_chunks[idx].len = pool_size;
1844 ar->wmi.mem_chunks[idx].req_id = req_id;
1845 ar->wmi.num_mem_chunks++;
1846
1847 return 0;
1848 }
1849
1850 static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
1851 struct sk_buff *skb)
1852 {
1853 struct wmi_service_ready_event *ev = (void *)skb->data;
1854
1855 if (skb->len < sizeof(*ev)) {
1856 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1857 skb->len, sizeof(*ev));
1858 return;
1859 }
1860
1861 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1862 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1863 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1864 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1865 ar->fw_version_major =
1866 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1867 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1868 ar->fw_version_release =
1869 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
1870 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
1871 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
1872 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1873
1874 /* only manually set fw features when not using FW IE format */
1875 if (ar->fw_api == 1 && ar->fw_version_build > 636)
1876 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
1877
1878 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1879 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1880 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1881 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1882 }
1883
1884 ar->ath_common.regulatory.current_rd =
1885 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1886
1887 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1888 sizeof(ev->wmi_service_bitmap));
1889
1890 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1891 snprintf(ar->hw->wiphy->fw_version,
1892 sizeof(ar->hw->wiphy->fw_version),
1893 "%u.%u.%u.%u",
1894 ar->fw_version_major,
1895 ar->fw_version_minor,
1896 ar->fw_version_release,
1897 ar->fw_version_build);
1898 }
1899
1900 /* FIXME: it probably should be better to support this */
1901 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
1902 ath10k_warn("target requested %d memory chunks; ignoring\n",
1903 __le32_to_cpu(ev->num_mem_reqs));
1904 }
1905
1906 ath10k_dbg(ATH10K_DBG_WMI,
1907 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
1908 __le32_to_cpu(ev->sw_version),
1909 __le32_to_cpu(ev->sw_version_1),
1910 __le32_to_cpu(ev->abi_version),
1911 __le32_to_cpu(ev->phy_capability),
1912 __le32_to_cpu(ev->ht_cap_info),
1913 __le32_to_cpu(ev->vht_cap_info),
1914 __le32_to_cpu(ev->vht_supp_mcs),
1915 __le32_to_cpu(ev->sys_cap_info),
1916 __le32_to_cpu(ev->num_mem_reqs),
1917 __le32_to_cpu(ev->num_rf_chains));
1918
1919 complete(&ar->wmi.service_ready);
1920 }
1921
1922 static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
1923 struct sk_buff *skb)
1924 {
1925 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
1926 int ret;
1927 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
1928
1929 if (skb->len < sizeof(*ev)) {
1930 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1931 skb->len, sizeof(*ev));
1932 return;
1933 }
1934
1935 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1936 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1937 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1938 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1939 ar->fw_version_major =
1940 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1941 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1942 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
1943 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1944
1945 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1946 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1947 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1948 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1949 }
1950
1951 ar->ath_common.regulatory.current_rd =
1952 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1953
1954 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1955 sizeof(ev->wmi_service_bitmap));
1956
1957 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1958 snprintf(ar->hw->wiphy->fw_version,
1959 sizeof(ar->hw->wiphy->fw_version),
1960 "%u.%u",
1961 ar->fw_version_major,
1962 ar->fw_version_minor);
1963 }
1964
1965 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
1966
1967 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
1968 ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
1969 num_mem_reqs);
1970 return;
1971 }
1972
1973 if (!num_mem_reqs)
1974 goto exit;
1975
1976 ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
1977 num_mem_reqs);
1978
1979 for (i = 0; i < num_mem_reqs; ++i) {
1980 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
1981 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
1982 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
1983 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
1984
1985 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
1986 /* number of units to allocate is number of
1987 * peers, 1 extra for self peer on target */
1988 /* this needs to be tied, host and target
1989 * can get out of sync */
1990 num_units = TARGET_10X_NUM_PEERS + 1;
1991 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
1992 num_units = TARGET_10X_NUM_VDEVS + 1;
1993
1994 ath10k_dbg(ATH10K_DBG_WMI,
1995 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
1996 req_id,
1997 __le32_to_cpu(ev->mem_reqs[i].num_units),
1998 num_unit_info,
1999 unit_size,
2000 num_units);
2001
2002 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2003 unit_size);
2004 if (ret)
2005 return;
2006 }
2007
2008 exit:
2009 ath10k_dbg(ATH10K_DBG_WMI,
2010 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2011 __le32_to_cpu(ev->sw_version),
2012 __le32_to_cpu(ev->abi_version),
2013 __le32_to_cpu(ev->phy_capability),
2014 __le32_to_cpu(ev->ht_cap_info),
2015 __le32_to_cpu(ev->vht_cap_info),
2016 __le32_to_cpu(ev->vht_supp_mcs),
2017 __le32_to_cpu(ev->sys_cap_info),
2018 __le32_to_cpu(ev->num_mem_reqs),
2019 __le32_to_cpu(ev->num_rf_chains));
2020
2021 complete(&ar->wmi.service_ready);
2022 }
2023
2024 static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2025 {
2026 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2027
2028 if (WARN_ON(skb->len < sizeof(*ev)))
2029 return -EINVAL;
2030
2031 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
2032
2033 ath10k_dbg(ATH10K_DBG_WMI,
2034 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
2035 __le32_to_cpu(ev->sw_version),
2036 __le32_to_cpu(ev->abi_version),
2037 ev->mac_addr.addr,
2038 __le32_to_cpu(ev->status));
2039
2040 complete(&ar->wmi.unified_ready);
2041 return 0;
2042 }
2043
2044 static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
2045 {
2046 struct wmi_cmd_hdr *cmd_hdr;
2047 enum wmi_event_id id;
2048 u16 len;
2049
2050 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2051 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2052
2053 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2054 return;
2055
2056 len = skb->len;
2057
2058 trace_ath10k_wmi_event(id, skb->data, skb->len);
2059
2060 switch (id) {
2061 case WMI_MGMT_RX_EVENTID:
2062 ath10k_wmi_event_mgmt_rx(ar, skb);
2063 /* mgmt_rx() owns the skb now! */
2064 return;
2065 case WMI_SCAN_EVENTID:
2066 ath10k_wmi_event_scan(ar, skb);
2067 break;
2068 case WMI_CHAN_INFO_EVENTID:
2069 ath10k_wmi_event_chan_info(ar, skb);
2070 break;
2071 case WMI_ECHO_EVENTID:
2072 ath10k_wmi_event_echo(ar, skb);
2073 break;
2074 case WMI_DEBUG_MESG_EVENTID:
2075 ath10k_wmi_event_debug_mesg(ar, skb);
2076 break;
2077 case WMI_UPDATE_STATS_EVENTID:
2078 ath10k_wmi_event_update_stats(ar, skb);
2079 break;
2080 case WMI_VDEV_START_RESP_EVENTID:
2081 ath10k_wmi_event_vdev_start_resp(ar, skb);
2082 break;
2083 case WMI_VDEV_STOPPED_EVENTID:
2084 ath10k_wmi_event_vdev_stopped(ar, skb);
2085 break;
2086 case WMI_PEER_STA_KICKOUT_EVENTID:
2087 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2088 break;
2089 case WMI_HOST_SWBA_EVENTID:
2090 ath10k_wmi_event_host_swba(ar, skb);
2091 break;
2092 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2093 ath10k_wmi_event_tbttoffset_update(ar, skb);
2094 break;
2095 case WMI_PHYERR_EVENTID:
2096 ath10k_wmi_event_phyerr(ar, skb);
2097 break;
2098 case WMI_ROAM_EVENTID:
2099 ath10k_wmi_event_roam(ar, skb);
2100 break;
2101 case WMI_PROFILE_MATCH:
2102 ath10k_wmi_event_profile_match(ar, skb);
2103 break;
2104 case WMI_DEBUG_PRINT_EVENTID:
2105 ath10k_wmi_event_debug_print(ar, skb);
2106 break;
2107 case WMI_PDEV_QVIT_EVENTID:
2108 ath10k_wmi_event_pdev_qvit(ar, skb);
2109 break;
2110 case WMI_WLAN_PROFILE_DATA_EVENTID:
2111 ath10k_wmi_event_wlan_profile_data(ar, skb);
2112 break;
2113 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2114 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2115 break;
2116 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2117 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2118 break;
2119 case WMI_RTT_ERROR_REPORT_EVENTID:
2120 ath10k_wmi_event_rtt_error_report(ar, skb);
2121 break;
2122 case WMI_WOW_WAKEUP_HOST_EVENTID:
2123 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2124 break;
2125 case WMI_DCS_INTERFERENCE_EVENTID:
2126 ath10k_wmi_event_dcs_interference(ar, skb);
2127 break;
2128 case WMI_PDEV_TPC_CONFIG_EVENTID:
2129 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2130 break;
2131 case WMI_PDEV_FTM_INTG_EVENTID:
2132 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2133 break;
2134 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2135 ath10k_wmi_event_gtk_offload_status(ar, skb);
2136 break;
2137 case WMI_GTK_REKEY_FAIL_EVENTID:
2138 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2139 break;
2140 case WMI_TX_DELBA_COMPLETE_EVENTID:
2141 ath10k_wmi_event_delba_complete(ar, skb);
2142 break;
2143 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2144 ath10k_wmi_event_addba_complete(ar, skb);
2145 break;
2146 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2147 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2148 break;
2149 case WMI_SERVICE_READY_EVENTID:
2150 ath10k_wmi_service_ready_event_rx(ar, skb);
2151 break;
2152 case WMI_READY_EVENTID:
2153 ath10k_wmi_ready_event_rx(ar, skb);
2154 break;
2155 default:
2156 ath10k_warn("Unknown eventid: %d\n", id);
2157 break;
2158 }
2159
2160 dev_kfree_skb(skb);
2161 }
2162
2163 static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2164 {
2165 struct wmi_cmd_hdr *cmd_hdr;
2166 enum wmi_10x_event_id id;
2167 u16 len;
2168
2169 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2170 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2171
2172 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2173 return;
2174
2175 len = skb->len;
2176
2177 trace_ath10k_wmi_event(id, skb->data, skb->len);
2178
2179 switch (id) {
2180 case WMI_10X_MGMT_RX_EVENTID:
2181 ath10k_wmi_event_mgmt_rx(ar, skb);
2182 /* mgmt_rx() owns the skb now! */
2183 return;
2184 case WMI_10X_SCAN_EVENTID:
2185 ath10k_wmi_event_scan(ar, skb);
2186 break;
2187 case WMI_10X_CHAN_INFO_EVENTID:
2188 ath10k_wmi_event_chan_info(ar, skb);
2189 break;
2190 case WMI_10X_ECHO_EVENTID:
2191 ath10k_wmi_event_echo(ar, skb);
2192 break;
2193 case WMI_10X_DEBUG_MESG_EVENTID:
2194 ath10k_wmi_event_debug_mesg(ar, skb);
2195 break;
2196 case WMI_10X_UPDATE_STATS_EVENTID:
2197 ath10k_wmi_event_update_stats(ar, skb);
2198 break;
2199 case WMI_10X_VDEV_START_RESP_EVENTID:
2200 ath10k_wmi_event_vdev_start_resp(ar, skb);
2201 break;
2202 case WMI_10X_VDEV_STOPPED_EVENTID:
2203 ath10k_wmi_event_vdev_stopped(ar, skb);
2204 break;
2205 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2206 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2207 break;
2208 case WMI_10X_HOST_SWBA_EVENTID:
2209 ath10k_wmi_event_host_swba(ar, skb);
2210 break;
2211 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2212 ath10k_wmi_event_tbttoffset_update(ar, skb);
2213 break;
2214 case WMI_10X_PHYERR_EVENTID:
2215 ath10k_wmi_event_phyerr(ar, skb);
2216 break;
2217 case WMI_10X_ROAM_EVENTID:
2218 ath10k_wmi_event_roam(ar, skb);
2219 break;
2220 case WMI_10X_PROFILE_MATCH:
2221 ath10k_wmi_event_profile_match(ar, skb);
2222 break;
2223 case WMI_10X_DEBUG_PRINT_EVENTID:
2224 ath10k_wmi_event_debug_print(ar, skb);
2225 break;
2226 case WMI_10X_PDEV_QVIT_EVENTID:
2227 ath10k_wmi_event_pdev_qvit(ar, skb);
2228 break;
2229 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2230 ath10k_wmi_event_wlan_profile_data(ar, skb);
2231 break;
2232 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2233 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2234 break;
2235 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2236 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2237 break;
2238 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2239 ath10k_wmi_event_rtt_error_report(ar, skb);
2240 break;
2241 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2242 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2243 break;
2244 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2245 ath10k_wmi_event_dcs_interference(ar, skb);
2246 break;
2247 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2248 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2249 break;
2250 case WMI_10X_INST_RSSI_STATS_EVENTID:
2251 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2252 break;
2253 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2254 ath10k_wmi_event_vdev_standby_req(ar, skb);
2255 break;
2256 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2257 ath10k_wmi_event_vdev_resume_req(ar, skb);
2258 break;
2259 case WMI_10X_SERVICE_READY_EVENTID:
2260 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
2261 break;
2262 case WMI_10X_READY_EVENTID:
2263 ath10k_wmi_ready_event_rx(ar, skb);
2264 break;
2265 default:
2266 ath10k_warn("Unknown eventid: %d\n", id);
2267 break;
2268 }
2269
2270 dev_kfree_skb(skb);
2271 }
2272
2273
2274 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2275 {
2276 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2277 ath10k_wmi_10x_process_rx(ar, skb);
2278 else
2279 ath10k_wmi_main_process_rx(ar, skb);
2280 }
2281
2282 /* WMI Initialization functions */
2283 int ath10k_wmi_attach(struct ath10k *ar)
2284 {
2285 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2286 ar->wmi.cmd = &wmi_10x_cmd_map;
2287 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
2288 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
2289 } else {
2290 ar->wmi.cmd = &wmi_cmd_map;
2291 ar->wmi.vdev_param = &wmi_vdev_param_map;
2292 ar->wmi.pdev_param = &wmi_pdev_param_map;
2293 }
2294
2295 init_completion(&ar->wmi.service_ready);
2296 init_completion(&ar->wmi.unified_ready);
2297 init_waitqueue_head(&ar->wmi.tx_credits_wq);
2298
2299 return 0;
2300 }
2301
2302 void ath10k_wmi_detach(struct ath10k *ar)
2303 {
2304 int i;
2305
2306 /* free the host memory chunks requested by firmware */
2307 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2308 dma_free_coherent(ar->dev,
2309 ar->wmi.mem_chunks[i].len,
2310 ar->wmi.mem_chunks[i].vaddr,
2311 ar->wmi.mem_chunks[i].paddr);
2312 }
2313
2314 ar->wmi.num_mem_chunks = 0;
2315 }
2316
2317 int ath10k_wmi_connect_htc_service(struct ath10k *ar)
2318 {
2319 int status;
2320 struct ath10k_htc_svc_conn_req conn_req;
2321 struct ath10k_htc_svc_conn_resp conn_resp;
2322
2323 memset(&conn_req, 0, sizeof(conn_req));
2324 memset(&conn_resp, 0, sizeof(conn_resp));
2325
2326 /* these fields are the same for all service endpoints */
2327 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2328 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
2329 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
2330
2331 /* connect to control service */
2332 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2333
2334 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
2335 if (status) {
2336 ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
2337 status);
2338 return status;
2339 }
2340
2341 ar->wmi.eid = conn_resp.eid;
2342 return 0;
2343 }
2344
2345 int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2346 u16 rd5g, u16 ctl2g, u16 ctl5g)
2347 {
2348 struct wmi_pdev_set_regdomain_cmd *cmd;
2349 struct sk_buff *skb;
2350
2351 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2352 if (!skb)
2353 return -ENOMEM;
2354
2355 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2356 cmd->reg_domain = __cpu_to_le32(rd);
2357 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2358 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2359 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2360 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2361
2362 ath10k_dbg(ATH10K_DBG_WMI,
2363 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2364 rd, rd2g, rd5g, ctl2g, ctl5g);
2365
2366 return ath10k_wmi_cmd_send(ar, skb,
2367 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2368 }
2369
2370 int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2371 const struct wmi_channel_arg *arg)
2372 {
2373 struct wmi_set_channel_cmd *cmd;
2374 struct sk_buff *skb;
2375 u32 ch_flags = 0;
2376
2377 if (arg->passive)
2378 return -EINVAL;
2379
2380 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2381 if (!skb)
2382 return -ENOMEM;
2383
2384 if (arg->chan_radar)
2385 ch_flags |= WMI_CHAN_FLAG_DFS;
2386
2387 cmd = (struct wmi_set_channel_cmd *)skb->data;
2388 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2389 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2390 cmd->chan.mode = arg->mode;
2391 cmd->chan.flags |= __cpu_to_le32(ch_flags);
2392 cmd->chan.min_power = arg->min_power;
2393 cmd->chan.max_power = arg->max_power;
2394 cmd->chan.reg_power = arg->max_reg_power;
2395 cmd->chan.reg_classid = arg->reg_class_id;
2396 cmd->chan.antenna_max = arg->max_antenna_gain;
2397
2398 ath10k_dbg(ATH10K_DBG_WMI,
2399 "wmi set channel mode %d freq %d\n",
2400 arg->mode, arg->freq);
2401
2402 return ath10k_wmi_cmd_send(ar, skb,
2403 ar->wmi.cmd->pdev_set_channel_cmdid);
2404 }
2405
2406 int ath10k_wmi_pdev_suspend_target(struct ath10k *ar)
2407 {
2408 struct wmi_pdev_suspend_cmd *cmd;
2409 struct sk_buff *skb;
2410
2411 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2412 if (!skb)
2413 return -ENOMEM;
2414
2415 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
2416 cmd->suspend_opt = WMI_PDEV_SUSPEND;
2417
2418 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
2419 }
2420
2421 int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2422 {
2423 struct sk_buff *skb;
2424
2425 skb = ath10k_wmi_alloc_skb(0);
2426 if (skb == NULL)
2427 return -ENOMEM;
2428
2429 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
2430 }
2431
2432 int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
2433 {
2434 struct wmi_pdev_set_param_cmd *cmd;
2435 struct sk_buff *skb;
2436
2437 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
2438 ath10k_warn("pdev param %d not supported by firmware\n", id);
2439 return -EOPNOTSUPP;
2440 }
2441
2442 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2443 if (!skb)
2444 return -ENOMEM;
2445
2446 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2447 cmd->param_id = __cpu_to_le32(id);
2448 cmd->param_value = __cpu_to_le32(value);
2449
2450 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
2451 id, value);
2452 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
2453 }
2454
2455 static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
2456 {
2457 struct wmi_init_cmd *cmd;
2458 struct sk_buff *buf;
2459 struct wmi_resource_config config = {};
2460 u32 len, val;
2461 int i;
2462
2463 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2464 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2465 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2466
2467 config.num_offload_reorder_bufs =
2468 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2469
2470 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2471 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2472 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2473 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2474 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2475 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2476 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2477 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2478 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2479 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2480
2481 config.scan_max_pending_reqs =
2482 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2483
2484 config.bmiss_offload_max_vdev =
2485 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2486
2487 config.roam_offload_max_vdev =
2488 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2489
2490 config.roam_offload_max_ap_profiles =
2491 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2492
2493 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
2494 config.num_mcast_table_elems =
2495 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
2496
2497 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
2498 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
2499 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
2500 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
2501 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
2502
2503 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2504 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2505
2506 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
2507
2508 config.gtk_offload_max_vdev =
2509 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
2510
2511 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
2512 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
2513
2514 len = sizeof(*cmd) +
2515 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2516
2517 buf = ath10k_wmi_alloc_skb(len);
2518 if (!buf)
2519 return -ENOMEM;
2520
2521 cmd = (struct wmi_init_cmd *)buf->data;
2522
2523 if (ar->wmi.num_mem_chunks == 0) {
2524 cmd->num_host_mem_chunks = 0;
2525 goto out;
2526 }
2527
2528 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
2529 ar->wmi.num_mem_chunks);
2530
2531 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2532
2533 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2534 cmd->host_mem_chunks[i].ptr =
2535 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2536 cmd->host_mem_chunks[i].size =
2537 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2538 cmd->host_mem_chunks[i].req_id =
2539 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2540
2541 ath10k_dbg(ATH10K_DBG_WMI,
2542 "wmi chunk %d len %d requested, addr 0x%llx\n",
2543 i,
2544 ar->wmi.mem_chunks[i].len,
2545 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
2546 }
2547 out:
2548 memcpy(&cmd->resource_config, &config, sizeof(config));
2549
2550 ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
2551 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2552 }
2553
2554 static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
2555 {
2556 struct wmi_init_cmd_10x *cmd;
2557 struct sk_buff *buf;
2558 struct wmi_resource_config_10x config = {};
2559 u32 len, val;
2560 int i;
2561
2562 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
2563 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
2564 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
2565 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
2566 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
2567 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
2568 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
2569 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2570 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2571 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2572 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
2573 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
2574
2575 config.scan_max_pending_reqs =
2576 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
2577
2578 config.bmiss_offload_max_vdev =
2579 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
2580
2581 config.roam_offload_max_vdev =
2582 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
2583
2584 config.roam_offload_max_ap_profiles =
2585 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
2586
2587 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
2588 config.num_mcast_table_elems =
2589 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
2590
2591 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
2592 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
2593 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
2594 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
2595 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
2596
2597 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2598 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2599
2600 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
2601
2602 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
2603 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
2604
2605 len = sizeof(*cmd) +
2606 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2607
2608 buf = ath10k_wmi_alloc_skb(len);
2609 if (!buf)
2610 return -ENOMEM;
2611
2612 cmd = (struct wmi_init_cmd_10x *)buf->data;
2613
2614 if (ar->wmi.num_mem_chunks == 0) {
2615 cmd->num_host_mem_chunks = 0;
2616 goto out;
2617 }
2618
2619 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
2620 ar->wmi.num_mem_chunks);
2621
2622 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2623
2624 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2625 cmd->host_mem_chunks[i].ptr =
2626 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2627 cmd->host_mem_chunks[i].size =
2628 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2629 cmd->host_mem_chunks[i].req_id =
2630 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2631
2632 ath10k_dbg(ATH10K_DBG_WMI,
2633 "wmi chunk %d len %d requested, addr 0x%llx\n",
2634 i,
2635 ar->wmi.mem_chunks[i].len,
2636 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
2637 }
2638 out:
2639 memcpy(&cmd->resource_config, &config, sizeof(config));
2640
2641 ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
2642 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2643 }
2644
2645 int ath10k_wmi_cmd_init(struct ath10k *ar)
2646 {
2647 int ret;
2648
2649 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2650 ret = ath10k_wmi_10x_cmd_init(ar);
2651 else
2652 ret = ath10k_wmi_main_cmd_init(ar);
2653
2654 return ret;
2655 }
2656
2657 static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
2658 const struct wmi_start_scan_arg *arg)
2659 {
2660 int len;
2661
2662 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2663 len = sizeof(struct wmi_start_scan_cmd_10x);
2664 else
2665 len = sizeof(struct wmi_start_scan_cmd);
2666
2667 if (arg->ie_len) {
2668 if (!arg->ie)
2669 return -EINVAL;
2670 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
2671 return -EINVAL;
2672
2673 len += sizeof(struct wmi_ie_data);
2674 len += roundup(arg->ie_len, 4);
2675 }
2676
2677 if (arg->n_channels) {
2678 if (!arg->channels)
2679 return -EINVAL;
2680 if (arg->n_channels > ARRAY_SIZE(arg->channels))
2681 return -EINVAL;
2682
2683 len += sizeof(struct wmi_chan_list);
2684 len += sizeof(__le32) * arg->n_channels;
2685 }
2686
2687 if (arg->n_ssids) {
2688 if (!arg->ssids)
2689 return -EINVAL;
2690 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
2691 return -EINVAL;
2692
2693 len += sizeof(struct wmi_ssid_list);
2694 len += sizeof(struct wmi_ssid) * arg->n_ssids;
2695 }
2696
2697 if (arg->n_bssids) {
2698 if (!arg->bssids)
2699 return -EINVAL;
2700 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
2701 return -EINVAL;
2702
2703 len += sizeof(struct wmi_bssid_list);
2704 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2705 }
2706
2707 return len;
2708 }
2709
2710 int ath10k_wmi_start_scan(struct ath10k *ar,
2711 const struct wmi_start_scan_arg *arg)
2712 {
2713 struct wmi_start_scan_cmd *cmd;
2714 struct sk_buff *skb;
2715 struct wmi_ie_data *ie;
2716 struct wmi_chan_list *channels;
2717 struct wmi_ssid_list *ssids;
2718 struct wmi_bssid_list *bssids;
2719 u32 scan_id;
2720 u32 scan_req_id;
2721 int off;
2722 int len = 0;
2723 int i;
2724
2725 len = ath10k_wmi_start_scan_calc_len(ar, arg);
2726 if (len < 0)
2727 return len; /* len contains error code here */
2728
2729 skb = ath10k_wmi_alloc_skb(len);
2730 if (!skb)
2731 return -ENOMEM;
2732
2733 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
2734 scan_id |= arg->scan_id;
2735
2736 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2737 scan_req_id |= arg->scan_req_id;
2738
2739 cmd = (struct wmi_start_scan_cmd *)skb->data;
2740 cmd->scan_id = __cpu_to_le32(scan_id);
2741 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
2742 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2743 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
2744 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
2745 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
2746 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
2747 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
2748 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
2749 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
2750 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
2751 cmd->idle_time = __cpu_to_le32(arg->idle_time);
2752 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
2753 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
2754 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
2755
2756 /* TLV list starts after fields included in the struct */
2757 /* There's just one filed that differes the two start_scan
2758 * structures - burst_duration, which we are not using btw,
2759 no point to make the split here, just shift the buffer to fit with
2760 given FW */
2761 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2762 off = sizeof(struct wmi_start_scan_cmd_10x);
2763 else
2764 off = sizeof(struct wmi_start_scan_cmd);
2765
2766 if (arg->n_channels) {
2767 channels = (void *)skb->data + off;
2768 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
2769 channels->num_chan = __cpu_to_le32(arg->n_channels);
2770
2771 for (i = 0; i < arg->n_channels; i++)
2772 channels->channel_list[i] =
2773 __cpu_to_le32(arg->channels[i]);
2774
2775 off += sizeof(*channels);
2776 off += sizeof(__le32) * arg->n_channels;
2777 }
2778
2779 if (arg->n_ssids) {
2780 ssids = (void *)skb->data + off;
2781 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
2782 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
2783
2784 for (i = 0; i < arg->n_ssids; i++) {
2785 ssids->ssids[i].ssid_len =
2786 __cpu_to_le32(arg->ssids[i].len);
2787 memcpy(&ssids->ssids[i].ssid,
2788 arg->ssids[i].ssid,
2789 arg->ssids[i].len);
2790 }
2791
2792 off += sizeof(*ssids);
2793 off += sizeof(struct wmi_ssid) * arg->n_ssids;
2794 }
2795
2796 if (arg->n_bssids) {
2797 bssids = (void *)skb->data + off;
2798 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
2799 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
2800
2801 for (i = 0; i < arg->n_bssids; i++)
2802 memcpy(&bssids->bssid_list[i],
2803 arg->bssids[i].bssid,
2804 ETH_ALEN);
2805
2806 off += sizeof(*bssids);
2807 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2808 }
2809
2810 if (arg->ie_len) {
2811 ie = (void *)skb->data + off;
2812 ie->tag = __cpu_to_le32(WMI_IE_TAG);
2813 ie->ie_len = __cpu_to_le32(arg->ie_len);
2814 memcpy(ie->ie_data, arg->ie, arg->ie_len);
2815
2816 off += sizeof(*ie);
2817 off += roundup(arg->ie_len, 4);
2818 }
2819
2820 if (off != skb->len) {
2821 dev_kfree_skb(skb);
2822 return -EINVAL;
2823 }
2824
2825 ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
2826 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
2827 }
2828
2829 void ath10k_wmi_start_scan_init(struct ath10k *ar,
2830 struct wmi_start_scan_arg *arg)
2831 {
2832 /* setup commonly used values */
2833 arg->scan_req_id = 1;
2834 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2835 arg->dwell_time_active = 50;
2836 arg->dwell_time_passive = 150;
2837 arg->min_rest_time = 50;
2838 arg->max_rest_time = 500;
2839 arg->repeat_probe_time = 0;
2840 arg->probe_spacing_time = 0;
2841 arg->idle_time = 0;
2842 arg->max_scan_time = 20000;
2843 arg->probe_delay = 5;
2844 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
2845 | WMI_SCAN_EVENT_COMPLETED
2846 | WMI_SCAN_EVENT_BSS_CHANNEL
2847 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
2848 | WMI_SCAN_EVENT_DEQUEUED;
2849 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
2850 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2851 arg->n_bssids = 1;
2852 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
2853 }
2854
2855 int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
2856 {
2857 struct wmi_stop_scan_cmd *cmd;
2858 struct sk_buff *skb;
2859 u32 scan_id;
2860 u32 req_id;
2861
2862 if (arg->req_id > 0xFFF)
2863 return -EINVAL;
2864 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
2865 return -EINVAL;
2866
2867 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2868 if (!skb)
2869 return -ENOMEM;
2870
2871 scan_id = arg->u.scan_id;
2872 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
2873
2874 req_id = arg->req_id;
2875 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2876
2877 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2878 cmd->req_type = __cpu_to_le32(arg->req_type);
2879 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
2880 cmd->scan_id = __cpu_to_le32(scan_id);
2881 cmd->scan_req_id = __cpu_to_le32(req_id);
2882
2883 ath10k_dbg(ATH10K_DBG_WMI,
2884 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
2885 arg->req_id, arg->req_type, arg->u.scan_id);
2886 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
2887 }
2888
2889 int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
2890 enum wmi_vdev_type type,
2891 enum wmi_vdev_subtype subtype,
2892 const u8 macaddr[ETH_ALEN])
2893 {
2894 struct wmi_vdev_create_cmd *cmd;
2895 struct sk_buff *skb;
2896
2897 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2898 if (!skb)
2899 return -ENOMEM;
2900
2901 cmd = (struct wmi_vdev_create_cmd *)skb->data;
2902 cmd->vdev_id = __cpu_to_le32(vdev_id);
2903 cmd->vdev_type = __cpu_to_le32(type);
2904 cmd->vdev_subtype = __cpu_to_le32(subtype);
2905 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
2906
2907 ath10k_dbg(ATH10K_DBG_WMI,
2908 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
2909 vdev_id, type, subtype, macaddr);
2910
2911 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
2912 }
2913
2914 int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
2915 {
2916 struct wmi_vdev_delete_cmd *cmd;
2917 struct sk_buff *skb;
2918
2919 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2920 if (!skb)
2921 return -ENOMEM;
2922
2923 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
2924 cmd->vdev_id = __cpu_to_le32(vdev_id);
2925
2926 ath10k_dbg(ATH10K_DBG_WMI,
2927 "WMI vdev delete id %d\n", vdev_id);
2928
2929 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
2930 }
2931
2932 static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
2933 const struct wmi_vdev_start_request_arg *arg,
2934 u32 cmd_id)
2935 {
2936 struct wmi_vdev_start_request_cmd *cmd;
2937 struct sk_buff *skb;
2938 const char *cmdname;
2939 u32 flags = 0;
2940 u32 ch_flags = 0;
2941
2942 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
2943 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
2944 return -EINVAL;
2945 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
2946 return -EINVAL;
2947 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
2948 return -EINVAL;
2949 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
2950 return -EINVAL;
2951
2952 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
2953 cmdname = "start";
2954 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
2955 cmdname = "restart";
2956 else
2957 return -EINVAL; /* should not happen, we already check cmd_id */
2958
2959 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2960 if (!skb)
2961 return -ENOMEM;
2962
2963 if (arg->hidden_ssid)
2964 flags |= WMI_VDEV_START_HIDDEN_SSID;
2965 if (arg->pmf_enabled)
2966 flags |= WMI_VDEV_START_PMF_ENABLED;
2967 if (arg->channel.chan_radar)
2968 ch_flags |= WMI_CHAN_FLAG_DFS;
2969
2970 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
2971 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2972 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
2973 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
2974 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
2975 cmd->flags = __cpu_to_le32(flags);
2976 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
2977 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
2978
2979 if (arg->ssid) {
2980 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
2981 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
2982 }
2983
2984 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
2985
2986 cmd->chan.band_center_freq1 =
2987 __cpu_to_le32(arg->channel.band_center_freq1);
2988
2989 cmd->chan.mode = arg->channel.mode;
2990 cmd->chan.flags |= __cpu_to_le32(ch_flags);
2991 cmd->chan.min_power = arg->channel.min_power;
2992 cmd->chan.max_power = arg->channel.max_power;
2993 cmd->chan.reg_power = arg->channel.max_reg_power;
2994 cmd->chan.reg_classid = arg->channel.reg_class_id;
2995 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
2996
2997 ath10k_dbg(ATH10K_DBG_WMI,
2998 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
2999 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
3000 flags, arg->channel.freq, arg->channel.mode,
3001 cmd->chan.flags, arg->channel.max_power);
3002
3003 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3004 }
3005
3006 int ath10k_wmi_vdev_start(struct ath10k *ar,
3007 const struct wmi_vdev_start_request_arg *arg)
3008 {
3009 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3010
3011 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
3012 }
3013
3014 int ath10k_wmi_vdev_restart(struct ath10k *ar,
3015 const struct wmi_vdev_start_request_arg *arg)
3016 {
3017 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3018
3019 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
3020 }
3021
3022 int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3023 {
3024 struct wmi_vdev_stop_cmd *cmd;
3025 struct sk_buff *skb;
3026
3027 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3028 if (!skb)
3029 return -ENOMEM;
3030
3031 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3032 cmd->vdev_id = __cpu_to_le32(vdev_id);
3033
3034 ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
3035
3036 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
3037 }
3038
3039 int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3040 {
3041 struct wmi_vdev_up_cmd *cmd;
3042 struct sk_buff *skb;
3043
3044 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3045 if (!skb)
3046 return -ENOMEM;
3047
3048 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3049 cmd->vdev_id = __cpu_to_le32(vdev_id);
3050 cmd->vdev_assoc_id = __cpu_to_le32(aid);
3051 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
3052
3053 ath10k_dbg(ATH10K_DBG_WMI,
3054 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3055 vdev_id, aid, bssid);
3056
3057 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
3058 }
3059
3060 int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3061 {
3062 struct wmi_vdev_down_cmd *cmd;
3063 struct sk_buff *skb;
3064
3065 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3066 if (!skb)
3067 return -ENOMEM;
3068
3069 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3070 cmd->vdev_id = __cpu_to_le32(vdev_id);
3071
3072 ath10k_dbg(ATH10K_DBG_WMI,
3073 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3074
3075 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
3076 }
3077
3078 int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
3079 u32 param_id, u32 param_value)
3080 {
3081 struct wmi_vdev_set_param_cmd *cmd;
3082 struct sk_buff *skb;
3083
3084 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
3085 ath10k_dbg(ATH10K_DBG_WMI,
3086 "vdev param %d not supported by firmware\n",
3087 param_id);
3088 return -EOPNOTSUPP;
3089 }
3090
3091 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3092 if (!skb)
3093 return -ENOMEM;
3094
3095 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3096 cmd->vdev_id = __cpu_to_le32(vdev_id);
3097 cmd->param_id = __cpu_to_le32(param_id);
3098 cmd->param_value = __cpu_to_le32(param_value);
3099
3100 ath10k_dbg(ATH10K_DBG_WMI,
3101 "wmi vdev id 0x%x set param %d value %d\n",
3102 vdev_id, param_id, param_value);
3103
3104 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
3105 }
3106
3107 int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3108 const struct wmi_vdev_install_key_arg *arg)
3109 {
3110 struct wmi_vdev_install_key_cmd *cmd;
3111 struct sk_buff *skb;
3112
3113 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3114 return -EINVAL;
3115 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3116 return -EINVAL;
3117
3118 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
3119 if (!skb)
3120 return -ENOMEM;
3121
3122 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3123 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3124 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3125 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3126 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3127 cmd->key_len = __cpu_to_le32(arg->key_len);
3128 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3129 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3130
3131 if (arg->macaddr)
3132 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
3133 if (arg->key_data)
3134 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3135
3136 ath10k_dbg(ATH10K_DBG_WMI,
3137 "wmi vdev install key idx %d cipher %d len %d\n",
3138 arg->key_idx, arg->key_cipher, arg->key_len);
3139 return ath10k_wmi_cmd_send(ar, skb,
3140 ar->wmi.cmd->vdev_install_key_cmdid);
3141 }
3142
3143 int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3144 const u8 peer_addr[ETH_ALEN])
3145 {
3146 struct wmi_peer_create_cmd *cmd;
3147 struct sk_buff *skb;
3148
3149 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3150 if (!skb)
3151 return -ENOMEM;
3152
3153 cmd = (struct wmi_peer_create_cmd *)skb->data;
3154 cmd->vdev_id = __cpu_to_le32(vdev_id);
3155 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3156
3157 ath10k_dbg(ATH10K_DBG_WMI,
3158 "wmi peer create vdev_id %d peer_addr %pM\n",
3159 vdev_id, peer_addr);
3160 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
3161 }
3162
3163 int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3164 const u8 peer_addr[ETH_ALEN])
3165 {
3166 struct wmi_peer_delete_cmd *cmd;
3167 struct sk_buff *skb;
3168
3169 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3170 if (!skb)
3171 return -ENOMEM;
3172
3173 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3174 cmd->vdev_id = __cpu_to_le32(vdev_id);
3175 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3176
3177 ath10k_dbg(ATH10K_DBG_WMI,
3178 "wmi peer delete vdev_id %d peer_addr %pM\n",
3179 vdev_id, peer_addr);
3180 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
3181 }
3182
3183 int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3184 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3185 {
3186 struct wmi_peer_flush_tids_cmd *cmd;
3187 struct sk_buff *skb;
3188
3189 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3190 if (!skb)
3191 return -ENOMEM;
3192
3193 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3194 cmd->vdev_id = __cpu_to_le32(vdev_id);
3195 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
3196 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3197
3198 ath10k_dbg(ATH10K_DBG_WMI,
3199 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3200 vdev_id, peer_addr, tid_bitmap);
3201 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
3202 }
3203
3204 int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3205 const u8 *peer_addr, enum wmi_peer_param param_id,
3206 u32 param_value)
3207 {
3208 struct wmi_peer_set_param_cmd *cmd;
3209 struct sk_buff *skb;
3210
3211 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3212 if (!skb)
3213 return -ENOMEM;
3214
3215 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3216 cmd->vdev_id = __cpu_to_le32(vdev_id);
3217 cmd->param_id = __cpu_to_le32(param_id);
3218 cmd->param_value = __cpu_to_le32(param_value);
3219 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3220
3221 ath10k_dbg(ATH10K_DBG_WMI,
3222 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3223 vdev_id, peer_addr, param_id, param_value);
3224
3225 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
3226 }
3227
3228 int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3229 enum wmi_sta_ps_mode psmode)
3230 {
3231 struct wmi_sta_powersave_mode_cmd *cmd;
3232 struct sk_buff *skb;
3233
3234 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3235 if (!skb)
3236 return -ENOMEM;
3237
3238 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3239 cmd->vdev_id = __cpu_to_le32(vdev_id);
3240 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3241
3242 ath10k_dbg(ATH10K_DBG_WMI,
3243 "wmi set powersave id 0x%x mode %d\n",
3244 vdev_id, psmode);
3245
3246 return ath10k_wmi_cmd_send(ar, skb,
3247 ar->wmi.cmd->sta_powersave_mode_cmdid);
3248 }
3249
3250 int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3251 enum wmi_sta_powersave_param param_id,
3252 u32 value)
3253 {
3254 struct wmi_sta_powersave_param_cmd *cmd;
3255 struct sk_buff *skb;
3256
3257 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3258 if (!skb)
3259 return -ENOMEM;
3260
3261 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3262 cmd->vdev_id = __cpu_to_le32(vdev_id);
3263 cmd->param_id = __cpu_to_le32(param_id);
3264 cmd->param_value = __cpu_to_le32(value);
3265
3266 ath10k_dbg(ATH10K_DBG_WMI,
3267 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3268 vdev_id, param_id, value);
3269 return ath10k_wmi_cmd_send(ar, skb,
3270 ar->wmi.cmd->sta_powersave_param_cmdid);
3271 }
3272
3273 int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3274 enum wmi_ap_ps_peer_param param_id, u32 value)
3275 {
3276 struct wmi_ap_ps_peer_cmd *cmd;
3277 struct sk_buff *skb;
3278
3279 if (!mac)
3280 return -EINVAL;
3281
3282 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3283 if (!skb)
3284 return -ENOMEM;
3285
3286 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3287 cmd->vdev_id = __cpu_to_le32(vdev_id);
3288 cmd->param_id = __cpu_to_le32(param_id);
3289 cmd->param_value = __cpu_to_le32(value);
3290 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
3291
3292 ath10k_dbg(ATH10K_DBG_WMI,
3293 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3294 vdev_id, param_id, value, mac);
3295
3296 return ath10k_wmi_cmd_send(ar, skb,
3297 ar->wmi.cmd->ap_ps_peer_param_cmdid);
3298 }
3299
3300 int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3301 const struct wmi_scan_chan_list_arg *arg)
3302 {
3303 struct wmi_scan_chan_list_cmd *cmd;
3304 struct sk_buff *skb;
3305 struct wmi_channel_arg *ch;
3306 struct wmi_channel *ci;
3307 int len;
3308 int i;
3309
3310 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3311
3312 skb = ath10k_wmi_alloc_skb(len);
3313 if (!skb)
3314 return -EINVAL;
3315
3316 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3317 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3318
3319 for (i = 0; i < arg->n_channels; i++) {
3320 u32 flags = 0;
3321
3322 ch = &arg->channels[i];
3323 ci = &cmd->chan_info[i];
3324
3325 if (ch->passive)
3326 flags |= WMI_CHAN_FLAG_PASSIVE;
3327 if (ch->allow_ibss)
3328 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3329 if (ch->allow_ht)
3330 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3331 if (ch->allow_vht)
3332 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3333 if (ch->ht40plus)
3334 flags |= WMI_CHAN_FLAG_HT40_PLUS;
3335 if (ch->chan_radar)
3336 flags |= WMI_CHAN_FLAG_DFS;
3337
3338 ci->mhz = __cpu_to_le32(ch->freq);
3339 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3340 ci->band_center_freq2 = 0;
3341 ci->min_power = ch->min_power;
3342 ci->max_power = ch->max_power;
3343 ci->reg_power = ch->max_reg_power;
3344 ci->antenna_max = ch->max_antenna_gain;
3345 ci->antenna_max = 0;
3346
3347 /* mode & flags share storage */
3348 ci->mode = ch->mode;
3349 ci->flags |= __cpu_to_le32(flags);
3350 }
3351
3352 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
3353 }
3354
3355 int ath10k_wmi_peer_assoc(struct ath10k *ar,
3356 const struct wmi_peer_assoc_complete_arg *arg)
3357 {
3358 struct wmi_peer_assoc_complete_cmd *cmd;
3359 struct sk_buff *skb;
3360
3361 if (arg->peer_mpdu_density > 16)
3362 return -EINVAL;
3363 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
3364 return -EINVAL;
3365 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
3366 return -EINVAL;
3367
3368 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3369 if (!skb)
3370 return -ENOMEM;
3371
3372 cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
3373 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3374 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
3375 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
3376 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
3377 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
3378 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
3379 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
3380 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
3381 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
3382 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
3383 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
3384 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
3385 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
3386
3387 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
3388
3389 cmd->peer_legacy_rates.num_rates =
3390 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
3391 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
3392 arg->peer_legacy_rates.num_rates);
3393
3394 cmd->peer_ht_rates.num_rates =
3395 __cpu_to_le32(arg->peer_ht_rates.num_rates);
3396 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
3397 arg->peer_ht_rates.num_rates);
3398
3399 cmd->peer_vht_rates.rx_max_rate =
3400 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
3401 cmd->peer_vht_rates.rx_mcs_set =
3402 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
3403 cmd->peer_vht_rates.tx_max_rate =
3404 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
3405 cmd->peer_vht_rates.tx_mcs_set =
3406 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
3407
3408 ath10k_dbg(ATH10K_DBG_WMI,
3409 "wmi peer assoc vdev %d addr %pM\n",
3410 arg->vdev_id, arg->addr);
3411 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
3412 }
3413
3414 int ath10k_wmi_beacon_send_nowait(struct ath10k *ar,
3415 const struct wmi_bcn_tx_arg *arg)
3416 {
3417 struct wmi_bcn_tx_cmd *cmd;
3418 struct sk_buff *skb;
3419 int ret;
3420
3421 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->bcn_len);
3422 if (!skb)
3423 return -ENOMEM;
3424
3425 cmd = (struct wmi_bcn_tx_cmd *)skb->data;
3426 cmd->hdr.vdev_id = __cpu_to_le32(arg->vdev_id);
3427 cmd->hdr.tx_rate = __cpu_to_le32(arg->tx_rate);
3428 cmd->hdr.tx_power = __cpu_to_le32(arg->tx_power);
3429 cmd->hdr.bcn_len = __cpu_to_le32(arg->bcn_len);
3430 memcpy(cmd->bcn, arg->bcn, arg->bcn_len);
3431
3432 ret = ath10k_wmi_cmd_send_nowait(ar, skb, ar->wmi.cmd->bcn_tx_cmdid);
3433 if (ret)
3434 dev_kfree_skb(skb);
3435
3436 return ret;
3437 }
3438
3439 static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
3440 const struct wmi_wmm_params_arg *arg)
3441 {
3442 params->cwmin = __cpu_to_le32(arg->cwmin);
3443 params->cwmax = __cpu_to_le32(arg->cwmax);
3444 params->aifs = __cpu_to_le32(arg->aifs);
3445 params->txop = __cpu_to_le32(arg->txop);
3446 params->acm = __cpu_to_le32(arg->acm);
3447 params->no_ack = __cpu_to_le32(arg->no_ack);
3448 }
3449
3450 int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
3451 const struct wmi_pdev_set_wmm_params_arg *arg)
3452 {
3453 struct wmi_pdev_set_wmm_params *cmd;
3454 struct sk_buff *skb;
3455
3456 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3457 if (!skb)
3458 return -ENOMEM;
3459
3460 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
3461 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
3462 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
3463 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
3464 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
3465
3466 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
3467 return ath10k_wmi_cmd_send(ar, skb,
3468 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
3469 }
3470
3471 int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
3472 {
3473 struct wmi_request_stats_cmd *cmd;
3474 struct sk_buff *skb;
3475
3476 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3477 if (!skb)
3478 return -ENOMEM;
3479
3480 cmd = (struct wmi_request_stats_cmd *)skb->data;
3481 cmd->stats_id = __cpu_to_le32(stats_id);
3482
3483 ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
3484 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
3485 }
3486
3487 int ath10k_wmi_force_fw_hang(struct ath10k *ar,
3488 enum wmi_force_fw_hang_type type, u32 delay_ms)
3489 {
3490 struct wmi_force_fw_hang_cmd *cmd;
3491 struct sk_buff *skb;
3492
3493 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3494 if (!skb)
3495 return -ENOMEM;
3496
3497 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
3498 cmd->type = __cpu_to_le32(type);
3499 cmd->delay_ms = __cpu_to_le32(delay_ms);
3500
3501 ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
3502 type, delay_ms);
3503 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
3504 }
3505
3506 int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
3507 {
3508 struct wmi_dbglog_cfg_cmd *cmd;
3509 struct sk_buff *skb;
3510 u32 cfg;
3511
3512 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3513 if (!skb)
3514 return -ENOMEM;
3515
3516 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
3517
3518 if (module_enable) {
3519 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
3520 ATH10K_DBGLOG_CFG_LOG_LVL);
3521 } else {
3522 /* set back defaults, all modules with WARN level */
3523 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
3524 ATH10K_DBGLOG_CFG_LOG_LVL);
3525 module_enable = ~0;
3526 }
3527
3528 cmd->module_enable = __cpu_to_le32(module_enable);
3529 cmd->module_valid = __cpu_to_le32(~0);
3530 cmd->config_enable = __cpu_to_le32(cfg);
3531 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
3532
3533 ath10k_dbg(ATH10K_DBG_WMI,
3534 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
3535 __le32_to_cpu(cmd->module_enable),
3536 __le32_to_cpu(cmd->module_valid),
3537 __le32_to_cpu(cmd->config_enable),
3538 __le32_to_cpu(cmd->config_valid));
3539
3540 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
3541 }
Linux with added FPC-III support