fix a kmap leak in virtio_console
[linux/fpc-iii.git] / drivers / staging / bcm / Macros.h
blobdc01e3016d4fc7e5f5db734f5ae81db324e85a96
1 /*************************************
2 * Macros.h
3 **************************************/
4 #ifndef __MACROS_H__
5 #define __MACROS_H__
7 #define TX_TIMER_PERIOD 10 /*10 msec*/
8 #define MAX_CLASSIFIERS 100
9 #define MAX_TARGET_DSX_BUFFERS 24
11 #define MAX_CNTRL_PKTS 100
12 #define MAX_DATA_PKTS 200
13 #define MAX_ETH_SIZE 1536
14 #define MAX_CNTL_PKT_SIZE 2048
16 #define MTU_SIZE 1400
17 #define TX_QLEN 5
19 #define MAC_ADDR_REGISTER 0xbf60d000
22 /* Quality of Service */
23 #define NO_OF_QUEUES 17
24 #define HiPriority (NO_OF_QUEUES-1)
25 #define LowPriority 0
26 #define BE 2
27 #define rtPS 4
28 #define ERTPS 5
29 #define UGS 6
31 #define BE_BUCKET_SIZE (1024*1024*100) /* 32kb */
32 #define rtPS_BUCKET_SIZE (1024*1024*100) /* 8kb */
33 #define MAX_ALLOWED_RATE (1024*1024*100)
34 #define TX_PACKET_THRESHOLD 10
35 #define XSECONDS (1*HZ)
36 #define DSC_ACTIVATE_REQUEST 248
37 #define QUEUE_DEPTH_OFFSET 0x1fc01000
38 #define MAX_DEVICE_DESC_SIZE 2040
39 #define MAX_CTRL_QUEUE_LEN 100
40 #define MAX_APP_QUEUE_LEN 200
41 #define MAX_LATENCY_ALLOWED 0xFFFFFFFF
42 #define DEFAULT_UG_INTERVAL 250
43 #define DEFAULT_UGI_FACTOR 4
45 #define DEFAULT_PERSFCOUNT 60
46 #define MAX_CONNECTIONS 10
47 #define MAX_CLASS_NAME_LENGTH 32
49 #define ETH_LENGTH_OF_ADDRESS 6
50 #define MAX_MULTICAST_ADDRESSES 32
51 #define IP_LENGTH_OF_ADDRESS 4
53 #define IP_PACKET_ONLY_MODE 0
54 #define ETH_PACKET_TUNNELING_MODE 1
56 /* Link Request */
57 #define SET_MAC_ADDRESS_REQUEST 0
58 #define SYNC_UP_REQUEST 1
59 #define SYNCED_UP 2
60 #define LINK_UP_REQUEST 3
61 #define LINK_CONNECTED 4
62 #define SYNC_UP_NOTIFICATION 2
63 #define LINK_UP_NOTIFICATION 4
66 #define LINK_NET_ENTRY 0x0002
67 #define HMC_STATUS 0x0004
68 #define LINK_UP_CONTROL_REQ 0x83
70 #define STATS_POINTER_REQ_STATUS 0x86
71 #define NETWORK_ENTRY_REQ_PAYLOAD 198
72 #define LINK_DOWN_REQ_PAYLOAD 226
73 #define SYNC_UP_REQ_PAYLOAD 228
74 #define STATISTICS_POINTER_REQ 237
75 #define LINK_UP_REQ_PAYLOAD 245
76 #define LINK_UP_ACK 246
78 #define STATS_MSG_SIZE 4
79 #define INDEX_TO_DATA 4
81 #define GO_TO_IDLE_MODE_PAYLOAD 210
82 #define COME_UP_FROM_IDLE_MODE_PAYLOAD 211
83 #define IDLE_MODE_SF_UPDATE_MSG 187
85 #define SKB_RESERVE_ETHERNET_HEADER 16
86 #define SKB_RESERVE_PHS_BYTES 32
88 #define IP_PACKET_ONLY_MODE 0
89 #define ETH_PACKET_TUNNELING_MODE 1
91 #define ETH_CS_802_3 1
92 #define ETH_CS_802_1Q_VLAN 3
93 #define IPV4_CS 1
94 #define IPV6_CS 2
95 #define ETH_CS_MASK 0x3f
97 /** \brief Validity bit maps for TLVs in packet classification rule */
99 #define PKT_CLASSIFICATION_USER_PRIORITY_VALID 0
100 #define PKT_CLASSIFICATION_VLANID_VALID 1
102 #ifndef MIN
103 #define MIN(_a, _b) ((_a) < (_b) ? (_a) : (_b))
104 #endif
107 /*Leader related terms */
108 #define LEADER_STATUS 0x00
109 #define LEADER_STATUS_TCP_ACK 0x1
110 #define LEADER_SIZE sizeof(struct bcm_leader)
111 #define MAC_ADDR_REQ_SIZE sizeof(struct bcm_packettosend)
112 #define SS_INFO_REQ_SIZE sizeof(struct bcm_packettosend)
113 #define CM_REQUEST_SIZE (LEADER_SIZE + sizeof(stLocalSFChangeRequest))
114 #define IDLE_REQ_SIZE sizeof(struct bcm_packettosend)
117 #define MAX_TRANSFER_CTRL_BYTE_USB (2*1024)
119 #define GET_MAILBOX1_REG_REQUEST 0x87
120 #define GET_MAILBOX1_REG_RESPONSE 0x67
121 #define VCID_CONTROL_PACKET 0x00
123 #define TRANSMIT_NETWORK_DATA 0x00
124 #define RECEIVED_NETWORK_DATA 0x20
126 #define CM_RESPONSES 0xA0
127 #define STATUS_RSP 0xA1
128 #define LINK_CONTROL_RESP 0xA2
129 #define IDLE_MODE_STATUS 0xA3
130 #define STATS_POINTER_RESP 0xA6
131 #define MGMT_MSG_INFO_SW_STATUS 0xA7
132 #define AUTH_SS_HOST_MSG 0xA8
134 #define CM_DSA_ACK_PAYLOAD 247
135 #define CM_DSC_ACK_PAYLOAD 248
136 #define CM_DSD_ACK_PAYLOAD 249
137 #define CM_DSDEACTVATE 250
138 #define TOTAL_MASKED_ADDRESS_IN_BYTES 32
140 #define MAC_REQ 0
141 #define LINK_RESP 1
142 #define RSSI_INDICATION 2
144 #define SS_INFO 4
145 #define STATISTICS_INFO 5
146 #define CM_INDICATION 6
147 #define PARAM_RESP 7
148 #define BUFFER_1K 1024
149 #define BUFFER_2K (BUFFER_1K*2)
150 #define BUFFER_4K (BUFFER_2K*2)
151 #define BUFFER_8K (BUFFER_4K*2)
152 #define BUFFER_16K (BUFFER_8K*2)
153 #define DOWNLINK_DIR 0
154 #define UPLINK_DIR 1
156 #define BCM_SIGNATURE "BECEEM"
159 #define GPIO_OUTPUT_REGISTER 0x0F00003C
160 #define BCM_GPIO_OUTPUT_SET_REG 0x0F000040
161 #define BCM_GPIO_OUTPUT_CLR_REG 0x0F000044
162 #define GPIO_MODE_REGISTER 0x0F000034
163 #define GPIO_PIN_STATE_REGISTER 0x0F000038
165 struct bcm_link_state {
166 unsigned char ucLinkStatus;
167 unsigned char bIdleMode;
168 unsigned char bShutdownMode;
171 enum enLinkStatus {
172 WAIT_FOR_SYNC = 1,
173 PHY_SYNC_ACHIVED = 2,
174 LINKUP_IN_PROGRESS = 3,
175 LINKUP_DONE = 4,
176 DREG_RECEIVED = 5,
177 LINK_STATUS_RESET_RECEIVED = 6,
178 PERIODIC_WAKE_UP_NOTIFICATION_FRM_FW = 7,
179 LINK_SHUTDOWN_REQ_FROM_FIRMWARE = 8,
180 COMPLETE_WAKE_UP_NOTIFICATION_FRM_FW = 9
183 enum bcm_phs_dsc_action {
184 eAddPHSRule = 0,
185 eSetPHSRule,
186 eDeletePHSRule,
187 eDeleteAllPHSRules
190 #define CM_CONTROL_NEWDSX_MULTICLASSIFIER_REQ 0x89 /* Host to Mac */
191 #define CM_CONTROL_NEWDSX_MULTICLASSIFIER_RESP 0xA9 /* Mac to Host */
192 #define MASK_DISABLE_HEADER_SUPPRESSION 0x10 /* 0b000010000 */
193 #define MINIMUM_PENDING_DESCRIPTORS 5
195 #define SHUTDOWN_HOSTINITIATED_REQUESTPAYLOAD 0xCC
196 #define SHUTDOWN_ACK_FROM_DRIVER 0x1
197 #define SHUTDOWN_NACK_FROM_DRIVER 0x2
199 #define LINK_SYNC_UP_SUBTYPE 0x0001
200 #define LINK_SYNC_DOWN_SUBTYPE 0x0001
204 #define CONT_MODE 1
205 #define SINGLE_DESCRIPTOR 1
208 #define DESCRIPTOR_LENGTH 0x30
209 #define FIRMWARE_DESCS_ADDRESS 0x1F100000
212 #define CLOCK_RESET_CNTRL_REG_1 0x0F00000C
213 #define CLOCK_RESET_CNTRL_REG_2 0x0F000840
217 #define TX_DESCRIPTOR_HEAD_REGISTER 0x0F010034
218 #define RX_DESCRIPTOR_HEAD_REGISTER 0x0F010094
220 #define STATISTICS_BEGIN_ADDR 0xbf60f02c
222 #define MAX_PENDING_CTRL_PACKET (MAX_CTRL_QUEUE_LEN-10)
224 #define WIMAX_MAX_MTU (MTU_SIZE + ETH_HLEN)
225 #define AUTO_LINKUP_ENABLE 0x2
226 #define AUTO_SYNC_DISABLE 0x1
227 #define AUTO_FIRM_DOWNLOAD 0x1
228 #define SETTLE_DOWN_TIME 50
230 #define HOST_BUS_SUSPEND_BIT 16
232 #define IDLE_MESSAGE 0x81
234 #define MIPS_CLOCK_133MHz 1
236 #define TARGET_CAN_GO_TO_IDLE_MODE 2
237 #define TARGET_CAN_NOT_GO_TO_IDLE_MODE 3
238 #define IDLE_MODE_PAYLOAD_LENGTH 8
240 #define IP_HEADER(Buffer) ((IPHeaderFormat *)(Buffer))
241 #define IPV4 4
242 #define IP_VERSION(byte) (((byte&0xF0)>>4))
244 #define SET_MAC_ADDRESS 193
245 #define SET_MAC_ADDRESS_RESPONSE 236
247 #define IDLE_MODE_WAKEUP_PATTERN 0xd0ea1d1e
248 #define IDLE_MODE_WAKEUP_NOTIFIER_ADDRESS 0x1FC02FA8
249 #define IDLE_MODE_MAX_RETRY_COUNT 1000
251 #define CONFIG_BEGIN_ADDR 0xBF60B000
253 #define FIRMWARE_BEGIN_ADDR 0xBFC00000
255 #define INVALID_QUEUE_INDEX NO_OF_QUEUES
257 #define INVALID_PID ((pid_t)-1)
258 #define DDR_80_MHZ 0
259 #define DDR_100_MHZ 1
260 #define DDR_120_MHZ 2 /* Additional Frequency for T3LP */
261 #define DDR_133_MHZ 3
262 #define DDR_140_MHZ 4 /* Not Used (Reserved for future) */
263 #define DDR_160_MHZ 5 /* Additional Frequency for T3LP */
264 #define DDR_180_MHZ 6 /* Not Used (Reserved for future) */
265 #define DDR_200_MHZ 7 /* Not Used (Reserved for future) */
267 #define MIPS_200_MHZ 0
268 #define MIPS_160_MHZ 1
270 #define PLL_800_MHZ 0
271 #define PLL_266_MHZ 1
273 #define DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING 0
274 #define DEVICE_POWERSAVE_MODE_AS_PMU_CLOCK_GATING 1
275 #define DEVICE_POWERSAVE_MODE_AS_PMU_SHUTDOWN 2
276 #define DEVICE_POWERSAVE_MODE_AS_RESERVED 3
277 #define DEVICE_POWERSAVE_MODE_AS_PROTOCOL_IDLE_MODE 4
280 #define EEPROM_REJECT_REG_1 0x0f003018
281 #define EEPROM_REJECT_REG_2 0x0f00301c
282 #define EEPROM_REJECT_REG_3 0x0f003008
283 #define EEPROM_REJECT_REG_4 0x0f003020
284 #define EEPROM_REJECT_MASK 0x0fffffff
285 #define VSG_MODE 0x3
287 /* Idle Mode Related Registers */
288 #define DEBUG_INTERRUPT_GENERATOR_REGISTOR 0x0F00007C
289 #define SW_ABORT_IDLEMODE_LOC 0x0FF01FFC
291 #define SW_ABORT_IDLEMODE_PATTERN 0xd0ea1d1e
292 #define DEVICE_INT_OUT_EP_REG0 0x0F011870
293 #define DEVICE_INT_OUT_EP_REG1 0x0F011874
295 #define BIN_FILE "/lib/firmware/macxvi200.bin"
296 #define CFG_FILE "/lib/firmware/macxvi.cfg"
297 #define SF_MAX_ALLOWED_PACKETS_TO_BACKUP 128
298 #define MIN_VAL(x, y) ((x) < (y) ? (x) : (y))
299 #define MAC_ADDRESS_SIZE 6
300 #define EEPROM_COMMAND_Q_REG 0x0F003018
301 #define EEPROM_READ_DATA_Q_REG 0x0F003020
302 #define CHIP_ID_REG 0x0F000000
303 #define GPIO_MODE_REG 0x0F000034
304 #define GPIO_OUTPUT_REG 0x0F00003C
305 #define WIMAX_MAX_ALLOWED_RATE (1024*1024*50)
307 #define T3 0xbece0300
308 #define TARGET_SFID_TXDESC_MAP_LOC 0xBFFFF400
310 #define RWM_READ 0
311 #define RWM_WRITE 1
313 #define T3LPB 0xbece3300
314 #define BCS220_2 0xbece3311
315 #define BCS220_2BC 0xBECE3310
316 #define BCS250_BC 0xbece3301
317 #define BCS220_3 0xbece3321
320 #define HPM_CONFIG_LDO145 0x0F000D54
321 #define HPM_CONFIG_MSW 0x0F000D58
323 #define T3B 0xbece0310
324 enum bcm_nvm_type {
325 NVM_AUTODETECT = 0,
326 NVM_EEPROM,
327 NVM_FLASH,
328 NVM_UNKNOWN
331 enum bcm_pmu_modes {
332 HYBRID_MODE_7C = 0,
333 INTERNAL_MODE_6 = 1,
334 HYBRID_MODE_6 = 2
337 #define MAX_RDM_WRM_RETIRES 1
339 enum eAbortPattern {
340 ABORT_SHUTDOWN_MODE = 1,
341 ABORT_IDLE_REG = 1,
342 ABORT_IDLE_MODE = 2,
343 ABORT_IDLE_SYNCDOWN = 3
347 /* Offsets used by driver in skb cb variable */
348 #define SKB_CB_CLASSIFICATION_OFFSET 0
349 #define SKB_CB_LATENCY_OFFSET 1
350 #define SKB_CB_TCPACK_OFFSET 2
352 #endif /* __MACROS_H__ */