drivers/staging/imx-drm/imx-tve.c

   1 /*
   2  * i.MX drm driver - Television Encoder (TVEv2)
   3  *
   4  * Copyright (C) 2013 Philipp Zabel, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20
  21 #include <linux/clk.h>
  22 #include <linux/clk-provider.h>
  23 #include <linux/module.h>
  24 #include <linux/i2c.h>
  25 #include <linux/regmap.h>
  26 #include <linux/regulator/consumer.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/videodev2.h>
  29 #include <drm/drmP.h>
  30 #include <drm/drm_fb_helper.h>
  31 #include <drm/drm_crtc_helper.h>
  32
  33 #include "imx-drm.h"
  34
  35 #define TVE_COM_CONF_REG        0x00
  36 #define TVE_TVDAC0_CONT_REG     0x28
  37 #define TVE_TVDAC1_CONT_REG     0x2c
  38 #define TVE_TVDAC2_CONT_REG     0x30
  39 #define TVE_CD_CONT_REG         0x34
  40 #define TVE_INT_CONT_REG        0x64
  41 #define TVE_STAT_REG            0x68
  42 #define TVE_TST_MODE_REG        0x6c
  43 #define TVE_MV_CONT_REG         0xdc
  44
  45 /* TVE_COM_CONF_REG */
  46 #define TVE_SYNC_CH_2_EN        BIT(22)
  47 #define TVE_SYNC_CH_1_EN        BIT(21)
  48 #define TVE_SYNC_CH_0_EN        BIT(20)
  49 #define TVE_TV_OUT_MODE_MASK    (0x7 << 12)
  50 #define TVE_TV_OUT_DISABLE      (0x0 << 12)
  51 #define TVE_TV_OUT_CVBS_0       (0x1 << 12)
  52 #define TVE_TV_OUT_CVBS_2       (0x2 << 12)
  53 #define TVE_TV_OUT_CVBS_0_2     (0x3 << 12)
  54 #define TVE_TV_OUT_SVIDEO_0_1   (0x4 << 12)
  55 #define TVE_TV_OUT_SVIDEO_0_1_CVBS2_2   (0x5 << 12)
  56 #define TVE_TV_OUT_YPBPR        (0x6 << 12)
  57 #define TVE_TV_OUT_RGB          (0x7 << 12)
  58 #define TVE_TV_STAND_MASK       (0xf << 8)
  59 #define TVE_TV_STAND_HD_1080P30 (0xc << 8)
  60 #define TVE_P2I_CONV_EN         BIT(7)
  61 #define TVE_INP_VIDEO_FORM      BIT(6)
  62 #define TVE_INP_YCBCR_422       (0x0 << 6)
  63 #define TVE_INP_YCBCR_444       (0x1 << 6)
  64 #define TVE_DATA_SOURCE_MASK    (0x3 << 4)
  65 #define TVE_DATA_SOURCE_BUS1    (0x0 << 4)
  66 #define TVE_DATA_SOURCE_BUS2    (0x1 << 4)
  67 #define TVE_DATA_SOURCE_EXT     (0x2 << 4)
  68 #define TVE_DATA_SOURCE_TESTGEN (0x3 << 4)
  69 #define TVE_IPU_CLK_EN_OFS      3
  70 #define TVE_IPU_CLK_EN          BIT(3)
  71 #define TVE_DAC_SAMP_RATE_OFS   1
  72 #define TVE_DAC_SAMP_RATE_WIDTH 2
  73 #define TVE_DAC_SAMP_RATE_MASK  (0x3 << 1)
  74 #define TVE_DAC_FULL_RATE       (0x0 << 1)
  75 #define TVE_DAC_DIV2_RATE       (0x1 << 1)
  76 #define TVE_DAC_DIV4_RATE       (0x2 << 1)
  77 #define TVE_EN                  BIT(0)
  78
  79 /* TVE_TVDACx_CONT_REG */
  80 #define TVE_TVDAC_GAIN_MASK     (0x3f << 0)
  81
  82 /* TVE_CD_CONT_REG */
  83 #define TVE_CD_CH_2_SM_EN       BIT(22)
  84 #define TVE_CD_CH_1_SM_EN       BIT(21)
  85 #define TVE_CD_CH_0_SM_EN       BIT(20)
  86 #define TVE_CD_CH_2_LM_EN       BIT(18)
  87 #define TVE_CD_CH_1_LM_EN       BIT(17)
  88 #define TVE_CD_CH_0_LM_EN       BIT(16)
  89 #define TVE_CD_CH_2_REF_LVL     BIT(10)
  90 #define TVE_CD_CH_1_REF_LVL     BIT(9)
  91 #define TVE_CD_CH_0_REF_LVL     BIT(8)
  92 #define TVE_CD_EN               BIT(0)
  93
  94 /* TVE_INT_CONT_REG */
  95 #define TVE_FRAME_END_IEN       BIT(13)
  96 #define TVE_CD_MON_END_IEN      BIT(2)
  97 #define TVE_CD_SM_IEN           BIT(1)
  98 #define TVE_CD_LM_IEN           BIT(0)
  99
 100 /* TVE_TST_MODE_REG */
 101 #define TVE_TVDAC_TEST_MODE_MASK        (0x7 << 0)
 102
 103 #define con_to_tve(x) container_of(x, struct imx_tve, connector)
 104 #define enc_to_tve(x) container_of(x, struct imx_tve, encoder)
 105
 106 enum {
 107         TVE_MODE_TVOUT,
 108         TVE_MODE_VGA,
 109 };
 110
 111 struct imx_tve {
 112         struct drm_connector connector;
 113         struct imx_drm_connector *imx_drm_connector;
 114         struct drm_encoder encoder;
 115         struct imx_drm_encoder *imx_drm_encoder;
 116         struct device *dev;
 117         spinlock_t lock;        /* register lock */
 118         bool enabled;
 119         int mode;
 120
 121         struct regmap *regmap;
 122         struct regulator *dac_reg;
 123         struct i2c_adapter *ddc;
 124         struct clk *clk;
 125         struct clk *di_sel_clk;
 126         struct clk_hw clk_hw_di;
 127         struct clk *di_clk;
 128         int vsync_pin;
 129         int hsync_pin;
 130 };
 131
 132 static void tve_lock(void *__tve)
 133 __acquires(&tve->lock)
 134 {
 135         struct imx_tve *tve = __tve;
 136         spin_lock(&tve->lock);
 137 }
 138
 139 static void tve_unlock(void *__tve)
 140 __releases(&tve->lock)
 141 {
 142         struct imx_tve *tve = __tve;
 143         spin_unlock(&tve->lock);
 144 }
 145
 146 static void tve_enable(struct imx_tve *tve)
 147 {
 148         int ret;
 149
 150         if (!tve->enabled) {
 151                 tve->enabled = true;
 152                 clk_prepare_enable(tve->clk);
 153                 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
 154                                          TVE_IPU_CLK_EN | TVE_EN,
 155                                          TVE_IPU_CLK_EN | TVE_EN);
 156         }
 157
 158         /* clear interrupt status register */
 159         regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
 160
 161         /* cable detection irq disabled in VGA mode, enabled in TVOUT mode */
 162         if (tve->mode == TVE_MODE_VGA)
 163                 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0);
 164         else
 165                 regmap_write(tve->regmap, TVE_INT_CONT_REG,
 166                              TVE_CD_SM_IEN |
 167                              TVE_CD_LM_IEN |
 168                              TVE_CD_MON_END_IEN);
 169 }
 170
 171 static void tve_disable(struct imx_tve *tve)
 172 {
 173         int ret;
 174
 175         if (tve->enabled) {
 176                 tve->enabled = false;
 177                 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
 178                                          TVE_IPU_CLK_EN | TVE_EN, 0);
 179                 clk_disable_unprepare(tve->clk);
 180         }
 181 }
 182
 183 static int tve_setup_tvout(struct imx_tve *tve)
 184 {
 185         return -ENOTSUPP;
 186 }
 187
 188 static int tve_setup_vga(struct imx_tve *tve)
 189 {
 190         unsigned int mask;
 191         unsigned int val;
 192         int ret;
 193
 194         /* set gain to (1 + 10/128) to provide 0.7V peak-to-peak amplitude */
 195         ret = regmap_update_bits(tve->regmap, TVE_TVDAC0_CONT_REG,
 196                                  TVE_TVDAC_GAIN_MASK, 0x0a);
 197         ret = regmap_update_bits(tve->regmap, TVE_TVDAC1_CONT_REG,
 198                                  TVE_TVDAC_GAIN_MASK, 0x0a);
 199         ret = regmap_update_bits(tve->regmap, TVE_TVDAC2_CONT_REG,
 200                                  TVE_TVDAC_GAIN_MASK, 0x0a);
 201
 202         /* set configuration register */
 203         mask = TVE_DATA_SOURCE_MASK | TVE_INP_VIDEO_FORM;
 204         val  = TVE_DATA_SOURCE_BUS2 | TVE_INP_YCBCR_444;
 205         mask |= TVE_TV_STAND_MASK       | TVE_P2I_CONV_EN;
 206         val  |= TVE_TV_STAND_HD_1080P30 | 0;
 207         mask |= TVE_TV_OUT_MODE_MASK | TVE_SYNC_CH_0_EN;
 208         val  |= TVE_TV_OUT_RGB       | TVE_SYNC_CH_0_EN;
 209         ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, mask, val);
 210         if (ret < 0) {
 211                 dev_err(tve->dev, "failed to set configuration: %d\n", ret);
 212                 return ret;
 213         }
 214
 215         /* set test mode (as documented) */
 216         ret = regmap_update_bits(tve->regmap, TVE_TST_MODE_REG,
 217                                  TVE_TVDAC_TEST_MODE_MASK, 1);
 218
 219         return 0;
 220 }
 221
 222 static enum drm_connector_status imx_tve_connector_detect(
 223                                 struct drm_connector *connector, bool force)
 224 {
 225         return connector_status_connected;
 226 }
 227
 228 static void imx_tve_connector_destroy(struct drm_connector *connector)
 229 {
 230         /* do not free here */
 231 }
 232
 233 static int imx_tve_connector_get_modes(struct drm_connector *connector)
 234 {
 235         struct imx_tve *tve = con_to_tve(connector);
 236         struct edid *edid;
 237         int ret = 0;
 238
 239         if (!tve->ddc)
 240                 return 0;
 241
 242         edid = drm_get_edid(connector, tve->ddc);
 243         if (edid) {
 244                 drm_mode_connector_update_edid_property(connector, edid);
 245                 ret = drm_add_edid_modes(connector, edid);
 246                 kfree(edid);
 247         }
 248
 249         return ret;
 250 }
 251
 252 static int imx_tve_connector_mode_valid(struct drm_connector *connector,
 253                                         struct drm_display_mode *mode)
 254 {
 255         struct imx_tve *tve = con_to_tve(connector);
 256         unsigned long rate;
 257
 258         /* pixel clock with 2x oversampling */
 259         rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
 260         if (rate == mode->clock)
 261                 return MODE_OK;
 262
 263         /* pixel clock without oversampling */
 264         rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
 265         if (rate == mode->clock)
 266                 return MODE_OK;
 267
 268         dev_warn(tve->dev, "ignoring mode %dx%d\n",
 269                  mode->hdisplay, mode->vdisplay);
 270
 271         return MODE_BAD;
 272 }
 273
 274 static struct drm_encoder *imx_tve_connector_best_encoder(
 275                 struct drm_connector *connector)
 276 {
 277         struct imx_tve *tve = con_to_tve(connector);
 278
 279         return &tve->encoder;
 280 }
 281
 282 static void imx_tve_encoder_dpms(struct drm_encoder *encoder, int mode)
 283 {
 284         struct imx_tve *tve = enc_to_tve(encoder);
 285         int ret;
 286
 287         ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
 288                                  TVE_TV_OUT_MODE_MASK, TVE_TV_OUT_DISABLE);
 289         if (ret < 0)
 290                 dev_err(tve->dev, "failed to disable TVOUT: %d\n", ret);
 291 }
 292
 293 static bool imx_tve_encoder_mode_fixup(struct drm_encoder *encoder,
 294                                        const struct drm_display_mode *mode,
 295                                        struct drm_display_mode *adjusted_mode)
 296 {
 297         return true;
 298 }
 299
 300 static void imx_tve_encoder_prepare(struct drm_encoder *encoder)
 301 {
 302         struct imx_tve *tve = enc_to_tve(encoder);
 303
 304         tve_disable(tve);
 305
 306         switch (tve->mode) {
 307         case TVE_MODE_VGA:
 308                 imx_drm_crtc_panel_format_pins(encoder->crtc,
 309                                 DRM_MODE_ENCODER_DAC, IPU_PIX_FMT_GBR24,
 310                                 tve->hsync_pin, tve->vsync_pin);
 311                 break;
 312         case TVE_MODE_TVOUT:
 313                 imx_drm_crtc_panel_format(encoder->crtc, DRM_MODE_ENCODER_TVDAC,
 314                                           V4L2_PIX_FMT_YUV444);
 315                 break;
 316         }
 317 }
 318
 319 static void imx_tve_encoder_mode_set(struct drm_encoder *encoder,
 320                                      struct drm_display_mode *mode,
 321                                      struct drm_display_mode *adjusted_mode)
 322 {
 323         struct imx_tve *tve = enc_to_tve(encoder);
 324         unsigned long rounded_rate;
 325         unsigned long rate;
 326         int div = 1;
 327         int ret;
 328
 329         /*
 330          * FIXME
 331          * we should try 4k * mode->clock first,
 332          * and enable 4x oversampling for lower resolutions
 333          */
 334         rate = 2000UL * mode->clock;
 335         clk_set_rate(tve->clk, rate);
 336         rounded_rate = clk_get_rate(tve->clk);
 337         if (rounded_rate >= rate)
 338                 div = 2;
 339         clk_set_rate(tve->di_clk, rounded_rate / div);
 340
 341         ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
 342         if (ret < 0) {
 343                 dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
 344                         ret);
 345         }
 346
 347         if (tve->mode == TVE_MODE_VGA)
 348                 tve_setup_vga(tve);
 349         else
 350                 tve_setup_tvout(tve);
 351 }
 352
 353 static void imx_tve_encoder_commit(struct drm_encoder *encoder)
 354 {
 355         struct imx_tve *tve = enc_to_tve(encoder);
 356
 357         tve_enable(tve);
 358 }
 359
 360 static void imx_tve_encoder_disable(struct drm_encoder *encoder)
 361 {
 362         struct imx_tve *tve = enc_to_tve(encoder);
 363
 364         tve_disable(tve);
 365 }
 366
 367 static void imx_tve_encoder_destroy(struct drm_encoder *encoder)
 368 {
 369         /* do not free here */
 370 }
 371
 372 static struct drm_connector_funcs imx_tve_connector_funcs = {
 373         .dpms = drm_helper_connector_dpms,
 374         .fill_modes = drm_helper_probe_single_connector_modes,
 375         .detect = imx_tve_connector_detect,
 376         .destroy = imx_tve_connector_destroy,
 377 };
 378
 379 static struct drm_connector_helper_funcs imx_tve_connector_helper_funcs = {
 380         .get_modes = imx_tve_connector_get_modes,
 381         .best_encoder = imx_tve_connector_best_encoder,
 382         .mode_valid = imx_tve_connector_mode_valid,
 383 };
 384
 385 static struct drm_encoder_funcs imx_tve_encoder_funcs = {
 386         .destroy = imx_tve_encoder_destroy,
 387 };
 388
 389 static struct drm_encoder_helper_funcs imx_tve_encoder_helper_funcs = {
 390         .dpms = imx_tve_encoder_dpms,
 391         .mode_fixup = imx_tve_encoder_mode_fixup,
 392         .prepare = imx_tve_encoder_prepare,
 393         .mode_set = imx_tve_encoder_mode_set,
 394         .commit = imx_tve_encoder_commit,
 395         .disable = imx_tve_encoder_disable,
 396 };
 397
 398 static irqreturn_t imx_tve_irq_handler(int irq, void *data)
 399 {
 400         struct imx_tve *tve = data;
 401         unsigned int val;
 402
 403         regmap_read(tve->regmap, TVE_STAT_REG, &val);
 404
 405         /* clear interrupt status register */
 406         regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
 407
 408         return IRQ_HANDLED;
 409 }
 410
 411 static unsigned long clk_tve_di_recalc_rate(struct clk_hw *hw,
 412                                             unsigned long parent_rate)
 413 {
 414         struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
 415         unsigned int val;
 416         int ret;
 417
 418         ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
 419         if (ret < 0)
 420                 return 0;
 421
 422         switch (val & TVE_DAC_SAMP_RATE_MASK) {
 423         case TVE_DAC_DIV4_RATE:
 424                 return parent_rate / 4;
 425         case TVE_DAC_DIV2_RATE:
 426                 return parent_rate / 2;
 427         case TVE_DAC_FULL_RATE:
 428         default:
 429                 return parent_rate;
 430         }
 431
 432         return 0;
 433 }
 434
 435 static long clk_tve_di_round_rate(struct clk_hw *hw, unsigned long rate,
 436                                   unsigned long *prate)
 437 {
 438         unsigned long div;
 439
 440         div = *prate / rate;
 441         if (div >= 4)
 442                 return *prate / 4;
 443         else if (div >= 2)
 444                 return *prate / 2;
 445         else
 446                 return *prate;
 447 }
 448
 449 static int clk_tve_di_set_rate(struct clk_hw *hw, unsigned long rate,
 450                                unsigned long parent_rate)
 451 {
 452         struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
 453         unsigned long div;
 454         u32 val;
 455         int ret;
 456
 457         div = parent_rate / rate;
 458         if (div >= 4)
 459                 val = TVE_DAC_DIV4_RATE;
 460         else if (div >= 2)
 461                 val = TVE_DAC_DIV2_RATE;
 462         else
 463                 val = TVE_DAC_FULL_RATE;
 464
 465         ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
 466                                  TVE_DAC_SAMP_RATE_MASK, val);
 467
 468         if (ret < 0) {
 469                 dev_err(tve->dev, "failed to set divider: %d\n", ret);
 470                 return ret;
 471         }
 472
 473         return 0;
 474 }
 475
 476 static struct clk_ops clk_tve_di_ops = {
 477         .round_rate = clk_tve_di_round_rate,
 478         .set_rate = clk_tve_di_set_rate,
 479         .recalc_rate = clk_tve_di_recalc_rate,
 480 };
 481
 482 static int tve_clk_init(struct imx_tve *tve, void __iomem *base)
 483 {
 484         const char *tve_di_parent[1];
 485         struct clk_init_data init = {
 486                 .name = "tve_di",
 487                 .ops = &clk_tve_di_ops,
 488                 .num_parents = 1,
 489                 .flags = 0,
 490         };
 491
 492         tve_di_parent[0] = __clk_get_name(tve->clk);
 493         init.parent_names = (const char **)&tve_di_parent;
 494
 495         tve->clk_hw_di.init = &init;
 496         tve->di_clk = clk_register(tve->dev, &tve->clk_hw_di);
 497         if (IS_ERR(tve->di_clk)) {
 498                 dev_err(tve->dev, "failed to register TVE output clock: %ld\n",
 499                         PTR_ERR(tve->di_clk));
 500                 return PTR_ERR(tve->di_clk);
 501         }
 502
 503         return 0;
 504 }
 505
 506 static int imx_tve_register(struct imx_tve *tve)
 507 {
 508         int ret;
 509
 510         tve->connector.funcs = &imx_tve_connector_funcs;
 511         tve->encoder.funcs = &imx_tve_encoder_funcs;
 512
 513         tve->encoder.encoder_type = DRM_MODE_ENCODER_NONE;
 514         tve->connector.connector_type = DRM_MODE_CONNECTOR_VGA;
 515
 516         drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs);
 517         ret = imx_drm_add_encoder(&tve->encoder, &tve->imx_drm_encoder,
 518                         THIS_MODULE);
 519         if (ret) {
 520                 dev_err(tve->dev, "adding encoder failed with %d\n", ret);
 521                 return ret;
 522         }
 523
 524         drm_connector_helper_add(&tve->connector,
 525                         &imx_tve_connector_helper_funcs);
 526
 527         ret = imx_drm_add_connector(&tve->connector,
 528                         &tve->imx_drm_connector, THIS_MODULE);
 529         if (ret) {
 530                 imx_drm_remove_encoder(tve->imx_drm_encoder);
 531                 dev_err(tve->dev, "adding connector failed with %d\n", ret);
 532                 return ret;
 533         }
 534
 535         drm_mode_connector_attach_encoder(&tve->connector, &tve->encoder);
 536
 537         return 0;
 538 }
 539
 540 static bool imx_tve_readable_reg(struct device *dev, unsigned int reg)
 541 {
 542         return (reg % 4 == 0) && (reg <= 0xdc);
 543 }
 544
 545 static struct regmap_config tve_regmap_config = {
 546         .reg_bits = 32,
 547         .val_bits = 32,
 548         .reg_stride = 4,
 549
 550         .readable_reg = imx_tve_readable_reg,
 551
 552         .lock = tve_lock,
 553         .unlock = tve_unlock,
 554
 555         .max_register = 0xdc,
 556 };
 557
 558 static const char *imx_tve_modes[] = {
 559         [TVE_MODE_TVOUT]  = "tvout",
 560         [TVE_MODE_VGA] = "vga",
 561 };
 562
 563 static const int of_get_tve_mode(struct device_node *np)
 564 {
 565         const char *bm;
 566         int ret, i;
 567
 568         ret = of_property_read_string(np, "fsl,tve-mode", &bm);
 569         if (ret < 0)
 570                 return ret;
 571
 572         for (i = 0; i < ARRAY_SIZE(imx_tve_modes); i++)
 573                 if (!strcasecmp(bm, imx_tve_modes[i]))
 574                         return i;
 575
 576         return -EINVAL;
 577 }
 578
 579 static int imx_tve_probe(struct platform_device *pdev)
 580 {
 581         struct device_node *np = pdev->dev.of_node;
 582         struct device_node *ddc_node;
 583         struct imx_tve *tve;
 584         struct resource *res;
 585         void __iomem *base;
 586         unsigned int val;
 587         int irq;
 588         int ret;
 589
 590         tve = devm_kzalloc(&pdev->dev, sizeof(*tve), GFP_KERNEL);
 591         if (!tve)
 592                 return -ENOMEM;
 593
 594         tve->dev = &pdev->dev;
 595         spin_lock_init(&tve->lock);
 596
 597         ddc_node = of_parse_phandle(np, "ddc", 0);
 598         if (ddc_node) {
 599                 tve->ddc = of_find_i2c_adapter_by_node(ddc_node);
 600                 of_node_put(ddc_node);
 601         }
 602
 603         tve->mode = of_get_tve_mode(np);
 604         if (tve->mode != TVE_MODE_VGA) {
 605                 dev_err(&pdev->dev, "only VGA mode supported, currently\n");
 606                 return -EINVAL;
 607         }
 608
 609         if (tve->mode == TVE_MODE_VGA) {
 610                 ret = of_property_read_u32(np, "fsl,hsync-pin",
 611                                            &tve->hsync_pin);
 612
 613                 if (ret < 0) {
 614                         dev_err(&pdev->dev, "failed to get vsync pin\n");
 615                         return ret;
 616                 }
 617
 618                 ret |= of_property_read_u32(np, "fsl,vsync-pin",
 619                                             &tve->vsync_pin);
 620
 621                 if (ret < 0) {
 622                         dev_err(&pdev->dev, "failed to get vsync pin\n");
 623                         return ret;
 624                 }
 625         }
 626
 627         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 628         base = devm_ioremap_resource(&pdev->dev, res);
 629         if (IS_ERR(base))
 630                 return PTR_ERR(base);
 631
 632         tve_regmap_config.lock_arg = tve;
 633         tve->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "tve", base,
 634                                                 &tve_regmap_config);
 635         if (IS_ERR(tve->regmap)) {
 636                 dev_err(&pdev->dev, "failed to init regmap: %ld\n",
 637                         PTR_ERR(tve->regmap));
 638                 return PTR_ERR(tve->regmap);
 639         }
 640
 641         irq = platform_get_irq(pdev, 0);
 642         if (irq < 0) {
 643                 dev_err(&pdev->dev, "failed to get irq\n");
 644                 return irq;
 645         }
 646
 647         ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 648                                         imx_tve_irq_handler, IRQF_ONESHOT,
 649                                         "imx-tve", tve);
 650         if (ret < 0) {
 651                 dev_err(&pdev->dev, "failed to request irq: %d\n", ret);
 652                 return ret;
 653         }
 654
 655         tve->dac_reg = devm_regulator_get(&pdev->dev, "dac");
 656         if (!IS_ERR(tve->dac_reg)) {
 657                 regulator_set_voltage(tve->dac_reg, 2750000, 2750000);
 658                 ret = regulator_enable(tve->dac_reg);
 659                 if (ret)
 660                         return ret;
 661         }
 662
 663         tve->clk = devm_clk_get(&pdev->dev, "tve");
 664         if (IS_ERR(tve->clk)) {
 665                 dev_err(&pdev->dev, "failed to get high speed tve clock: %ld\n",
 666                         PTR_ERR(tve->clk));
 667                 return PTR_ERR(tve->clk);
 668         }
 669
 670         /* this is the IPU DI clock input selector, can be parented to tve_di */
 671         tve->di_sel_clk = devm_clk_get(&pdev->dev, "di_sel");
 672         if (IS_ERR(tve->di_sel_clk)) {
 673                 dev_err(&pdev->dev, "failed to get ipu di mux clock: %ld\n",
 674                         PTR_ERR(tve->di_sel_clk));
 675                 return PTR_ERR(tve->di_sel_clk);
 676         }
 677
 678         ret = tve_clk_init(tve, base);
 679         if (ret < 0)
 680                 return ret;
 681
 682         ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
 683         if (ret < 0) {
 684                 dev_err(&pdev->dev, "failed to read configuration register: %d\n", ret);
 685                 return ret;
 686         }
 687         if (val != 0x00100000) {
 688                 dev_err(&pdev->dev, "configuration register default value indicates this is not a TVEv2\n");
 689                 return -ENODEV;
 690         }
 691
 692         /* disable cable detection for VGA mode */
 693         ret = regmap_write(tve->regmap, TVE_CD_CONT_REG, 0);
 694
 695         ret = imx_tve_register(tve);
 696         if (ret)
 697                 return ret;
 698
 699         ret = imx_drm_encoder_add_possible_crtcs(tve->imx_drm_encoder, np);
 700
 701         platform_set_drvdata(pdev, tve);
 702
 703         return 0;
 704 }
 705
 706 static int imx_tve_remove(struct platform_device *pdev)
 707 {
 708         struct imx_tve *tve = platform_get_drvdata(pdev);
 709         struct drm_connector *connector = &tve->connector;
 710         struct drm_encoder *encoder = &tve->encoder;
 711
 712         drm_mode_connector_detach_encoder(connector, encoder);
 713
 714         imx_drm_remove_connector(tve->imx_drm_connector);
 715         imx_drm_remove_encoder(tve->imx_drm_encoder);
 716
 717         if (!IS_ERR(tve->dac_reg))
 718                 regulator_disable(tve->dac_reg);
 719
 720         return 0;
 721 }
 722
 723 static const struct of_device_id imx_tve_dt_ids[] = {
 724         { .compatible = "fsl,imx53-tve", },
 725         { /* sentinel */ }
 726 };
 727
 728 static struct platform_driver imx_tve_driver = {
 729         .probe          = imx_tve_probe,
 730         .remove         = imx_tve_remove,
 731         .driver         = {
 732                 .of_match_table = imx_tve_dt_ids,
 733                 .name   = "imx-tve",
 734                 .owner  = THIS_MODULE,
 735         },
 736 };
 737
 738 module_platform_driver(imx_tve_driver);
 739
 740 MODULE_DESCRIPTION("i.MX Television Encoder driver");
 741 MODULE_AUTHOR("Philipp Zabel, Pengutronix");
 742 MODULE_LICENSE("GPL");
 743 MODULE_ALIAS("platform:imx-tve");