2 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
5 * Mythri pk <mythripk@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #define DSS_SUBSYS_NAME "HDMI"
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/err.h>
26 #include <linux/interrupt.h>
27 #include <linux/mutex.h>
28 #include <linux/delay.h>
29 #include <linux/string.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/clk.h>
33 #include <linux/gpio.h>
34 #include <linux/regulator/consumer.h>
35 #include <video/omapdss.h>
37 #include "hdmi4_core.h"
39 #include "dss_features.h"
43 struct platform_device
*pdev
;
45 struct hdmi_wp_data wp
;
46 struct hdmi_pll_data pll
;
47 struct hdmi_phy_data phy
;
48 struct hdmi_core_data core
;
50 struct hdmi_config cfg
;
53 struct regulator
*vdda_hdmi_dac_reg
;
57 struct omap_dss_device output
;
60 static int hdmi_runtime_get(void)
64 DSSDBG("hdmi_runtime_get\n");
66 r
= pm_runtime_get_sync(&hdmi
.pdev
->dev
);
74 static void hdmi_runtime_put(void)
78 DSSDBG("hdmi_runtime_put\n");
80 r
= pm_runtime_put_sync(&hdmi
.pdev
->dev
);
81 WARN_ON(r
< 0 && r
!= -ENOSYS
);
84 static int hdmi_init_regulator(void)
86 struct regulator
*reg
;
88 if (hdmi
.vdda_hdmi_dac_reg
!= NULL
)
91 reg
= devm_regulator_get(&hdmi
.pdev
->dev
, "vdda_hdmi_dac");
93 /* DT HACK: try VDAC to make omapdss work for o4 sdp/panda */
95 reg
= devm_regulator_get(&hdmi
.pdev
->dev
, "VDAC");
98 if (PTR_ERR(reg
) != -EPROBE_DEFER
)
99 DSSERR("can't get VDDA_HDMI_DAC regulator\n");
103 hdmi
.vdda_hdmi_dac_reg
= reg
;
108 static int hdmi_power_on_core(struct omap_dss_device
*dssdev
)
112 r
= regulator_enable(hdmi
.vdda_hdmi_dac_reg
);
116 r
= hdmi_runtime_get();
118 goto err_runtime_get
;
120 /* Make selection of HDMI in DSS */
121 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK
);
123 hdmi
.core_enabled
= true;
128 regulator_disable(hdmi
.vdda_hdmi_dac_reg
);
133 static void hdmi_power_off_core(struct omap_dss_device
*dssdev
)
135 hdmi
.core_enabled
= false;
138 regulator_disable(hdmi
.vdda_hdmi_dac_reg
);
141 static int hdmi_power_on_full(struct omap_dss_device
*dssdev
)
144 struct omap_video_timings
*p
;
145 struct omap_overlay_manager
*mgr
= hdmi
.output
.manager
;
148 r
= hdmi_power_on_core(dssdev
);
152 p
= &hdmi
.cfg
.timings
;
154 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p
->x_res
, p
->y_res
);
156 phy
= p
->pixel_clock
;
158 hdmi_pll_compute(&hdmi
.pll
, clk_get_rate(hdmi
.sys_clk
), phy
);
160 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
161 r
= hdmi_pll_enable(&hdmi
.pll
, &hdmi
.wp
);
163 DSSDBG("Failed to lock PLL\n");
167 r
= hdmi_phy_enable(&hdmi
.phy
, &hdmi
.wp
, &hdmi
.cfg
);
169 DSSDBG("Failed to start PHY\n");
173 hdmi4_configure(&hdmi
.core
, &hdmi
.wp
, &hdmi
.cfg
);
175 /* bypass TV gamma table */
176 dispc_enable_gamma_table(0);
179 dss_mgr_set_timings(mgr
, p
);
181 r
= hdmi_wp_video_start(&hdmi
.wp
);
185 r
= dss_mgr_enable(mgr
);
192 hdmi_wp_video_stop(&hdmi
.wp
);
194 hdmi_phy_disable(&hdmi
.phy
, &hdmi
.wp
);
196 hdmi_pll_disable(&hdmi
.pll
, &hdmi
.wp
);
198 hdmi_power_off_core(dssdev
);
202 static void hdmi_power_off_full(struct omap_dss_device
*dssdev
)
204 struct omap_overlay_manager
*mgr
= hdmi
.output
.manager
;
206 dss_mgr_disable(mgr
);
208 hdmi_wp_video_stop(&hdmi
.wp
);
209 hdmi_phy_disable(&hdmi
.phy
, &hdmi
.wp
);
210 hdmi_pll_disable(&hdmi
.pll
, &hdmi
.wp
);
212 hdmi_power_off_core(dssdev
);
215 static int hdmi_display_check_timing(struct omap_dss_device
*dssdev
,
216 struct omap_video_timings
*timings
)
218 struct omap_dss_device
*out
= &hdmi
.output
;
220 if (!dispc_mgr_timings_ok(out
->dispc_channel
, timings
))
226 static void hdmi_display_set_timing(struct omap_dss_device
*dssdev
,
227 struct omap_video_timings
*timings
)
230 const struct hdmi_config
*t
;
232 mutex_lock(&hdmi
.lock
);
234 cm
= hdmi_get_code(timings
);
237 t
= hdmi_get_timings(cm
.mode
, cm
.code
);
241 dispc_set_tv_pclk(t
->timings
.pixel_clock
* 1000);
243 hdmi
.cfg
.timings
= *timings
;
244 hdmi
.cfg
.cm
.code
= 0;
245 hdmi
.cfg
.cm
.mode
= HDMI_DVI
;
247 dispc_set_tv_pclk(timings
->pixel_clock
* 1000);
250 DSSDBG("using mode: %s, code %d\n", hdmi
.cfg
.cm
.mode
== HDMI_DVI
?
251 "DVI" : "HDMI", hdmi
.cfg
.cm
.code
);
253 mutex_unlock(&hdmi
.lock
);
256 static void hdmi_display_get_timings(struct omap_dss_device
*dssdev
,
257 struct omap_video_timings
*timings
)
259 const struct hdmi_config
*cfg
;
260 struct hdmi_cm cm
= hdmi
.cfg
.cm
;
262 cfg
= hdmi_get_timings(cm
.mode
, cm
.code
);
264 cfg
= hdmi_default_timing();
266 memcpy(timings
, &cfg
->timings
, sizeof(cfg
->timings
));
269 static void hdmi_dump_regs(struct seq_file
*s
)
271 mutex_lock(&hdmi
.lock
);
273 if (hdmi_runtime_get()) {
274 mutex_unlock(&hdmi
.lock
);
278 hdmi_wp_dump(&hdmi
.wp
, s
);
279 hdmi_pll_dump(&hdmi
.pll
, s
);
280 hdmi_phy_dump(&hdmi
.phy
, s
);
281 hdmi4_core_dump(&hdmi
.core
, s
);
284 mutex_unlock(&hdmi
.lock
);
287 static int read_edid(u8
*buf
, int len
)
291 mutex_lock(&hdmi
.lock
);
293 r
= hdmi_runtime_get();
296 r
= hdmi4_read_edid(&hdmi
.core
, buf
, len
);
299 mutex_unlock(&hdmi
.lock
);
304 static int hdmi_display_enable(struct omap_dss_device
*dssdev
)
306 struct omap_dss_device
*out
= &hdmi
.output
;
309 DSSDBG("ENTER hdmi_display_enable\n");
311 mutex_lock(&hdmi
.lock
);
313 if (out
== NULL
|| out
->manager
== NULL
) {
314 DSSERR("failed to enable display: no output/manager\n");
319 r
= hdmi_power_on_full(dssdev
);
321 DSSERR("failed to power on device\n");
325 mutex_unlock(&hdmi
.lock
);
329 mutex_unlock(&hdmi
.lock
);
333 static void hdmi_display_disable(struct omap_dss_device
*dssdev
)
335 DSSDBG("Enter hdmi_display_disable\n");
337 mutex_lock(&hdmi
.lock
);
339 hdmi_power_off_full(dssdev
);
341 mutex_unlock(&hdmi
.lock
);
344 static int hdmi_core_enable(struct omap_dss_device
*dssdev
)
348 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
350 mutex_lock(&hdmi
.lock
);
352 r
= hdmi_power_on_core(dssdev
);
354 DSSERR("failed to power on device\n");
358 mutex_unlock(&hdmi
.lock
);
362 mutex_unlock(&hdmi
.lock
);
366 static void hdmi_core_disable(struct omap_dss_device
*dssdev
)
368 DSSDBG("Enter omapdss_hdmi_core_disable\n");
370 mutex_lock(&hdmi
.lock
);
372 hdmi_power_off_core(dssdev
);
374 mutex_unlock(&hdmi
.lock
);
377 static int hdmi_get_clocks(struct platform_device
*pdev
)
381 clk
= devm_clk_get(&pdev
->dev
, "sys_clk");
383 DSSERR("can't get sys_clk\n");
392 static int hdmi_connect(struct omap_dss_device
*dssdev
,
393 struct omap_dss_device
*dst
)
395 struct omap_overlay_manager
*mgr
;
398 r
= hdmi_init_regulator();
402 mgr
= omap_dss_get_overlay_manager(dssdev
->dispc_channel
);
406 r
= dss_mgr_connect(mgr
, dssdev
);
410 r
= omapdss_output_set_device(dssdev
, dst
);
412 DSSERR("failed to connect output to new device: %s\n",
414 dss_mgr_disconnect(mgr
, dssdev
);
421 static void hdmi_disconnect(struct omap_dss_device
*dssdev
,
422 struct omap_dss_device
*dst
)
424 WARN_ON(dst
!= dssdev
->dst
);
426 if (dst
!= dssdev
->dst
)
429 omapdss_output_unset_device(dssdev
);
432 dss_mgr_disconnect(dssdev
->manager
, dssdev
);
435 static int hdmi_read_edid(struct omap_dss_device
*dssdev
,
441 need_enable
= hdmi
.core_enabled
== false;
444 r
= hdmi_core_enable(dssdev
);
449 r
= read_edid(edid
, len
);
452 hdmi_core_disable(dssdev
);
457 #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
458 static int hdmi_audio_enable(struct omap_dss_device
*dssdev
)
462 mutex_lock(&hdmi
.lock
);
464 if (!hdmi_mode_has_audio(hdmi
.cfg
.cm
.mode
)) {
469 r
= hdmi_wp_audio_enable(&hdmi
.wp
, true);
473 mutex_unlock(&hdmi
.lock
);
477 mutex_unlock(&hdmi
.lock
);
481 static void hdmi_audio_disable(struct omap_dss_device
*dssdev
)
483 hdmi_wp_audio_enable(&hdmi
.wp
, false);
486 static int hdmi_audio_start(struct omap_dss_device
*dssdev
)
488 return hdmi4_audio_start(&hdmi
.core
, &hdmi
.wp
);
491 static void hdmi_audio_stop(struct omap_dss_device
*dssdev
)
493 hdmi4_audio_stop(&hdmi
.core
, &hdmi
.wp
);
496 static bool hdmi_audio_supported(struct omap_dss_device
*dssdev
)
500 mutex_lock(&hdmi
.lock
);
502 r
= hdmi_mode_has_audio(hdmi
.cfg
.cm
.mode
);
504 mutex_unlock(&hdmi
.lock
);
508 static int hdmi_audio_config(struct omap_dss_device
*dssdev
,
509 struct omap_dss_audio
*audio
)
512 u32 pclk
= hdmi
.cfg
.timings
.pixel_clock
;
514 mutex_lock(&hdmi
.lock
);
516 if (!hdmi_mode_has_audio(hdmi
.cfg
.cm
.mode
)) {
521 r
= hdmi4_audio_config(&hdmi
.core
, &hdmi
.wp
, audio
, pclk
);
525 mutex_unlock(&hdmi
.lock
);
529 mutex_unlock(&hdmi
.lock
);
533 static int hdmi_audio_enable(struct omap_dss_device
*dssdev
)
538 static void hdmi_audio_disable(struct omap_dss_device
*dssdev
)
542 static int hdmi_audio_start(struct omap_dss_device
*dssdev
)
547 static void hdmi_audio_stop(struct omap_dss_device
*dssdev
)
551 static bool hdmi_audio_supported(struct omap_dss_device
*dssdev
)
556 static int hdmi_audio_config(struct omap_dss_device
*dssdev
,
557 struct omap_dss_audio
*audio
)
563 static const struct omapdss_hdmi_ops hdmi_ops
= {
564 .connect
= hdmi_connect
,
565 .disconnect
= hdmi_disconnect
,
567 .enable
= hdmi_display_enable
,
568 .disable
= hdmi_display_disable
,
570 .check_timings
= hdmi_display_check_timing
,
571 .set_timings
= hdmi_display_set_timing
,
572 .get_timings
= hdmi_display_get_timings
,
574 .read_edid
= hdmi_read_edid
,
576 .audio_enable
= hdmi_audio_enable
,
577 .audio_disable
= hdmi_audio_disable
,
578 .audio_start
= hdmi_audio_start
,
579 .audio_stop
= hdmi_audio_stop
,
580 .audio_supported
= hdmi_audio_supported
,
581 .audio_config
= hdmi_audio_config
,
584 static void hdmi_init_output(struct platform_device
*pdev
)
586 struct omap_dss_device
*out
= &hdmi
.output
;
588 out
->dev
= &pdev
->dev
;
589 out
->id
= OMAP_DSS_OUTPUT_HDMI
;
590 out
->output_type
= OMAP_DISPLAY_TYPE_HDMI
;
591 out
->name
= "hdmi.0";
592 out
->dispc_channel
= OMAP_DSS_CHANNEL_DIGIT
;
593 out
->ops
.hdmi
= &hdmi_ops
;
594 out
->owner
= THIS_MODULE
;
596 omapdss_register_output(out
);
599 static void __exit
hdmi_uninit_output(struct platform_device
*pdev
)
601 struct omap_dss_device
*out
= &hdmi
.output
;
603 omapdss_unregister_output(out
);
606 /* HDMI HW IP initialisation */
607 static int omapdss_hdmihw_probe(struct platform_device
*pdev
)
613 mutex_init(&hdmi
.lock
);
615 r
= hdmi_wp_init(pdev
, &hdmi
.wp
);
619 r
= hdmi_pll_init(pdev
, &hdmi
.pll
);
623 r
= hdmi_phy_init(pdev
, &hdmi
.phy
);
627 r
= hdmi4_core_init(pdev
, &hdmi
.core
);
631 r
= hdmi_get_clocks(pdev
);
633 DSSERR("can't get clocks\n");
637 pm_runtime_enable(&pdev
->dev
);
639 hdmi_init_output(pdev
);
641 dss_debugfs_create_file("hdmi", hdmi_dump_regs
);
646 static int __exit
omapdss_hdmihw_remove(struct platform_device
*pdev
)
648 hdmi_uninit_output(pdev
);
650 pm_runtime_disable(&pdev
->dev
);
655 static int hdmi_runtime_suspend(struct device
*dev
)
657 clk_disable_unprepare(hdmi
.sys_clk
);
664 static int hdmi_runtime_resume(struct device
*dev
)
668 r
= dispc_runtime_get();
672 clk_prepare_enable(hdmi
.sys_clk
);
677 static const struct dev_pm_ops hdmi_pm_ops
= {
678 .runtime_suspend
= hdmi_runtime_suspend
,
679 .runtime_resume
= hdmi_runtime_resume
,
682 static struct platform_driver omapdss_hdmihw_driver
= {
683 .probe
= omapdss_hdmihw_probe
,
684 .remove
= __exit_p(omapdss_hdmihw_remove
),
686 .name
= "omapdss_hdmi",
687 .owner
= THIS_MODULE
,
692 int __init
hdmi4_init_platform_driver(void)
694 return platform_driver_register(&omapdss_hdmihw_driver
);
697 void __exit
hdmi4_uninit_platform_driver(void)
699 platform_driver_unregister(&omapdss_hdmihw_driver
);