drivers/pcmcia/au1000_generic.h

   1 /*
   2  * Alchemy Semi Au1000 pcmcia driver include file
   3  *
   4  * Copyright 2001 MontaVista Software Inc.
   5  * Author: MontaVista Software, Inc.
   6  *              ppopov@mvista.com or source@mvista.com
   7  *
   8  *  This program is free software; you can distribute it and/or modify it
   9  *  under the terms of the GNU General Public License (Version 2) as
  10  *  published by the Free Software Foundation.
  11  *
  12  *  This program is distributed in the hope it will be useful, but WITHOUT
  13  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15  *  for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License along
  18  *  with this program; if not, write to the Free Software Foundation, Inc.,
  19  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  20  */
  21 #ifndef __ASM_AU1000_PCMCIA_H
  22 #define __ASM_AU1000_PCMCIA_H
  23
  24 /* include the world */
  25 #include <pcmcia/version.h>
  26 #include <pcmcia/cs_types.h>
  27 #include <pcmcia/cs.h>
  28 #include <pcmcia/ss.h>
  29 #include <pcmcia/bulkmem.h>
  30 #include <pcmcia/cistpl.h>
  31 #include "cs_internal.h"
  32
  33 #define AU1000_PCMCIA_POLL_PERIOD    (2*HZ)
  34 #define AU1000_PCMCIA_IO_SPEED       (255)
  35 #define AU1000_PCMCIA_MEM_SPEED      (300)
  36
  37 #define AU1X_SOCK0_IO        0xF00000000
  38 #define AU1X_SOCK0_PHYS_ATTR 0xF40000000
  39 #define AU1X_SOCK0_PHYS_MEM  0xF80000000
  40 /* pseudo 32 bit phys addresses, which get fixed up to the
  41  * real 36 bit address in fixup_bigphys_addr() */
  42 #define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
  43 #define AU1X_SOCK0_PSEUDO_PHYS_MEM  0xF8000000
  44
  45 /* pcmcia socket 1 needs external glue logic so the memory map
  46  * differs from board to board.
  47  */
  48 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550)
  49 #define AU1X_SOCK1_IO        0xF08000000
  50 #define AU1X_SOCK1_PHYS_ATTR 0xF48000000
  51 #define AU1X_SOCK1_PHYS_MEM  0xF88000000
  52 #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
  53 #define AU1X_SOCK1_PSEUDO_PHYS_MEM  0xF8800000
  54 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550)
  55 #define AU1X_SOCK1_IO        0xF04000000
  56 #define AU1X_SOCK1_PHYS_ATTR 0xF44000000
  57 #define AU1X_SOCK1_PHYS_MEM  0xF84000000
  58 #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
  59 #define AU1X_SOCK1_PSEUDO_PHYS_MEM  0xF8400000
  60 #endif
  61
  62 struct pcmcia_state {
  63   unsigned detect: 1,
  64             ready: 1,
  65            wrprot: 1,
  66              bvd1: 1,
  67              bvd2: 1,
  68             vs_3v: 1,
  69             vs_Xv: 1;
  70 };
  71
  72 struct pcmcia_configure {
  73   unsigned sock: 8,
  74             vcc: 8,
  75             vpp: 8,
  76          output: 1,
  77         speaker: 1,
  78           reset: 1;
  79 };
  80
  81 struct pcmcia_irqs {
  82         int sock;
  83         int irq;
  84         const char *str;
  85 };
  86
  87
  88 struct au1000_pcmcia_socket {
  89         struct pcmcia_socket socket;
  90
  91         /*
  92          * Info from low level handler
  93          */
  94         struct device           *dev;
  95         unsigned int            nr;
  96         unsigned int            irq;
  97
  98         /*
  99          * Core PCMCIA state
 100          */
 101         struct pcmcia_low_level *ops;
 102
 103         unsigned int            status;
 104         socket_state_t          cs_state;
 105
 106         unsigned short          spd_io[MAX_IO_WIN];
 107         unsigned short          spd_mem[MAX_WIN];
 108         unsigned short          spd_attr[MAX_WIN];
 109
 110         struct resource         res_skt;
 111         struct resource         res_io;
 112         struct resource         res_mem;
 113         struct resource         res_attr;
 114
 115         void *                  virt_io;
 116         ioaddr_t                phys_io;
 117         unsigned int            phys_attr;
 118         unsigned int            phys_mem;
 119         unsigned short          speed_io, speed_attr, speed_mem;
 120
 121         unsigned int            irq_state;
 122
 123         struct timer_list       poll_timer;
 124 };
 125
 126 struct pcmcia_low_level {
 127         struct module *owner;
 128
 129         int (*hw_init)(struct au1000_pcmcia_socket *);
 130         void (*hw_shutdown)(struct au1000_pcmcia_socket *);
 131
 132         void (*socket_state)(struct au1000_pcmcia_socket *, struct pcmcia_state *);
 133         int (*configure_socket)(struct au1000_pcmcia_socket *, struct socket_state_t *);
 134
 135         /*
 136          * Enable card status IRQs on (re-)initialisation.  This can
 137          * be called at initialisation, power management event, or
 138          * pcmcia event.
 139          */
 140         void (*socket_init)(struct au1000_pcmcia_socket *);
 141
 142         /*
 143          * Disable card status IRQs and PCMCIA bus on suspend.
 144          */
 145         void (*socket_suspend)(struct au1000_pcmcia_socket *);
 146 };
 147
 148 extern int au1x_board_init(struct device *dev);
 149
 150 #endif /* __ASM_AU1000_PCMCIA_H */