drivers/pcmcia/m32r_pcc.c

   1 /*
   2  *  drivers/pcmcia/m32r_pcc.c
   3  *
   4  *  Device driver for the PCMCIA functionality of M32R.
   5  *
   6  *  Copyright (c) 2001, 2002, 2003, 2004
   7  *    Hiroyuki Kondo, Naoto Sugai, Hayato Fujiwara
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/moduleparam.h>
  12 #include <linux/init.h>
  13 #include <linux/config.h>
  14 #include <linux/types.h>
  15 #include <linux/fcntl.h>
  16 #include <linux/string.h>
  17 #include <linux/kernel.h>
  18 #include <linux/errno.h>
  19 #include <linux/timer.h>
  20 #include <linux/sched.h>
  21 #include <linux/slab.h>
  22 #include <linux/ioport.h>
  23 #include <linux/delay.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/device.h>
  27 #include <asm/irq.h>
  28 #include <asm/io.h>
  29 #include <asm/bitops.h>
  30 #include <asm/system.h>
  31 #include <asm/addrspace.h>
  32
  33 #include <pcmcia/version.h>
  34 #include <pcmcia/cs_types.h>
  35 #include <pcmcia/ss.h>
  36 #include <pcmcia/cs.h>
  37
  38 /* XXX: should be moved into asm/irq.h */
  39 #define PCC0_IRQ 24
  40 #define PCC1_IRQ 25
  41
  42 #include "m32r_pcc.h"
  43
  44 #define CHAOS_PCC_DEBUG
  45 #ifdef CHAOS_PCC_DEBUG
  46         static volatile u_short dummy_readbuf;
  47 #endif
  48
  49 #define PCC_DEBUG_DBEX
  50
  51 #ifdef DEBUG
  52 static int m32r_pcc_debug;
  53 module_param(m32r_pcc_debug, int, 0644);
  54 #define debug(lvl, fmt, arg...) do {                            \
  55         if (m32r_pcc_debug > (lvl))                             \
  56                 printk(KERN_DEBUG "m32r_pcc: " fmt , ## arg);   \
  57 } while (0)
  58 #else
  59 #define debug(n, args...) do { } while (0)
  60 #endif
  61
  62 /* Poll status interval -- 0 means default to interrupt */
  63 static int poll_interval = 0;
  64
  65 typedef enum pcc_space { as_none = 0, as_comm, as_attr, as_io } pcc_as_t;
  66
  67 typedef struct pcc_socket {
  68         u_short                 type, flags;
  69         struct pcmcia_socket    socket;
  70         unsigned int            number;
  71         kio_addr_t              ioaddr;
  72         u_long                  mapaddr;
  73         u_long                  base;   /* PCC register base */
  74         u_char                  cs_irq, intr;
  75         pccard_io_map           io_map[MAX_IO_WIN];
  76         pccard_mem_map          mem_map[MAX_WIN];
  77         u_char                  io_win;
  78         u_char                  mem_win;
  79         pcc_as_t                current_space;
  80         u_char                  last_iodbex;
  81 #ifdef CHAOS_PCC_DEBUG
  82         u_char                  last_iosize;
  83 #endif
  84 #ifdef CONFIG_PROC_FS
  85         struct proc_dir_entry *proc;
  86 #endif
  87 } pcc_socket_t;
  88
  89 static int pcc_sockets = 0;
  90 static pcc_socket_t socket[M32R_MAX_PCC] = {
  91         { 0, }, /* ... */
  92 };
  93
  94 /*====================================================================*/
  95
  96 static unsigned int pcc_get(u_short, unsigned int);
  97 static void pcc_set(u_short, unsigned int , unsigned int );
  98
  99 static DEFINE_SPINLOCK(pcc_lock);
 100
 101 void pcc_iorw(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int wr, int flag)
 102 {
 103         u_long addr;
 104         u_long flags;
 105         int need_ex;
 106 #ifdef PCC_DEBUG_DBEX
 107         int _dbex;
 108 #endif
 109         pcc_socket_t *t = &socket[sock];
 110 #ifdef CHAOS_PCC_DEBUG
 111         int map_changed = 0;
 112 #endif
 113
 114         /* Need lock ? */
 115         spin_lock_irqsave(&pcc_lock, flags);
 116
 117         /*
 118          * Check if need dbex
 119          */
 120         need_ex = (size > 1 && flag == 0) ? PCMOD_DBEX : 0;
 121 #ifdef PCC_DEBUG_DBEX
 122         _dbex = need_ex;
 123         need_ex = 0;
 124 #endif
 125
 126         /*
 127          * calculate access address
 128          */
 129         addr = t->mapaddr + port - t->ioaddr + KSEG1; /* XXX */
 130
 131         /*
 132          * Check current mapping
 133          */
 134         if (t->current_space != as_io || t->last_iodbex != need_ex) {
 135
 136                 u_long cbsz;
 137
 138                 /*
 139                  * Disable first
 140                  */
 141                 pcc_set(sock, PCCR, 0);
 142
 143                 /*
 144                  * Set mode and io address
 145                  */
 146                 cbsz = (t->flags & MAP_16BIT) ? 0 : PCMOD_CBSZ;
 147                 pcc_set(sock, PCMOD, PCMOD_AS_IO | cbsz | need_ex);
 148                 pcc_set(sock, PCADR, addr & 0x1ff00000);
 149
 150                 /*
 151                  * Enable and read it
 152                  */
 153                 pcc_set(sock, PCCR, 1);
 154
 155 #ifdef CHAOS_PCC_DEBUG
 156 #if 0
 157                 map_changed = (t->current_space == as_attr && size == 2); /* XXX */
 158 #else
 159                 map_changed = 1;
 160 #endif
 161 #endif
 162                 t->current_space = as_io;
 163         }
 164
 165         /*
 166          * access to IO space
 167          */
 168         if (size == 1) {
 169                 /* Byte */
 170                 unsigned char *bp = (unsigned char *)buf;
 171
 172 #ifdef CHAOS_DEBUG
 173                 if (map_changed) {
 174                         dummy_readbuf = readb(addr);
 175                 }
 176 #endif
 177                 if (wr) {
 178                         /* write Byte */
 179                         while (nmemb--) {
 180                                 writeb(*bp++, addr);
 181                         }
 182                 } else {
 183                         /* read Byte */
 184                         while (nmemb--) {
 185                         *bp++ = readb(addr);
 186                         }
 187                 }
 188         } else {
 189                 /* Word */
 190                 unsigned short *bp = (unsigned short *)buf;
 191
 192 #ifdef CHAOS_PCC_DEBUG
 193                 if (map_changed) {
 194                         dummy_readbuf = readw(addr);
 195                 }
 196 #endif
 197                 if (wr) {
 198                         /* write Word */
 199                         while (nmemb--) {
 200 #ifdef PCC_DEBUG_DBEX
 201                                 if (_dbex) {
 202                                         unsigned char *cp = (unsigned char *)bp;
 203                                         unsigned short tmp;
 204                                         tmp = cp[1] << 8 | cp[0];
 205                                         writew(tmp, addr);
 206                                         bp++;
 207                                 } else
 208 #endif
 209                                 writew(*bp++, addr);
 210                 }
 211             } else {
 212                 /* read Word */
 213                 while (nmemb--) {
 214 #ifdef  PCC_DEBUG_DBEX
 215                                 if (_dbex) {
 216                                         unsigned char *cp = (unsigned char *)bp;
 217                                         unsigned short tmp;
 218                                         tmp = readw(addr);
 219                                         cp[0] = tmp & 0xff;
 220                                         cp[1] = (tmp >> 8) & 0xff;
 221                                         bp++;
 222                                 } else
 223 #endif
 224                                 *bp++ = readw(addr);
 225                 }
 226             }
 227         }
 228
 229 #if 1
 230         /* addr is no longer used */
 231         if ((addr = pcc_get(sock, PCIRC)) & PCIRC_BWERR) {
 232           printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
 233                          port, size * 8);
 234           pcc_set(sock, PCIRC, addr);
 235         }
 236 #endif
 237         /*
 238          * save state
 239          */
 240         t->last_iosize = size;
 241         t->last_iodbex = need_ex;
 242
 243         /* Need lock ? */
 244
 245         spin_unlock_irqrestore(&pcc_lock,flags);
 246
 247         return;
 248 }
 249
 250 void pcc_ioread(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
 251         pcc_iorw(sock, port, buf, size, nmemb, 0, flag);
 252 }
 253
 254 void pcc_iowrite(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
 255     pcc_iorw(sock, port, buf, size, nmemb, 1, flag);
 256 }
 257
 258 /*====================================================================*/
 259
 260 #define IS_REGISTERED           0x2000
 261 #define IS_ALIVE                0x8000
 262
 263 typedef struct pcc_t {
 264         char                    *name;
 265         u_short                 flags;
 266 } pcc_t;
 267
 268 static pcc_t pcc[] = {
 269         { "xnux2", 0 }, { "xnux2", 0 },
 270 };
 271
 272 static irqreturn_t pcc_interrupt(int, void *, struct pt_regs *);
 273
 274 /*====================================================================*/
 275
 276 static struct timer_list poll_timer;
 277
 278 static unsigned int pcc_get(u_short sock, unsigned int reg)
 279 {
 280         return inl(socket[sock].base + reg);
 281 }
 282
 283
 284 static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
 285 {
 286         outl(data, socket[sock].base + reg);
 287 }
 288
 289 /*======================================================================
 290
 291         See if a card is present, powered up, in IO mode, and already
 292         bound to a (non PC Card) Linux driver.  We leave these alone.
 293
 294         We make an exception for cards that seem to be serial devices.
 295
 296 ======================================================================*/
 297
 298 static int __init is_alive(u_short sock)
 299 {
 300         unsigned int stat;
 301         unsigned int f;
 302
 303         stat = pcc_get(sock, PCIRC);
 304         f = (stat & (PCIRC_CDIN1 | PCIRC_CDIN2)) >> 16;
 305         if(!f){
 306                 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat,sock);
 307                 return 0;
 308         }
 309         if(f!=3)
 310                 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat,sock);
 311         else
 312                 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock,stat);
 313         return 0;
 314 }
 315
 316 static void add_pcc_socket(ulong base, int irq, ulong mapaddr, kio_addr_t ioaddr)
 317 {
 318         pcc_socket_t *t = &socket[pcc_sockets];
 319
 320         /* add sockets */
 321         t->ioaddr = ioaddr;
 322         t->mapaddr = mapaddr;
 323         t->base = base;
 324 #ifdef CHAOS_PCC_DEBUG
 325         t->flags = MAP_16BIT;
 326 #else
 327         t->flags = 0;
 328 #endif
 329         if (is_alive(pcc_sockets))
 330                 t->flags |= IS_ALIVE;
 331
 332         /* add pcc */
 333         if (t->base > 0) {
 334                 request_region(t->base, 0x20, "m32r-pcc");
 335         }
 336
 337         printk(KERN_INFO "  %s ", pcc[pcc_sockets].name);
 338         printk("pcc at 0x%08lx\n", t->base);
 339
 340         /* Update socket interrupt information, capabilities */
 341         t->socket.features |= (SS_CAP_PCCARD | SS_CAP_STATIC_MAP);
 342         t->socket.map_size = M32R_PCC_MAPSIZE;
 343         t->socket.io_offset = ioaddr;   /* use for io access offset */
 344         t->socket.irq_mask = 0;
 345         t->socket.pci_irq = 2 + pcc_sockets; /* XXX */
 346
 347         request_irq(irq, pcc_interrupt, 0, "m32r-pcc", pcc_interrupt);
 348
 349         pcc_sockets++;
 350
 351         return;
 352 }
 353
 354
 355 /*====================================================================*/
 356
 357 static irqreturn_t pcc_interrupt(int irq, void *dev, struct pt_regs *regs)
 358 {
 359         int i, j, irc;
 360         u_int events, active;
 361         int handled = 0;
 362
 363         debug(4, "m32r: pcc_interrupt(%d)\n", irq);
 364
 365         for (j = 0; j < 20; j++) {
 366                 active = 0;
 367                 for (i = 0; i < pcc_sockets; i++) {
 368                         if ((socket[i].cs_irq != irq) &&
 369                                 (socket[i].socket.pci_irq != irq))
 370                                 continue;
 371                         handled = 1;
 372                         irc = pcc_get(i, PCIRC);
 373                         irc >>=16;
 374                         debug(2, "m32r-pcc:interrput: socket %d pcirc 0x%02x ", i, irc);
 375                         if (!irc)
 376                                 continue;
 377
 378                         events = (irc) ? SS_DETECT : 0;
 379                         events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0;
 380                         debug(2, " event 0x%02x\n", events);
 381
 382                         if (events)
 383                                 pcmcia_parse_events(&socket[i].socket, events);
 384
 385                         active |= events;
 386                         active = 0;
 387                 }
 388                 if (!active) break;
 389         }
 390         if (j == 20)
 391                 printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n");
 392
 393         debug(4, "m32r-pcc: interrupt done\n");
 394
 395         return IRQ_RETVAL(handled);
 396 } /* pcc_interrupt */
 397
 398 static void pcc_interrupt_wrapper(u_long data)
 399 {
 400         pcc_interrupt(0, NULL, NULL);
 401         init_timer(&poll_timer);
 402         poll_timer.expires = jiffies + poll_interval;
 403         add_timer(&poll_timer);
 404 }
 405
 406 /*====================================================================*/
 407
 408 static int _pcc_get_status(u_short sock, u_int *value)
 409 {
 410         u_int status;
 411
 412         status = pcc_get(sock,PCIRC);
 413         *value = ((status & PCIRC_CDIN1) && (status & PCIRC_CDIN2))
 414                 ? SS_DETECT : 0;
 415
 416         status = pcc_get(sock,PCCR);
 417
 418 #if 0
 419         *value |= (status & PCCR_PCEN) ? SS_READY : 0;
 420 #else
 421         *value |= SS_READY; /* XXX: always */
 422 #endif
 423
 424         status = pcc_get(sock,PCCSIGCR);
 425         *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0;
 426
 427         debug(3, "m32r-pcc: GetStatus(%d) = %#4.4x\n", sock, *value);
 428         return 0;
 429 } /* _get_status */
 430
 431 /*====================================================================*/
 432
 433 static int _pcc_get_socket(u_short sock, socket_state_t *state)
 434 {
 435         debug(3, "m32r-pcc: GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, "
 436                   "io_irq %d, csc_mask %#2.2x\n", sock, state->flags,
 437                   state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
 438         return 0;
 439 } /* _get_socket */
 440
 441 /*====================================================================*/
 442
 443 static int _pcc_set_socket(u_short sock, socket_state_t *state)
 444 {
 445         u_long reg = 0;
 446
 447         debug(3, "m32r-pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
 448                   "io_irq %d, csc_mask %#2.2x)", sock, state->flags,
 449                   state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
 450
 451         if (state->Vcc) {
 452                 /*
 453                  * 5V only
 454                  */
 455                 if (state->Vcc == 50) {
 456                         reg |= PCCSIGCR_VEN;
 457                 } else {
 458                         return -EINVAL;
 459                 }
 460         }
 461
 462         if (state->flags & SS_RESET) {
 463                 debug(3, ":RESET\n");
 464                 reg |= PCCSIGCR_CRST;
 465         }
 466         if (state->flags & SS_OUTPUT_ENA){
 467                 debug(3, ":OUTPUT_ENA\n");
 468                 /* bit clear */
 469         } else {
 470                 reg |= PCCSIGCR_SEN;
 471         }
 472
 473         pcc_set(sock,PCCSIGCR,reg);
 474
 475 #ifdef DEBUG
 476         if(state->flags & SS_IOCARD){
 477                 debug(3, ":IOCARD");
 478         }
 479         if (state->flags & SS_PWR_AUTO) {
 480                 debug(3, ":PWR_AUTO");
 481         }
 482         if (state->csc_mask & SS_DETECT)
 483                 debug(3, ":csc-SS_DETECT");
 484         if (state->flags & SS_IOCARD) {
 485                 if (state->csc_mask & SS_STSCHG)
 486                         debug(3, ":STSCHG");
 487         } else {
 488                 if (state->csc_mask & SS_BATDEAD)
 489                         debug(3, ":BATDEAD");
 490                 if (state->csc_mask & SS_BATWARN)
 491                         debug(3, ":BATWARN");
 492                 if (state->csc_mask & SS_READY)
 493                         debug(3, ":READY");
 494         }
 495         debug(3, "\n");
 496 #endif
 497         return 0;
 498 } /* _set_socket */
 499
 500 /*====================================================================*/
 501
 502 static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
 503 {
 504         u_char map;
 505
 506         debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
 507                   "%#lx-%#lx)\n", sock, io->map, io->flags,
 508                   io->speed, io->start, io->stop);
 509         map = io->map;
 510
 511         return 0;
 512 } /* _set_io_map */
 513
 514 /*====================================================================*/
 515
 516 static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
 517 {
 518
 519         u_char map = mem->map;
 520         u_long mode;
 521         u_long addr;
 522         pcc_socket_t *t = &socket[sock];
 523 #ifdef CHAOS_PCC_DEBUG
 524 #if 0
 525         pcc_as_t last = t->current_space;
 526 #endif
 527 #endif
 528
 529         debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
 530                  "%#lx,  %#x)\n", sock, map, mem->flags,
 531                  mem->speed, mem->static_start, mem->card_start);
 532
 533         /*
 534          * sanity check
 535          */
 536         if ((map > MAX_WIN) || (mem->card_start > 0x3ffffff)){
 537                 return -EINVAL;
 538         }
 539
 540         /*
 541          * de-activate
 542          */
 543         if ((mem->flags & MAP_ACTIVE) == 0) {
 544                 t->current_space = as_none;
 545                 return 0;
 546         }
 547
 548         /*
 549          * Disable first
 550          */
 551         pcc_set(sock, PCCR, 0);
 552
 553         /*
 554          * Set mode
 555          */
 556         if (mem->flags & MAP_ATTRIB) {
 557                 mode = PCMOD_AS_ATTRIB | PCMOD_CBSZ;
 558                 t->current_space = as_attr;
 559         } else {
 560                 mode = 0; /* common memory */
 561                 t->current_space = as_comm;
 562         }
 563         pcc_set(sock, PCMOD, mode);
 564
 565         /*
 566          * Set address
 567          */
 568         addr = t->mapaddr + (mem->card_start & M32R_PCC_MAPMASK);
 569         pcc_set(sock, PCADR, addr);
 570
 571         mem->static_start = addr + mem->card_start;
 572
 573         /*
 574          * Enable again
 575          */
 576         pcc_set(sock, PCCR, 1);
 577
 578 #ifdef CHAOS_PCC_DEBUG
 579 #if 0
 580         if (last != as_attr) {
 581 #else
 582         if (1) {
 583 #endif
 584                 dummy_readbuf = *(u_char *)(addr + KSEG1);
 585         }
 586 #endif
 587
 588         return 0;
 589
 590 } /* _set_mem_map */
 591
 592 #if 0 /* driver model ordering issue */
 593 /*======================================================================
 594
 595         Routines for accessing socket information and register dumps via
 596         /proc/bus/pccard/...
 597
 598 ======================================================================*/
 599
 600 static ssize_t show_info(struct class_device *class_dev, char *buf)
 601 {
 602         pcc_socket_t *s = container_of(class_dev, struct pcc_socket,
 603                 socket.dev);
 604
 605         return sprintf(buf, "type:     %s\nbase addr:    0x%08lx\n",
 606                 pcc[s->type].name, s->base);
 607 }
 608
 609 static ssize_t show_exca(struct class_device *class_dev, char *buf)
 610 {
 611         /* FIXME */
 612
 613         return 0;
 614 }
 615
 616 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
 617 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
 618 #endif
 619
 620 /*====================================================================*/
 621
 622 /* this is horribly ugly... proper locking needs to be done here at
 623  * some time... */
 624 #define LOCKED(x) do {                                  \
 625         int retval;                                     \
 626         unsigned long flags;                            \
 627         spin_lock_irqsave(&pcc_lock, flags);            \
 628         retval = x;                                     \
 629         spin_unlock_irqrestore(&pcc_lock, flags);       \
 630         return retval;                                  \
 631 } while (0)
 632
 633
 634 static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
 635 {
 636         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
 637
 638         if (socket[sock].flags & IS_ALIVE) {
 639                 *value = 0;
 640                 return -EINVAL;
 641         }
 642         LOCKED(_pcc_get_status(sock, value));
 643 }
 644
 645 static int pcc_get_socket(struct pcmcia_socket *s, socket_state_t *state)
 646 {
 647         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
 648
 649         if (socket[sock].flags & IS_ALIVE)
 650                 return -EINVAL;
 651         LOCKED(_pcc_get_socket(sock, state));
 652 }
 653
 654 static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
 655 {
 656         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
 657
 658         if (socket[sock].flags & IS_ALIVE)
 659                 return -EINVAL;
 660
 661         LOCKED(_pcc_set_socket(sock, state));
 662 }
 663
 664 static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
 665 {
 666         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
 667
 668         if (socket[sock].flags & IS_ALIVE)
 669                 return -EINVAL;
 670         LOCKED(_pcc_set_io_map(sock, io));
 671 }
 672
 673 static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
 674 {
 675         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
 676
 677         if (socket[sock].flags & IS_ALIVE)
 678                 return -EINVAL;
 679         LOCKED(_pcc_set_mem_map(sock, mem));
 680 }
 681
 682 static int pcc_init(struct pcmcia_socket *s)
 683 {
 684         debug(4, "m32r-pcc: init call\n");
 685         return 0;
 686 }
 687
 688 static struct pccard_operations pcc_operations = {
 689         .init                   = pcc_init,
 690         .get_status             = pcc_get_status,
 691         .get_socket             = pcc_get_socket,
 692         .set_socket             = pcc_set_socket,
 693         .set_io_map             = pcc_set_io_map,
 694         .set_mem_map            = pcc_set_mem_map,
 695 };
 696
 697 /*====================================================================*/
 698
 699 static int m32r_pcc_suspend(struct device *dev, pm_message_t state, u32 level)
 700 {
 701         int ret = 0;
 702         if (level == SUSPEND_SAVE_STATE)
 703                 ret = pcmcia_socket_dev_suspend(dev, state);
 704         return ret;
 705 }
 706
 707 static int m32r_pcc_resume(struct device *dev, u32 level)
 708 {
 709         int ret = 0;
 710         if (level == RESUME_RESTORE_STATE)
 711                 ret = pcmcia_socket_dev_resume(dev);
 712         return ret;
 713 }
 714
 715
 716 static struct device_driver pcc_driver = {
 717         .name = "pcc",
 718         .bus = &platform_bus_type,
 719         .suspend = m32r_pcc_suspend,
 720         .resume = m32r_pcc_resume,
 721 };
 722
 723 static struct platform_device pcc_device = {
 724         .name = "pcc",
 725         .id = 0,
 726 };
 727
 728 /*====================================================================*/
 729
 730 static int __init init_m32r_pcc(void)
 731 {
 732         int i, ret;
 733
 734         ret = driver_register(&pcc_driver);
 735         if (ret)
 736                 return ret;
 737
 738         ret = platform_device_register(&pcc_device);
 739         if (ret){
 740                 driver_unregister(&pcc_driver);
 741                 return ret;
 742         }
 743
 744         printk(KERN_INFO "m32r PCC probe:\n");
 745
 746         pcc_sockets = 0;
 747
 748         add_pcc_socket(M32R_PCC0_BASE, PCC0_IRQ, M32R_PCC0_MAPBASE, 0x1000);
 749
 750 #ifdef CONFIG_M32RPCC_SLOT2
 751         add_pcc_socket(M32R_PCC1_BASE, PCC1_IRQ, M32R_PCC1_MAPBASE, 0x2000);
 752 #endif
 753
 754         if (pcc_sockets == 0) {
 755                 printk("socket is not found.\n");
 756                 platform_device_unregister(&pcc_device);
 757                 driver_unregister(&pcc_driver);
 758                 return -ENODEV;
 759         }
 760
 761         /* Set up interrupt handler(s) */
 762
 763         for (i = 0 ; i < pcc_sockets ; i++) {
 764                 socket[i].socket.dev.dev = &pcc_device.dev;
 765                 socket[i].socket.ops = &pcc_operations;
 766                 socket[i].socket.resource_ops = &pccard_static_ops;
 767                 socket[i].socket.owner = THIS_MODULE;
 768                 socket[i].number = i;
 769                 ret = pcmcia_register_socket(&socket[i].socket);
 770                 if (!ret)
 771                         socket[i].flags |= IS_REGISTERED;
 772
 773 #if 0   /* driver model ordering issue */
 774                 class_device_create_file(&socket[i].socket.dev,
 775                                          &class_device_attr_info);
 776                 class_device_create_file(&socket[i].socket.dev,
 777                                          &class_device_attr_exca);
 778 #endif
 779         }
 780
 781         /* Finally, schedule a polling interrupt */
 782         if (poll_interval != 0) {
 783                 poll_timer.function = pcc_interrupt_wrapper;
 784                 poll_timer.data = 0;
 785                 init_timer(&poll_timer);
 786                 poll_timer.expires = jiffies + poll_interval;
 787                 add_timer(&poll_timer);
 788         }
 789
 790         return 0;
 791 } /* init_m32r_pcc */
 792
 793 static void __exit exit_m32r_pcc(void)
 794 {
 795         int i;
 796
 797         for (i = 0; i < pcc_sockets; i++)
 798                 if (socket[i].flags & IS_REGISTERED)
 799                         pcmcia_unregister_socket(&socket[i].socket);
 800
 801         platform_device_unregister(&pcc_device);
 802         if (poll_interval != 0)
 803                 del_timer_sync(&poll_timer);
 804
 805         driver_unregister(&pcc_driver);
 806 } /* exit_m32r_pcc */
 807
 808 module_init(init_m32r_pcc);
 809 module_exit(exit_m32r_pcc);
 810 MODULE_LICENSE("Dual MPL/GPL");
 811 /*====================================================================*/