include/asm-x86_64/tlbflush.h

   1 #ifndef _X8664_TLBFLUSH_H
   2 #define _X8664_TLBFLUSH_H
   3
   4 #include <linux/config.h>
   5 #include <linux/mm.h>
   6 #include <asm/processor.h>
   7
   8 #define __flush_tlb()                                                   \
   9         do {                                                            \
  10                 unsigned long tmpreg;                                   \
  11                                                                         \
  12                 __asm__ __volatile__(                                   \
  13                         "movq %%cr3, %0;  # flush TLB \n"               \
  14                         "movq %0, %%cr3;              \n"               \
  15                         : "=r" (tmpreg)                                 \
  16                         :: "memory");                                   \
  17         } while (0)
  18
  19 /*
  20  * Global pages have to be flushed a bit differently. Not a real
  21  * performance problem because this does not happen often.
  22  */
  23 #define __flush_tlb_global()                                            \
  24         do {                                                            \
  25                 unsigned long tmpreg;                                   \
  26                                                                         \
  27                 __asm__ __volatile__(                                   \
  28                         "movq %1, %%cr4;  # turn off PGE     \n"        \
  29                         "movq %%cr3, %0;  # flush TLB        \n"        \
  30                         "movq %0, %%cr3;                     \n"        \
  31                         "movq %2, %%cr4;  # turn PGE back on \n"        \
  32                         : "=&r" (tmpreg)                                \
  33                         : "r" (mmu_cr4_features & ~X86_CR4_PGE),        \
  34                           "r" (mmu_cr4_features)                        \
  35                         : "memory");                                    \
  36         } while (0)
  37
  38 extern unsigned long pgkern_mask;
  39
  40 #define __flush_tlb_all() __flush_tlb_global()
  41
  42 #define __flush_tlb_one(addr) \
  43         __asm__ __volatile__("invlpg %0": :"m" (*(char *) addr))
  44
  45
  46 /*
  47  * TLB flushing:
  48  *
  49  *  - flush_tlb() flushes the current mm struct TLBs
  50  *  - flush_tlb_all() flushes all processes TLBs
  51  *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
  52  *  - flush_tlb_page(vma, vmaddr) flushes one page
  53  *  - flush_tlb_range(vma, start, end) flushes a range of pages
  54  *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
  55  *  - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
  56  *
  57  * ..but the x86_64 has somewhat limited tlb flushing capabilities,
  58  * and page-granular flushes are available only on i486 and up.
  59  */
  60
  61 #ifndef CONFIG_SMP
  62
  63 #define flush_tlb() __flush_tlb()
  64 #define flush_tlb_all() __flush_tlb_all()
  65 #define local_flush_tlb() __flush_tlb()
  66
  67 static inline void flush_tlb_mm(struct mm_struct *mm)
  68 {
  69         if (mm == current->active_mm)
  70                 __flush_tlb();
  71 }
  72
  73 static inline void flush_tlb_page(struct vm_area_struct *vma,
  74         unsigned long addr)
  75 {
  76         if (vma->vm_mm == current->active_mm)
  77                 __flush_tlb_one(addr);
  78 }
  79
  80 static inline void flush_tlb_range(struct vm_area_struct *vma,
  81         unsigned long start, unsigned long end)
  82 {
  83         if (vma->vm_mm == current->active_mm)
  84                 __flush_tlb();
  85 }
  86
  87 #else
  88
  89 #include <asm/smp.h>
  90
  91 #define local_flush_tlb() \
  92         __flush_tlb()
  93
  94 extern void flush_tlb_all(void);
  95 extern void flush_tlb_current_task(void);
  96 extern void flush_tlb_mm(struct mm_struct *);
  97 extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
  98
  99 #define flush_tlb()     flush_tlb_current_task()
 100
 101 static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end)
 102 {
 103         flush_tlb_mm(vma->vm_mm);
 104 }
 105
 106 #define TLBSTATE_OK     1
 107 #define TLBSTATE_LAZY   2
 108
 109 #endif
 110
 111 #define flush_tlb_kernel_range(start, end) flush_tlb_all()
 112
 113 static inline void flush_tlb_pgtables(struct mm_struct *mm,
 114                                       unsigned long start, unsigned long end)
 115 {
 116         /* x86_64 does not keep any page table caches in TLB */
 117 }
 118
 119 #endif /* _X8664_TLBFLUSH_H */