drivers/gpu/drm/ast/ast_drv.h

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19  *
  20  * The above copyright notice and this permission notice (including the
  21  * next paragraph) shall be included in all copies or substantial portions
  22  * of the Software.
  23  *
  24  */
  25 /*
  26  * Authors: Dave Airlie <airlied@redhat.com>
  27  */
  28 #ifndef __AST_DRV_H__
  29 #define __AST_DRV_H__
  30
  31 #include <linux/types.h>
  32 #include <linux/io.h>
  33 #include <linux/i2c.h>
  34 #include <linux/i2c-algo-bit.h>
  35
  36 #include <drm/drm_connector.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_encoder.h>
  39 #include <drm/drm_mode.h>
  40 #include <drm/drm_framebuffer.h>
  41 #include <drm/drm_fb_helper.h>
  42
  43 #define DRIVER_AUTHOR           "Dave Airlie"
  44
  45 #define DRIVER_NAME             "ast"
  46 #define DRIVER_DESC             "AST"
  47 #define DRIVER_DATE             "20120228"
  48
  49 #define DRIVER_MAJOR            0
  50 #define DRIVER_MINOR            1
  51 #define DRIVER_PATCHLEVEL       0
  52
  53 #define PCI_CHIP_AST2000 0x2000
  54 #define PCI_CHIP_AST2100 0x2010
  55 #define PCI_CHIP_AST1180 0x1180
  56
  57
  58 enum ast_chip {
  59         AST2000,
  60         AST2100,
  61         AST1100,
  62         AST2200,
  63         AST2150,
  64         AST2300,
  65         AST2400,
  66         AST2500,
  67         AST1180,
  68 };
  69
  70 enum ast_tx_chip {
  71         AST_TX_NONE,
  72         AST_TX_SIL164,
  73         AST_TX_ITE66121,
  74         AST_TX_DP501,
  75 };
  76
  77 #define AST_DRAM_512Mx16 0
  78 #define AST_DRAM_1Gx16   1
  79 #define AST_DRAM_512Mx32 2
  80 #define AST_DRAM_1Gx32   3
  81 #define AST_DRAM_2Gx16   6
  82 #define AST_DRAM_4Gx16   7
  83 #define AST_DRAM_8Gx16   8
  84
  85
  86 #define AST_MAX_HWC_WIDTH       64
  87 #define AST_MAX_HWC_HEIGHT      64
  88
  89 #define AST_HWC_SIZE            (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2)
  90 #define AST_HWC_SIGNATURE_SIZE  32
  91
  92 #define AST_DEFAULT_HWC_NUM     2
  93
  94 /* define for signature structure */
  95 #define AST_HWC_SIGNATURE_CHECKSUM      0x00
  96 #define AST_HWC_SIGNATURE_SizeX         0x04
  97 #define AST_HWC_SIGNATURE_SizeY         0x08
  98 #define AST_HWC_SIGNATURE_X             0x0C
  99 #define AST_HWC_SIGNATURE_Y             0x10
 100 #define AST_HWC_SIGNATURE_HOTSPOTX      0x14
 101 #define AST_HWC_SIGNATURE_HOTSPOTY      0x18
 102
 103
 104 struct ast_private {
 105         struct drm_device *dev;
 106
 107         void __iomem *regs;
 108         void __iomem *ioregs;
 109
 110         enum ast_chip chip;
 111         bool vga2_clone;
 112         uint32_t dram_bus_width;
 113         uint32_t dram_type;
 114         uint32_t mclk;
 115         uint32_t vram_size;
 116
 117         int fb_mtrr;
 118
 119         struct {
 120                 struct drm_gem_vram_object *gbo[AST_DEFAULT_HWC_NUM];
 121                 unsigned int next_index;
 122         } cursor;
 123
 124         struct drm_plane primary_plane;
 125         struct drm_plane cursor_plane;
 126
 127         bool support_wide_screen;
 128         enum {
 129                 ast_use_p2a,
 130                 ast_use_dt,
 131                 ast_use_defaults
 132         } config_mode;
 133
 134         enum ast_tx_chip tx_chip_type;
 135         u8 dp501_maxclk;
 136         u8 *dp501_fw_addr;
 137         const struct firmware *dp501_fw;        /* dp501 fw */
 138 };
 139
 140 int ast_driver_load(struct drm_device *dev, unsigned long flags);
 141 void ast_driver_unload(struct drm_device *dev);
 142
 143 #define AST_IO_AR_PORT_WRITE            (0x40)
 144 #define AST_IO_MISC_PORT_WRITE          (0x42)
 145 #define AST_IO_VGA_ENABLE_PORT          (0x43)
 146 #define AST_IO_SEQ_PORT                 (0x44)
 147 #define AST_IO_DAC_INDEX_READ           (0x47)
 148 #define AST_IO_DAC_INDEX_WRITE          (0x48)
 149 #define AST_IO_DAC_DATA                 (0x49)
 150 #define AST_IO_GR_PORT                  (0x4E)
 151 #define AST_IO_CRTC_PORT                (0x54)
 152 #define AST_IO_INPUT_STATUS1_READ       (0x5A)
 153 #define AST_IO_MISC_PORT_READ           (0x4C)
 154
 155 #define AST_IO_MM_OFFSET                (0x380)
 156
 157 #define __ast_read(x) \
 158 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
 159 u##x val = 0;\
 160 val = ioread##x(ast->regs + reg); \
 161 return val;\
 162 }
 163
 164 __ast_read(8);
 165 __ast_read(16);
 166 __ast_read(32)
 167
 168 #define __ast_io_read(x) \
 169 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \
 170 u##x val = 0;\
 171 val = ioread##x(ast->ioregs + reg); \
 172 return val;\
 173 }
 174
 175 __ast_io_read(8);
 176 __ast_io_read(16);
 177 __ast_io_read(32);
 178
 179 #define __ast_write(x) \
 180 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\
 181         iowrite##x(val, ast->regs + reg);\
 182         }
 183
 184 __ast_write(8);
 185 __ast_write(16);
 186 __ast_write(32);
 187
 188 #define __ast_io_write(x) \
 189 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\
 190         iowrite##x(val, ast->ioregs + reg);\
 191         }
 192
 193 __ast_io_write(8);
 194 __ast_io_write(16);
 195 #undef __ast_io_write
 196
 197 static inline void ast_set_index_reg(struct ast_private *ast,
 198                                      uint32_t base, uint8_t index,
 199                                      uint8_t val)
 200 {
 201         ast_io_write16(ast, base, ((u16)val << 8) | index);
 202 }
 203
 204 void ast_set_index_reg_mask(struct ast_private *ast,
 205                             uint32_t base, uint8_t index,
 206                             uint8_t mask, uint8_t val);
 207 uint8_t ast_get_index_reg(struct ast_private *ast,
 208                           uint32_t base, uint8_t index);
 209 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
 210                                uint32_t base, uint8_t index, uint8_t mask);
 211
 212 static inline void ast_open_key(struct ast_private *ast)
 213 {
 214         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8);
 215 }
 216
 217 #define AST_VIDMEM_SIZE_8M    0x00800000
 218 #define AST_VIDMEM_SIZE_16M   0x01000000
 219 #define AST_VIDMEM_SIZE_32M   0x02000000
 220 #define AST_VIDMEM_SIZE_64M   0x04000000
 221 #define AST_VIDMEM_SIZE_128M  0x08000000
 222
 223 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
 224
 225 struct ast_i2c_chan {
 226         struct i2c_adapter adapter;
 227         struct drm_device *dev;
 228         struct i2c_algo_bit_data bit;
 229 };
 230
 231 struct ast_connector {
 232         struct drm_connector base;
 233         struct ast_i2c_chan *i2c;
 234 };
 235
 236 struct ast_crtc {
 237         struct drm_crtc base;
 238         u8 offset_x, offset_y;
 239 };
 240
 241 struct ast_encoder {
 242         struct drm_encoder base;
 243 };
 244
 245 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base)
 246 #define to_ast_connector(x) container_of(x, struct ast_connector, base)
 247 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base)
 248
 249 struct ast_vbios_stdtable {
 250         u8 misc;
 251         u8 seq[4];
 252         u8 crtc[25];
 253         u8 ar[20];
 254         u8 gr[9];
 255 };
 256
 257 struct ast_vbios_enhtable {
 258         u32 ht;
 259         u32 hde;
 260         u32 hfp;
 261         u32 hsync;
 262         u32 vt;
 263         u32 vde;
 264         u32 vfp;
 265         u32 vsync;
 266         u32 dclk_index;
 267         u32 flags;
 268         u32 refresh_rate;
 269         u32 refresh_rate_index;
 270         u32 mode_id;
 271 };
 272
 273 struct ast_vbios_dclk_info {
 274         u8 param1;
 275         u8 param2;
 276         u8 param3;
 277 };
 278
 279 struct ast_vbios_mode_info {
 280         const struct ast_vbios_stdtable *std_table;
 281         const struct ast_vbios_enhtable *enh_table;
 282 };
 283
 284 struct ast_crtc_state {
 285         struct drm_crtc_state base;
 286
 287         /* Last known format of primary plane */
 288         const struct drm_format_info *format;
 289
 290         struct ast_vbios_mode_info vbios_mode_info;
 291 };
 292
 293 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base)
 294
 295 extern int ast_mode_init(struct drm_device *dev);
 296 extern void ast_mode_fini(struct drm_device *dev);
 297
 298 #define AST_MM_ALIGN_SHIFT 4
 299 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
 300
 301 int ast_mm_init(struct ast_private *ast);
 302 void ast_mm_fini(struct ast_private *ast);
 303
 304 /* ast post */
 305 void ast_enable_vga(struct drm_device *dev);
 306 void ast_enable_mmio(struct drm_device *dev);
 307 bool ast_is_vga_enabled(struct drm_device *dev);
 308 void ast_post_gpu(struct drm_device *dev);
 309 u32 ast_mindwm(struct ast_private *ast, u32 r);
 310 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v);
 311 /* ast dp501 */
 312 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode);
 313 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);
 314 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata);
 315 u8 ast_get_dp501_max_clk(struct drm_device *dev);
 316 void ast_init_3rdtx(struct drm_device *dev);
 317 void ast_release_firmware(struct drm_device *dev);
 318 #endif