drivers/gpu/drm/i915/display/intel_bw.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5
   6 #ifndef __INTEL_BW_H__
   7 #define __INTEL_BW_H__
   8
   9 #include <drm/drm_atomic.h>
  10
  11 #include "intel_display.h"
  12
  13 struct drm_i915_private;
  14 struct intel_atomic_state;
  15 struct intel_crtc_state;
  16
  17 struct intel_bw_state {
  18         struct drm_private_state base;
  19
  20         unsigned int data_rate[I915_MAX_PIPES];
  21         u8 num_active_planes[I915_MAX_PIPES];
  22 };
  23
  24 #define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base)
  25
  26 void intel_bw_init_hw(struct drm_i915_private *dev_priv);
  27 int intel_bw_init(struct drm_i915_private *dev_priv);
  28 void intel_bw_cleanup(struct drm_i915_private *dev_priv);
  29 int intel_bw_atomic_check(struct intel_atomic_state *state);
  30 void intel_bw_crtc_update(struct intel_bw_state *bw_state,
  31                           const struct intel_crtc_state *crtc_state);
  32
  33 #endif /* __INTEL_BW_H__ */