Merge branch 'akpm' (patches from Andrew)
[linux/fpc-iii.git] / drivers / gpu / drm / i915 / intel_pch.c
blob4ed60e1f01dbaa367d6ccda97fc35f7bab0f5c49
1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright 2019 Intel Corporation.
4 */
6 #include "i915_drv.h"
7 #include "intel_pch.h"
9 /* Map PCH device id to PCH type, or PCH_NONE if unknown. */
10 static enum intel_pch
11 intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
13 switch (id) {
14 case INTEL_PCH_IBX_DEVICE_ID_TYPE:
15 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n");
16 WARN_ON(!IS_GEN(dev_priv, 5));
17 return PCH_IBX;
18 case INTEL_PCH_CPT_DEVICE_ID_TYPE:
19 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n");
20 WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
21 return PCH_CPT;
22 case INTEL_PCH_PPT_DEVICE_ID_TYPE:
23 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n");
24 WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
25 /* PantherPoint is CPT compatible */
26 return PCH_CPT;
27 case INTEL_PCH_LPT_DEVICE_ID_TYPE:
28 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n");
29 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
30 WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
31 return PCH_LPT;
32 case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
33 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n");
34 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
35 WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
36 return PCH_LPT;
37 case INTEL_PCH_WPT_DEVICE_ID_TYPE:
38 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n");
39 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
40 WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
41 /* WildcatPoint is LPT compatible */
42 return PCH_LPT;
43 case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
44 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n");
45 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
46 WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
47 /* WildcatPoint is LPT compatible */
48 return PCH_LPT;
49 case INTEL_PCH_SPT_DEVICE_ID_TYPE:
50 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n");
51 WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
52 return PCH_SPT;
53 case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
54 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n");
55 WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
56 !IS_COFFEELAKE(dev_priv));
57 return PCH_SPT;
58 case INTEL_PCH_KBP_DEVICE_ID_TYPE:
59 drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n");
60 WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
61 !IS_COFFEELAKE(dev_priv));
62 /* KBP is SPT compatible */
63 return PCH_SPT;
64 case INTEL_PCH_CNP_DEVICE_ID_TYPE:
65 drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n");
66 WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
67 return PCH_CNP;
68 case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
69 drm_dbg_kms(&dev_priv->drm,
70 "Found Cannon Lake LP PCH (CNP-LP)\n");
71 WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
72 return PCH_CNP;
73 case INTEL_PCH_CMP_DEVICE_ID_TYPE:
74 case INTEL_PCH_CMP2_DEVICE_ID_TYPE:
75 drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n");
76 WARN_ON(!IS_COFFEELAKE(dev_priv));
77 /* CometPoint is CNP Compatible */
78 return PCH_CNP;
79 case INTEL_PCH_CMP_V_DEVICE_ID_TYPE:
80 drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n");
81 WARN_ON(!IS_COFFEELAKE(dev_priv));
82 /* Comet Lake V PCH is based on KBP, which is SPT compatible */
83 return PCH_SPT;
84 case INTEL_PCH_ICP_DEVICE_ID_TYPE:
85 drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n");
86 WARN_ON(!IS_ICELAKE(dev_priv));
87 return PCH_ICP;
88 case INTEL_PCH_MCC_DEVICE_ID_TYPE:
89 drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n");
90 WARN_ON(!IS_ELKHARTLAKE(dev_priv));
91 return PCH_MCC;
92 case INTEL_PCH_TGP_DEVICE_ID_TYPE:
93 case INTEL_PCH_TGP2_DEVICE_ID_TYPE:
94 drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n");
95 WARN_ON(!IS_TIGERLAKE(dev_priv));
96 return PCH_TGP;
97 case INTEL_PCH_JSP_DEVICE_ID_TYPE:
98 case INTEL_PCH_JSP2_DEVICE_ID_TYPE:
99 drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");
100 WARN_ON(!IS_ELKHARTLAKE(dev_priv));
101 return PCH_JSP;
102 default:
103 return PCH_NONE;
107 static bool intel_is_virt_pch(unsigned short id,
108 unsigned short svendor, unsigned short sdevice)
110 return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
111 id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
112 (id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
113 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
114 sdevice == PCI_SUBDEVICE_ID_QEMU));
117 static unsigned short
118 intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
120 unsigned short id = 0;
123 * In a virtualized passthrough environment we can be in a
124 * setup where the ISA bridge is not able to be passed through.
125 * In this case, a south bridge can be emulated and we have to
126 * make an educated guess as to which PCH is really there.
129 if (IS_TIGERLAKE(dev_priv))
130 id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
131 else if (IS_ELKHARTLAKE(dev_priv))
132 id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
133 else if (IS_ICELAKE(dev_priv))
134 id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
135 else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
136 id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
137 else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
138 id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
139 else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
140 id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
141 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
142 id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
143 else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
144 id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
145 else if (IS_GEN(dev_priv, 5))
146 id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
148 if (id)
149 drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id);
150 else
151 drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n");
153 return id;
156 void intel_detect_pch(struct drm_i915_private *dev_priv)
158 struct pci_dev *pch = NULL;
161 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
162 * make graphics device passthrough work easy for VMM, that only
163 * need to expose ISA bridge to let driver know the real hardware
164 * underneath. This is a requirement from virtualization team.
166 * In some virtualized environments (e.g. XEN), there is irrelevant
167 * ISA bridge in the system. To work reliably, we should scan trhough
168 * all the ISA bridge devices and check for the first match, instead
169 * of only checking the first one.
171 while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
172 unsigned short id;
173 enum intel_pch pch_type;
175 if (pch->vendor != PCI_VENDOR_ID_INTEL)
176 continue;
178 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
180 pch_type = intel_pch_type(dev_priv, id);
181 if (pch_type != PCH_NONE) {
182 dev_priv->pch_type = pch_type;
183 dev_priv->pch_id = id;
184 break;
185 } else if (intel_is_virt_pch(id, pch->subsystem_vendor,
186 pch->subsystem_device)) {
187 id = intel_virt_detect_pch(dev_priv);
188 pch_type = intel_pch_type(dev_priv, id);
190 /* Sanity check virtual PCH id */
191 if (WARN_ON(id && pch_type == PCH_NONE))
192 id = 0;
194 dev_priv->pch_type = pch_type;
195 dev_priv->pch_id = id;
196 break;
201 * Use PCH_NOP (PCH but no South Display) for PCH platforms without
202 * display.
204 if (pch && !HAS_DISPLAY(dev_priv)) {
205 drm_dbg_kms(&dev_priv->drm,
206 "Display disabled, reverting to NOP PCH\n");
207 dev_priv->pch_type = PCH_NOP;
208 dev_priv->pch_id = 0;
211 if (!pch)
212 drm_dbg_kms(&dev_priv->drm, "No PCH found.\n");
214 pci_dev_put(pch);