drivers/gpu/drm/virtio/virtgpu_ioctl.c

   1 /*
   2  * Copyright (C) 2015 Red Hat, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Authors:
   6  *    Dave Airlie
   7  *    Alon Levy
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include <linux/file.h>
  29 #include <linux/sync_file.h>
  30
  31 #include <drm/drm_file.h>
  32 #include <drm/virtgpu_drm.h>
  33
  34 #include "virtgpu_drv.h"
  35
  36 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
  37                                 struct drm_file *file_priv)
  38 {
  39         struct virtio_gpu_device *vgdev = dev->dev_private;
  40         struct drm_virtgpu_map *virtio_gpu_map = data;
  41
  42         return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev,
  43                                          virtio_gpu_map->handle,
  44                                          &virtio_gpu_map->offset);
  45 }
  46
  47 /*
  48  * Usage of execbuffer:
  49  * Relocations need to take into account the full VIRTIO_GPUDrawable size.
  50  * However, the command as passed from user space must *not* contain the initial
  51  * VIRTIO_GPUReleaseInfo struct (first XXX bytes)
  52  */
  53 static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
  54                                  struct drm_file *drm_file)
  55 {
  56         struct drm_virtgpu_execbuffer *exbuf = data;
  57         struct virtio_gpu_device *vgdev = dev->dev_private;
  58         struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
  59         struct virtio_gpu_fence *out_fence;
  60         int ret;
  61         uint32_t *bo_handles = NULL;
  62         void __user *user_bo_handles = NULL;
  63         struct virtio_gpu_object_array *buflist = NULL;
  64         struct sync_file *sync_file;
  65         int in_fence_fd = exbuf->fence_fd;
  66         int out_fence_fd = -1;
  67         void *buf;
  68
  69         if (vgdev->has_virgl_3d == false)
  70                 return -ENOSYS;
  71
  72         if ((exbuf->flags & ~VIRTGPU_EXECBUF_FLAGS))
  73                 return -EINVAL;
  74
  75         exbuf->fence_fd = -1;
  76
  77         if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_IN) {
  78                 struct dma_fence *in_fence;
  79
  80                 in_fence = sync_file_get_fence(in_fence_fd);
  81
  82                 if (!in_fence)
  83                         return -EINVAL;
  84
  85                 /*
  86                  * Wait if the fence is from a foreign context, or if the fence
  87                  * array contains any fence from a foreign context.
  88                  */
  89                 ret = 0;
  90                 if (!dma_fence_match_context(in_fence, vgdev->fence_drv.context))
  91                         ret = dma_fence_wait(in_fence, true);
  92
  93                 dma_fence_put(in_fence);
  94                 if (ret)
  95                         return ret;
  96         }
  97
  98         if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_OUT) {
  99                 out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
 100                 if (out_fence_fd < 0)
 101                         return out_fence_fd;
 102         }
 103
 104         if (exbuf->num_bo_handles) {
 105                 bo_handles = kvmalloc_array(exbuf->num_bo_handles,
 106                                             sizeof(uint32_t), GFP_KERNEL);
 107                 if (!bo_handles) {
 108                         ret = -ENOMEM;
 109                         goto out_unused_fd;
 110                 }
 111
 112                 user_bo_handles = u64_to_user_ptr(exbuf->bo_handles);
 113                 if (copy_from_user(bo_handles, user_bo_handles,
 114                                    exbuf->num_bo_handles * sizeof(uint32_t))) {
 115                         ret = -EFAULT;
 116                         goto out_unused_fd;
 117                 }
 118
 119                 buflist = virtio_gpu_array_from_handles(drm_file, bo_handles,
 120                                                         exbuf->num_bo_handles);
 121                 if (!buflist) {
 122                         ret = -ENOENT;
 123                         goto out_unused_fd;
 124                 }
 125                 kvfree(bo_handles);
 126                 bo_handles = NULL;
 127         }
 128
 129         if (buflist) {
 130                 ret = virtio_gpu_array_lock_resv(buflist);
 131                 if (ret)
 132                         goto out_unused_fd;
 133         }
 134
 135         buf = vmemdup_user(u64_to_user_ptr(exbuf->command), exbuf->size);
 136         if (IS_ERR(buf)) {
 137                 ret = PTR_ERR(buf);
 138                 goto out_unresv;
 139         }
 140
 141         out_fence = virtio_gpu_fence_alloc(vgdev);
 142         if(!out_fence) {
 143                 ret = -ENOMEM;
 144                 goto out_memdup;
 145         }
 146
 147         if (out_fence_fd >= 0) {
 148                 sync_file = sync_file_create(&out_fence->f);
 149                 if (!sync_file) {
 150                         dma_fence_put(&out_fence->f);
 151                         ret = -ENOMEM;
 152                         goto out_memdup;
 153                 }
 154
 155                 exbuf->fence_fd = out_fence_fd;
 156                 fd_install(out_fence_fd, sync_file->file);
 157         }
 158
 159         virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
 160                               vfpriv->ctx_id, buflist, out_fence);
 161         return 0;
 162
 163 out_memdup:
 164         kvfree(buf);
 165 out_unresv:
 166         if (buflist)
 167                 virtio_gpu_array_unlock_resv(buflist);
 168 out_unused_fd:
 169         kvfree(bo_handles);
 170         if (buflist)
 171                 virtio_gpu_array_put_free(buflist);
 172
 173         if (out_fence_fd >= 0)
 174                 put_unused_fd(out_fence_fd);
 175
 176         return ret;
 177 }
 178
 179 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
 180                                      struct drm_file *file_priv)
 181 {
 182         struct virtio_gpu_device *vgdev = dev->dev_private;
 183         struct drm_virtgpu_getparam *param = data;
 184         int value;
 185
 186         switch (param->param) {
 187         case VIRTGPU_PARAM_3D_FEATURES:
 188                 value = vgdev->has_virgl_3d == true ? 1 : 0;
 189                 break;
 190         case VIRTGPU_PARAM_CAPSET_QUERY_FIX:
 191                 value = 1;
 192                 break;
 193         default:
 194                 return -EINVAL;
 195         }
 196         if (copy_to_user(u64_to_user_ptr(param->value), &value, sizeof(int)))
 197                 return -EFAULT;
 198
 199         return 0;
 200 }
 201
 202 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
 203                                             struct drm_file *file_priv)
 204 {
 205         struct virtio_gpu_device *vgdev = dev->dev_private;
 206         struct drm_virtgpu_resource_create *rc = data;
 207         struct virtio_gpu_fence *fence;
 208         int ret;
 209         struct virtio_gpu_object *qobj;
 210         struct drm_gem_object *obj;
 211         uint32_t handle = 0;
 212         struct virtio_gpu_object_params params = { 0 };
 213
 214         if (vgdev->has_virgl_3d == false) {
 215                 if (rc->depth > 1)
 216                         return -EINVAL;
 217                 if (rc->nr_samples > 1)
 218                         return -EINVAL;
 219                 if (rc->last_level > 1)
 220                         return -EINVAL;
 221                 if (rc->target != 2)
 222                         return -EINVAL;
 223                 if (rc->array_size > 1)
 224                         return -EINVAL;
 225         }
 226
 227         params.format = rc->format;
 228         params.width = rc->width;
 229         params.height = rc->height;
 230         params.size = rc->size;
 231         if (vgdev->has_virgl_3d) {
 232                 params.virgl = true;
 233                 params.target = rc->target;
 234                 params.bind = rc->bind;
 235                 params.depth = rc->depth;
 236                 params.array_size = rc->array_size;
 237                 params.last_level = rc->last_level;
 238                 params.nr_samples = rc->nr_samples;
 239                 params.flags = rc->flags;
 240         }
 241         /* allocate a single page size object */
 242         if (params.size == 0)
 243                 params.size = PAGE_SIZE;
 244
 245         fence = virtio_gpu_fence_alloc(vgdev);
 246         if (!fence)
 247                 return -ENOMEM;
 248         ret = virtio_gpu_object_create(vgdev, &params, &qobj, fence);
 249         dma_fence_put(&fence->f);
 250         if (ret < 0)
 251                 return ret;
 252         obj = &qobj->base.base;
 253
 254         ret = drm_gem_handle_create(file_priv, obj, &handle);
 255         if (ret) {
 256                 drm_gem_object_release(obj);
 257                 return ret;
 258         }
 259         drm_gem_object_put_unlocked(obj);
 260
 261         rc->res_handle = qobj->hw_res_handle; /* similiar to a VM address */
 262         rc->bo_handle = handle;
 263         return 0;
 264 }
 265
 266 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
 267                                           struct drm_file *file_priv)
 268 {
 269         struct drm_virtgpu_resource_info *ri = data;
 270         struct drm_gem_object *gobj = NULL;
 271         struct virtio_gpu_object *qobj = NULL;
 272
 273         gobj = drm_gem_object_lookup(file_priv, ri->bo_handle);
 274         if (gobj == NULL)
 275                 return -ENOENT;
 276
 277         qobj = gem_to_virtio_gpu_obj(gobj);
 278
 279         ri->size = qobj->base.base.size;
 280         ri->res_handle = qobj->hw_res_handle;
 281         drm_gem_object_put_unlocked(gobj);
 282         return 0;
 283 }
 284
 285 static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
 286                                                void *data,
 287                                                struct drm_file *file)
 288 {
 289         struct virtio_gpu_device *vgdev = dev->dev_private;
 290         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 291         struct drm_virtgpu_3d_transfer_from_host *args = data;
 292         struct virtio_gpu_object_array *objs;
 293         struct virtio_gpu_fence *fence;
 294         int ret;
 295         u32 offset = args->offset;
 296
 297         if (vgdev->has_virgl_3d == false)
 298                 return -ENOSYS;
 299
 300         objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
 301         if (objs == NULL)
 302                 return -ENOENT;
 303
 304         ret = virtio_gpu_array_lock_resv(objs);
 305         if (ret != 0)
 306                 goto err_put_free;
 307
 308         fence = virtio_gpu_fence_alloc(vgdev);
 309         if (!fence) {
 310                 ret = -ENOMEM;
 311                 goto err_unlock;
 312         }
 313         virtio_gpu_cmd_transfer_from_host_3d
 314                 (vgdev, vfpriv->ctx_id, offset, args->level,
 315                  &args->box, objs, fence);
 316         dma_fence_put(&fence->f);
 317         return 0;
 318
 319 err_unlock:
 320         virtio_gpu_array_unlock_resv(objs);
 321 err_put_free:
 322         virtio_gpu_array_put_free(objs);
 323         return ret;
 324 }
 325
 326 static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
 327                                              struct drm_file *file)
 328 {
 329         struct virtio_gpu_device *vgdev = dev->dev_private;
 330         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 331         struct drm_virtgpu_3d_transfer_to_host *args = data;
 332         struct virtio_gpu_object_array *objs;
 333         struct virtio_gpu_fence *fence;
 334         int ret;
 335         u32 offset = args->offset;
 336
 337         objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
 338         if (objs == NULL)
 339                 return -ENOENT;
 340
 341         if (!vgdev->has_virgl_3d) {
 342                 virtio_gpu_cmd_transfer_to_host_2d
 343                         (vgdev, offset,
 344                          args->box.w, args->box.h, args->box.x, args->box.y,
 345                          objs, NULL);
 346         } else {
 347                 ret = virtio_gpu_array_lock_resv(objs);
 348                 if (ret != 0)
 349                         goto err_put_free;
 350
 351                 ret = -ENOMEM;
 352                 fence = virtio_gpu_fence_alloc(vgdev);
 353                 if (!fence)
 354                         goto err_unlock;
 355
 356                 virtio_gpu_cmd_transfer_to_host_3d
 357                         (vgdev,
 358                          vfpriv ? vfpriv->ctx_id : 0, offset,
 359                          args->level, &args->box, objs, fence);
 360                 dma_fence_put(&fence->f);
 361         }
 362         return 0;
 363
 364 err_unlock:
 365         virtio_gpu_array_unlock_resv(objs);
 366 err_put_free:
 367         virtio_gpu_array_put_free(objs);
 368         return ret;
 369 }
 370
 371 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
 372                                  struct drm_file *file)
 373 {
 374         struct drm_virtgpu_3d_wait *args = data;
 375         struct drm_gem_object *obj;
 376         long timeout = 15 * HZ;
 377         int ret;
 378
 379         obj = drm_gem_object_lookup(file, args->handle);
 380         if (obj == NULL)
 381                 return -ENOENT;
 382
 383         if (args->flags & VIRTGPU_WAIT_NOWAIT) {
 384                 ret = dma_resv_test_signaled_rcu(obj->resv, true);
 385         } else {
 386                 ret = dma_resv_wait_timeout_rcu(obj->resv, true, true,
 387                                                 timeout);
 388         }
 389         if (ret == 0)
 390                 ret = -EBUSY;
 391         else if (ret > 0)
 392                 ret = 0;
 393
 394         drm_gem_object_put_unlocked(obj);
 395         return ret;
 396 }
 397
 398 static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 399                                 void *data, struct drm_file *file)
 400 {
 401         struct virtio_gpu_device *vgdev = dev->dev_private;
 402         struct drm_virtgpu_get_caps *args = data;
 403         unsigned size, host_caps_size;
 404         int i;
 405         int found_valid = -1;
 406         int ret;
 407         struct virtio_gpu_drv_cap_cache *cache_ent;
 408         void *ptr;
 409
 410         if (vgdev->num_capsets == 0)
 411                 return -ENOSYS;
 412
 413         /* don't allow userspace to pass 0 */
 414         if (args->size == 0)
 415                 return -EINVAL;
 416
 417         spin_lock(&vgdev->display_info_lock);
 418         for (i = 0; i < vgdev->num_capsets; i++) {
 419                 if (vgdev->capsets[i].id == args->cap_set_id) {
 420                         if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
 421                                 found_valid = i;
 422                                 break;
 423                         }
 424                 }
 425         }
 426
 427         if (found_valid == -1) {
 428                 spin_unlock(&vgdev->display_info_lock);
 429                 return -EINVAL;
 430         }
 431
 432         host_caps_size = vgdev->capsets[found_valid].max_size;
 433         /* only copy to user the minimum of the host caps size or the guest caps size */
 434         size = min(args->size, host_caps_size);
 435
 436         list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
 437                 if (cache_ent->id == args->cap_set_id &&
 438                     cache_ent->version == args->cap_set_ver) {
 439                         spin_unlock(&vgdev->display_info_lock);
 440                         goto copy_exit;
 441                 }
 442         }
 443         spin_unlock(&vgdev->display_info_lock);
 444
 445         /* not in cache - need to talk to hw */
 446         virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
 447                                   &cache_ent);
 448
 449 copy_exit:
 450         ret = wait_event_timeout(vgdev->resp_wq,
 451                                  atomic_read(&cache_ent->is_valid), 5 * HZ);
 452         if (!ret)
 453                 return -EBUSY;
 454
 455         /* is_valid check must proceed before copy of the cache entry. */
 456         smp_rmb();
 457
 458         ptr = cache_ent->caps_cache;
 459
 460         if (copy_to_user(u64_to_user_ptr(args->addr), ptr, size))
 461                 return -EFAULT;
 462
 463         return 0;
 464 }
 465
 466 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
 467         DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
 468                           DRM_RENDER_ALLOW),
 469
 470         DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
 471                           DRM_RENDER_ALLOW),
 472
 473         DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
 474                           DRM_RENDER_ALLOW),
 475
 476         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
 477                           virtio_gpu_resource_create_ioctl,
 478                           DRM_RENDER_ALLOW),
 479
 480         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
 481                           DRM_RENDER_ALLOW),
 482
 483         /* make transfer async to the main ring? - no sure, can we
 484          * thread these in the underlying GL
 485          */
 486         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
 487                           virtio_gpu_transfer_from_host_ioctl,
 488                           DRM_RENDER_ALLOW),
 489         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
 490                           virtio_gpu_transfer_to_host_ioctl,
 491                           DRM_RENDER_ALLOW),
 492
 493         DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
 494                           DRM_RENDER_ALLOW),
 495
 496         DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
 497                           DRM_RENDER_ALLOW),
 498 };