Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / arch / arm / kernel / perf_event_cpu.c
blob20d553c9f5e2928a0c4321878a30520dde87656d
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 * Copyright (C) 2012 ARM Limited
17 * Author: Will Deacon <will.deacon@arm.com>
19 #define pr_fmt(fmt) "CPU PMU: " fmt
21 #include <linux/bitmap.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/of.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
29 #include <asm/cputype.h>
30 #include <asm/irq_regs.h>
31 #include <asm/pmu.h>
33 /* Set at runtime when we know what CPU type we are. */
34 static struct arm_pmu *cpu_pmu;
36 static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events);
37 static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask);
38 static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events);
41 * Despite the names, these two functions are CPU-specific and are used
42 * by the OProfile/perf code.
44 const char *perf_pmu_name(void)
46 if (!cpu_pmu)
47 return NULL;
49 return cpu_pmu->name;
51 EXPORT_SYMBOL_GPL(perf_pmu_name);
53 int perf_num_counters(void)
55 int max_events = 0;
57 if (cpu_pmu != NULL)
58 max_events = cpu_pmu->num_events;
60 return max_events;
62 EXPORT_SYMBOL_GPL(perf_num_counters);
64 /* Include the PMU-specific implementations. */
65 #include "perf_event_xscale.c"
66 #include "perf_event_v6.c"
67 #include "perf_event_v7.c"
69 static struct pmu_hw_events *cpu_pmu_get_cpu_events(void)
71 return this_cpu_ptr(&cpu_hw_events);
74 static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
76 int i, irq, irqs;
77 struct platform_device *pmu_device = cpu_pmu->plat_device;
79 irqs = min(pmu_device->num_resources, num_possible_cpus());
81 for (i = 0; i < irqs; ++i) {
82 if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
83 continue;
84 irq = platform_get_irq(pmu_device, i);
85 if (irq >= 0)
86 free_irq(irq, cpu_pmu);
90 static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
92 int i, err, irq, irqs;
93 struct platform_device *pmu_device = cpu_pmu->plat_device;
95 if (!pmu_device)
96 return -ENODEV;
98 irqs = min(pmu_device->num_resources, num_possible_cpus());
99 if (irqs < 1) {
100 pr_err("no irqs for PMUs defined\n");
101 return -ENODEV;
104 for (i = 0; i < irqs; ++i) {
105 err = 0;
106 irq = platform_get_irq(pmu_device, i);
107 if (irq < 0)
108 continue;
111 * If we have a single PMU interrupt that we can't shift,
112 * assume that we're running on a uniprocessor machine and
113 * continue. Otherwise, continue without this interrupt.
115 if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
116 pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
117 irq, i);
118 continue;
121 err = request_irq(irq, handler,
122 IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
123 cpu_pmu);
124 if (err) {
125 pr_err("unable to request IRQ%d for ARM PMU counters\n",
126 irq);
127 return err;
130 cpumask_set_cpu(i, &cpu_pmu->active_irqs);
133 return 0;
136 static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
138 int cpu;
139 for_each_possible_cpu(cpu) {
140 struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu);
141 events->events = per_cpu(hw_events, cpu);
142 events->used_mask = per_cpu(used_mask, cpu);
143 raw_spin_lock_init(&events->pmu_lock);
146 cpu_pmu->get_hw_events = cpu_pmu_get_cpu_events;
147 cpu_pmu->request_irq = cpu_pmu_request_irq;
148 cpu_pmu->free_irq = cpu_pmu_free_irq;
150 /* Ensure the PMU has sane values out of reset. */
151 if (cpu_pmu->reset)
152 on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
156 * PMU hardware loses all context when a CPU goes offline.
157 * When a CPU is hotplugged back in, since some hardware registers are
158 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
159 * junk values out of them.
161 static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
162 void *hcpu)
164 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
165 return NOTIFY_DONE;
167 if (cpu_pmu && cpu_pmu->reset)
168 cpu_pmu->reset(cpu_pmu);
169 else
170 return NOTIFY_DONE;
172 return NOTIFY_OK;
175 static struct notifier_block cpu_pmu_hotplug_notifier = {
176 .notifier_call = cpu_pmu_notify,
180 * PMU platform driver and devicetree bindings.
182 static struct of_device_id cpu_pmu_of_device_ids[] = {
183 {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
184 {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
185 {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
186 {.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init},
187 {.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init},
188 {.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init},
189 {.compatible = "arm,arm1176-pmu", .data = armv6pmu_init},
190 {.compatible = "arm,arm1136-pmu", .data = armv6pmu_init},
194 static struct platform_device_id cpu_pmu_plat_device_ids[] = {
195 {.name = "arm-pmu"},
200 * CPU PMU identification and probing.
202 static int probe_current_pmu(struct arm_pmu *pmu)
204 int cpu = get_cpu();
205 unsigned long implementor = read_cpuid_implementor();
206 unsigned long part_number = read_cpuid_part_number();
207 int ret = -ENODEV;
209 pr_info("probing PMU on CPU %d\n", cpu);
211 /* ARM Ltd CPUs. */
212 if (implementor == ARM_CPU_IMP_ARM) {
213 switch (part_number) {
214 case ARM_CPU_PART_ARM1136:
215 case ARM_CPU_PART_ARM1156:
216 case ARM_CPU_PART_ARM1176:
217 ret = armv6pmu_init(pmu);
218 break;
219 case ARM_CPU_PART_ARM11MPCORE:
220 ret = armv6mpcore_pmu_init(pmu);
221 break;
222 case ARM_CPU_PART_CORTEX_A8:
223 ret = armv7_a8_pmu_init(pmu);
224 break;
225 case ARM_CPU_PART_CORTEX_A9:
226 ret = armv7_a9_pmu_init(pmu);
227 break;
228 case ARM_CPU_PART_CORTEX_A5:
229 ret = armv7_a5_pmu_init(pmu);
230 break;
231 case ARM_CPU_PART_CORTEX_A15:
232 ret = armv7_a15_pmu_init(pmu);
233 break;
234 case ARM_CPU_PART_CORTEX_A7:
235 ret = armv7_a7_pmu_init(pmu);
236 break;
238 /* Intel CPUs [xscale]. */
239 } else if (implementor == ARM_CPU_IMP_INTEL) {
240 switch (xscale_cpu_arch_version()) {
241 case ARM_CPU_XSCALE_ARCH_V1:
242 ret = xscale1pmu_init(pmu);
243 break;
244 case ARM_CPU_XSCALE_ARCH_V2:
245 ret = xscale2pmu_init(pmu);
246 break;
250 put_cpu();
251 return ret;
254 static int cpu_pmu_device_probe(struct platform_device *pdev)
256 const struct of_device_id *of_id;
257 const int (*init_fn)(struct arm_pmu *);
258 struct device_node *node = pdev->dev.of_node;
259 struct arm_pmu *pmu;
260 int ret = -ENODEV;
262 if (cpu_pmu) {
263 pr_info("attempt to register multiple PMU devices!");
264 return -ENOSPC;
267 pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
268 if (!pmu) {
269 pr_info("failed to allocate PMU device!");
270 return -ENOMEM;
273 if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
274 init_fn = of_id->data;
275 ret = init_fn(pmu);
276 } else {
277 ret = probe_current_pmu(pmu);
280 if (ret) {
281 pr_info("failed to probe PMU!");
282 goto out_free;
285 cpu_pmu = pmu;
286 cpu_pmu->plat_device = pdev;
287 cpu_pmu_init(cpu_pmu);
288 ret = armpmu_register(cpu_pmu, PERF_TYPE_RAW);
290 if (!ret)
291 return 0;
293 out_free:
294 pr_info("failed to register PMU devices!");
295 kfree(pmu);
296 return ret;
299 static struct platform_driver cpu_pmu_driver = {
300 .driver = {
301 .name = "arm-pmu",
302 .pm = &armpmu_dev_pm_ops,
303 .of_match_table = cpu_pmu_of_device_ids,
305 .probe = cpu_pmu_device_probe,
306 .id_table = cpu_pmu_plat_device_ids,
309 static int __init register_pmu_driver(void)
311 int err;
313 err = register_cpu_notifier(&cpu_pmu_hotplug_notifier);
314 if (err)
315 return err;
317 err = platform_driver_register(&cpu_pmu_driver);
318 if (err)
319 unregister_cpu_notifier(&cpu_pmu_hotplug_notifier);
321 return err;
323 device_initcall(register_pmu_driver);