Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-da830-evm.c
blobd1f45af7a530e9abc33d794fcc6cf52010cfc52b
1 /*
2 * TI DA830/OMAP L137 EVM board
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c/pcf857x.h>
20 #include <linux/platform_data/at24.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25 #include <linux/platform_data/gpio-davinci.h>
26 #include <linux/platform_data/mtd-davinci.h>
27 #include <linux/platform_data/mtd-davinci-aemif.h>
28 #include <linux/platform_data/spi-davinci.h>
29 #include <linux/platform_data/usb-davinci.h>
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
34 #include <mach/common.h>
35 #include <mach/cp_intc.h>
36 #include <mach/mux.h>
37 #include <mach/da8xx.h>
39 #define DA830_EVM_PHY_ID ""
41 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
43 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
44 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
46 static const short da830_evm_usb11_pins[] = {
47 DA830_GPIO1_15, DA830_GPIO2_4,
51 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
53 static int da830_evm_usb_set_power(unsigned port, int on)
55 gpio_set_value(ON_BD_USB_DRV, on);
56 return 0;
59 static int da830_evm_usb_get_power(unsigned port)
61 return gpio_get_value(ON_BD_USB_DRV);
64 static int da830_evm_usb_get_oci(unsigned port)
66 return !gpio_get_value(ON_BD_USB_OVC);
69 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
71 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
73 int irq = gpio_to_irq(ON_BD_USB_OVC);
74 int error = 0;
76 if (handler != NULL) {
77 da830_evm_usb_ocic_handler = handler;
79 error = request_irq(irq, da830_evm_usb_ocic_irq,
80 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
81 "OHCI over-current indicator", NULL);
82 if (error)
83 printk(KERN_ERR "%s: could not request IRQ to watch "
84 "over-current indicator changes\n", __func__);
85 } else
86 free_irq(irq, NULL);
88 return error;
91 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
92 .set_power = da830_evm_usb_set_power,
93 .get_power = da830_evm_usb_get_power,
94 .get_oci = da830_evm_usb_get_oci,
95 .ocic_notify = da830_evm_usb_ocic_notify,
97 /* TPS2065 switch @ 5V */
98 .potpgt = (3 + 1) / 2, /* 3 ms max */
101 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
103 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
104 return IRQ_HANDLED;
107 static __init void da830_evm_usb_init(void)
109 u32 cfgchip2;
110 int ret;
113 * Set up USB clock/mode in the CFGCHIP2 register.
114 * FYI: CFGCHIP2 is 0x0000ef00 initially.
116 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
118 /* USB2.0 PHY reference clock is 24 MHz */
119 cfgchip2 &= ~CFGCHIP2_REFFREQ;
120 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
123 * Select internal reference clock for USB 2.0 PHY
124 * and use it as a clock source for USB 1.1 PHY
125 * (this is the default setting anyway).
127 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
128 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
131 * We have to override VBUS/ID signals when MUSB is configured into the
132 * host-only mode -- ID pin will float if no cable is connected, so the
133 * controller won't be able to drive VBUS thinking that it's a B-device.
134 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
136 cfgchip2 &= ~CFGCHIP2_OTGMODE;
137 #ifdef CONFIG_USB_MUSB_HOST
138 cfgchip2 |= CFGCHIP2_FORCE_HOST;
139 #else
140 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
141 #endif
143 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
145 /* USB_REFCLKIN is not used. */
146 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
147 if (ret)
148 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
149 __func__, ret);
150 else {
152 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
153 * with the power on to power good time of 3 ms.
155 ret = da8xx_register_usb20(1000, 3);
156 if (ret)
157 pr_warning("%s: USB 2.0 registration failed: %d\n",
158 __func__, ret);
161 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
162 if (ret) {
163 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
164 __func__, ret);
165 return;
168 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
169 if (ret) {
170 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
171 "power control: %d\n", __func__, ret);
172 return;
174 gpio_direction_output(ON_BD_USB_DRV, 0);
176 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
177 if (ret) {
178 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
179 "over-current indicator: %d\n", __func__, ret);
180 return;
182 gpio_direction_input(ON_BD_USB_OVC);
184 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
185 if (ret)
186 pr_warning("%s: USB 1.1 registration failed: %d\n",
187 __func__, ret);
190 static const short da830_evm_mcasp1_pins[] = {
191 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
192 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
193 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
194 DA830_AXR1_11,
198 static u8 da830_iis_serializer_direction[] = {
199 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
200 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
201 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
204 static struct snd_platform_data da830_evm_snd_data = {
205 .tx_dma_offset = 0x2000,
206 .rx_dma_offset = 0x2000,
207 .op_mode = DAVINCI_MCASP_IIS_MODE,
208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
209 .tdm_slots = 2,
210 .serial_dir = da830_iis_serializer_direction,
211 .asp_chan_q = EVENTQ_0,
212 .version = MCASP_VERSION_2,
213 .txnumevt = 1,
214 .rxnumevt = 1,
218 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
220 static const short da830_evm_mmc_sd_pins[] = {
221 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
222 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
223 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
224 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
228 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
229 #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
231 static int da830_evm_mmc_get_ro(int index)
233 return gpio_get_value(DA830_MMCSD_WP_PIN);
236 static int da830_evm_mmc_get_cd(int index)
238 return !gpio_get_value(DA830_MMCSD_CD_PIN);
241 static struct davinci_mmc_config da830_evm_mmc_config = {
242 .get_ro = da830_evm_mmc_get_ro,
243 .get_cd = da830_evm_mmc_get_cd,
244 .wires = 8,
245 .max_freq = 50000000,
246 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
249 static inline void da830_evm_init_mmc(void)
251 int ret;
253 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
254 if (ret) {
255 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
256 ret);
257 return;
260 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
261 if (ret) {
262 pr_warning("da830_evm_init: can not open GPIO %d\n",
263 DA830_MMCSD_WP_PIN);
264 return;
266 gpio_direction_input(DA830_MMCSD_WP_PIN);
268 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
269 if (ret) {
270 pr_warning("da830_evm_init: can not open GPIO %d\n",
271 DA830_MMCSD_CD_PIN);
272 return;
274 gpio_direction_input(DA830_MMCSD_CD_PIN);
276 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
277 if (ret) {
278 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
279 ret);
280 gpio_free(DA830_MMCSD_WP_PIN);
285 * UI board NAND/NOR flashes only use 8-bit data bus.
287 static const short da830_evm_emif25_pins[] = {
288 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
289 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
290 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
291 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
292 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
293 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
294 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
298 #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
300 #ifdef CONFIG_DA830_UI_NAND
301 static struct mtd_partition da830_evm_nand_partitions[] = {
302 /* bootloader (U-Boot, etc) in first sector */
303 [0] = {
304 .name = "bootloader",
305 .offset = 0,
306 .size = SZ_128K,
307 .mask_flags = MTD_WRITEABLE, /* force read-only */
309 /* bootloader params in the next sector */
310 [1] = {
311 .name = "params",
312 .offset = MTDPART_OFS_APPEND,
313 .size = SZ_128K,
314 .mask_flags = MTD_WRITEABLE, /* force read-only */
316 /* kernel */
317 [2] = {
318 .name = "kernel",
319 .offset = MTDPART_OFS_APPEND,
320 .size = SZ_2M,
321 .mask_flags = 0,
323 /* file system */
324 [3] = {
325 .name = "filesystem",
326 .offset = MTDPART_OFS_APPEND,
327 .size = MTDPART_SIZ_FULL,
328 .mask_flags = 0,
332 /* flash bbt decriptors */
333 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
334 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
336 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
337 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
338 NAND_BBT_WRITE | NAND_BBT_2BIT |
339 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
340 .offs = 2,
341 .len = 4,
342 .veroffs = 16,
343 .maxblocks = 4,
344 .pattern = da830_evm_nand_bbt_pattern
347 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
348 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
349 NAND_BBT_WRITE | NAND_BBT_2BIT |
350 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
351 .offs = 2,
352 .len = 4,
353 .veroffs = 16,
354 .maxblocks = 4,
355 .pattern = da830_evm_nand_mirror_pattern
358 static struct davinci_aemif_timing da830_evm_nandflash_timing = {
359 .wsetup = 24,
360 .wstrobe = 21,
361 .whold = 14,
362 .rsetup = 19,
363 .rstrobe = 50,
364 .rhold = 0,
365 .ta = 20,
368 static struct davinci_nand_pdata da830_evm_nand_pdata = {
369 .parts = da830_evm_nand_partitions,
370 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
371 .ecc_mode = NAND_ECC_HW,
372 .ecc_bits = 4,
373 .bbt_options = NAND_BBT_USE_FLASH,
374 .bbt_td = &da830_evm_nand_bbt_main_descr,
375 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
376 .timing = &da830_evm_nandflash_timing,
379 static struct resource da830_evm_nand_resources[] = {
380 [0] = { /* First memory resource is NAND I/O window */
381 .start = DA8XX_AEMIF_CS3_BASE,
382 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
383 .flags = IORESOURCE_MEM,
385 [1] = { /* Second memory resource is AEMIF control registers */
386 .start = DA8XX_AEMIF_CTL_BASE,
387 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
388 .flags = IORESOURCE_MEM,
392 static struct platform_device da830_evm_nand_device = {
393 .name = "davinci_nand",
394 .id = 1,
395 .dev = {
396 .platform_data = &da830_evm_nand_pdata,
398 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
399 .resource = da830_evm_nand_resources,
402 static inline void da830_evm_init_nand(int mux_mode)
404 int ret;
406 if (HAS_MMC) {
407 pr_warning("WARNING: both MMC/SD and NAND are "
408 "enabled, but they share AEMIF pins.\n"
409 "\tDisable MMC/SD for NAND support.\n");
410 return;
413 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
414 if (ret)
415 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
416 ret);
418 ret = platform_device_register(&da830_evm_nand_device);
419 if (ret)
420 pr_warning("da830_evm_init: NAND device not registered.\n");
422 gpio_direction_output(mux_mode, 1);
424 #else
425 static inline void da830_evm_init_nand(int mux_mode) { }
426 #endif
428 #ifdef CONFIG_DA830_UI_LCD
429 static inline void da830_evm_init_lcdc(int mux_mode)
431 int ret;
433 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
434 if (ret)
435 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
436 ret);
438 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
439 if (ret)
440 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
442 gpio_direction_output(mux_mode, 0);
444 #else
445 static inline void da830_evm_init_lcdc(int mux_mode) { }
446 #endif
448 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
449 .byte_len = SZ_256K / 8,
450 .page_size = 64,
451 .flags = AT24_FLAG_ADDR16,
452 .setup = davinci_get_mac_addr,
453 .context = (void *)0x7f00,
456 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
457 int gpio, unsigned ngpio, void *context)
459 gpio_request(gpio + 6, "UI MUX_MODE");
461 /* Drive mux mode low to match the default without UI card */
462 gpio_direction_output(gpio + 6, 0);
464 da830_evm_init_lcdc(gpio + 6);
466 da830_evm_init_nand(gpio + 6);
468 return 0;
471 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
472 unsigned ngpio, void *context)
474 gpio_free(gpio + 6);
475 return 0;
478 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
479 .gpio_base = DAVINCI_N_GPIO,
480 .setup = da830_evm_ui_expander_setup,
481 .teardown = da830_evm_ui_expander_teardown,
484 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
486 I2C_BOARD_INFO("24c256", 0x50),
487 .platform_data = &da830_evm_i2c_eeprom_info,
490 I2C_BOARD_INFO("tlv320aic3x", 0x18),
493 I2C_BOARD_INFO("pcf8574", 0x3f),
494 .platform_data = &da830_evm_ui_expander_info,
498 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
499 .bus_freq = 100, /* kHz */
500 .bus_delay = 0, /* usec */
504 * The following EDMA channels/slots are not being used by drivers (for
505 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
506 * they are being reserved for codecs on the DSP side.
508 static const s16 da830_dma_rsv_chans[][2] = {
509 /* (offset, number) */
510 { 8, 2},
511 {12, 2},
512 {24, 4},
513 {30, 2},
514 {-1, -1}
517 static const s16 da830_dma_rsv_slots[][2] = {
518 /* (offset, number) */
519 { 8, 2},
520 {12, 2},
521 {24, 4},
522 {30, 26},
523 {-1, -1}
526 static struct edma_rsv_info da830_edma_rsv[] = {
528 .rsv_chans = da830_dma_rsv_chans,
529 .rsv_slots = da830_dma_rsv_slots,
533 static struct mtd_partition da830evm_spiflash_part[] = {
534 [0] = {
535 .name = "DSP-UBL",
536 .offset = 0,
537 .size = SZ_8K,
538 .mask_flags = MTD_WRITEABLE,
540 [1] = {
541 .name = "ARM-UBL",
542 .offset = MTDPART_OFS_APPEND,
543 .size = SZ_16K + SZ_8K,
544 .mask_flags = MTD_WRITEABLE,
546 [2] = {
547 .name = "U-Boot",
548 .offset = MTDPART_OFS_APPEND,
549 .size = SZ_256K - SZ_32K,
550 .mask_flags = MTD_WRITEABLE,
552 [3] = {
553 .name = "U-Boot-Environment",
554 .offset = MTDPART_OFS_APPEND,
555 .size = SZ_16K,
556 .mask_flags = 0,
558 [4] = {
559 .name = "Kernel",
560 .offset = MTDPART_OFS_APPEND,
561 .size = MTDPART_SIZ_FULL,
562 .mask_flags = 0,
566 static struct flash_platform_data da830evm_spiflash_data = {
567 .name = "m25p80",
568 .parts = da830evm_spiflash_part,
569 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
570 .type = "w25x32",
573 static struct davinci_spi_config da830evm_spiflash_cfg = {
574 .io_type = SPI_IO_TYPE_DMA,
575 .c2tdelay = 8,
576 .t2cdelay = 8,
579 static struct spi_board_info da830evm_spi_info[] = {
581 .modalias = "m25p80",
582 .platform_data = &da830evm_spiflash_data,
583 .controller_data = &da830evm_spiflash_cfg,
584 .mode = SPI_MODE_0,
585 .max_speed_hz = 30000000,
586 .bus_num = 0,
587 .chip_select = 0,
591 static __init void da830_evm_init(void)
593 struct davinci_soc_info *soc_info = &davinci_soc_info;
594 int ret;
596 ret = da830_register_gpio();
597 if (ret)
598 pr_warn("da830_evm_init: GPIO init failed: %d\n", ret);
600 ret = da830_register_edma(da830_edma_rsv);
601 if (ret)
602 pr_warning("da830_evm_init: edma registration failed: %d\n",
603 ret);
605 ret = davinci_cfg_reg_list(da830_i2c0_pins);
606 if (ret)
607 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
608 ret);
610 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
611 if (ret)
612 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
613 ret);
615 da830_evm_usb_init();
617 soc_info->emac_pdata->rmii_en = 1;
618 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
620 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
621 if (ret)
622 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
623 ret);
625 ret = da8xx_register_emac();
626 if (ret)
627 pr_warning("da830_evm_init: emac registration failed: %d\n",
628 ret);
630 ret = da8xx_register_watchdog();
631 if (ret)
632 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
633 ret);
635 davinci_serial_init(da8xx_serial_device);
636 i2c_register_board_info(1, da830_evm_i2c_devices,
637 ARRAY_SIZE(da830_evm_i2c_devices));
639 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
640 if (ret)
641 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
642 ret);
644 da8xx_register_mcasp(1, &da830_evm_snd_data);
646 da830_evm_init_mmc();
648 ret = da8xx_register_rtc();
649 if (ret)
650 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
652 ret = spi_register_board_info(da830evm_spi_info,
653 ARRAY_SIZE(da830evm_spi_info));
654 if (ret)
655 pr_warn("%s: spi info registration failed: %d\n", __func__,
656 ret);
658 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
659 if (ret)
660 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
661 ret);
664 #ifdef CONFIG_SERIAL_8250_CONSOLE
665 static int __init da830_evm_console_init(void)
667 if (!machine_is_davinci_da830_evm())
668 return 0;
670 return add_preferred_console("ttyS", 2, "115200");
672 console_initcall(da830_evm_console_init);
673 #endif
675 static void __init da830_evm_map_io(void)
677 da830_init();
680 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
681 .atag_offset = 0x100,
682 .map_io = da830_evm_map_io,
683 .init_irq = cp_intc_init,
684 .init_time = davinci_timer_init,
685 .init_machine = da830_evm_init,
686 .init_late = davinci_init_late,
687 .dma_zone_size = SZ_128M,
688 .restart = da8xx_restart,
689 MACHINE_END