Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / arch / arm / mach-imx / clk-fixup-div.c
blob21db020b1f2dccee6b7646ac4cd0a4f6e8308e7d
1 /*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <linux/clk-provider.h>
13 #include <linux/err.h>
14 #include <linux/io.h>
15 #include <linux/slab.h>
16 #include "clk.h"
18 #define to_clk_div(_hw) container_of(_hw, struct clk_divider, hw)
19 #define div_mask(d) ((1 << (d->width)) - 1)
21 /**
22 * struct clk_fixup_div - imx integer fixup divider clock
23 * @divider: the parent class
24 * @ops: pointer to clk_ops of parent class
25 * @fixup: a hook to fixup the write value
27 * The imx fixup divider clock is a subclass of basic clk_divider
28 * with an addtional fixup hook.
30 struct clk_fixup_div {
31 struct clk_divider divider;
32 const struct clk_ops *ops;
33 void (*fixup)(u32 *val);
36 static inline struct clk_fixup_div *to_clk_fixup_div(struct clk_hw *hw)
38 struct clk_divider *divider = to_clk_div(hw);
40 return container_of(divider, struct clk_fixup_div, divider);
43 static unsigned long clk_fixup_div_recalc_rate(struct clk_hw *hw,
44 unsigned long parent_rate)
46 struct clk_fixup_div *fixup_div = to_clk_fixup_div(hw);
48 return fixup_div->ops->recalc_rate(&fixup_div->divider.hw, parent_rate);
51 static long clk_fixup_div_round_rate(struct clk_hw *hw, unsigned long rate,
52 unsigned long *prate)
54 struct clk_fixup_div *fixup_div = to_clk_fixup_div(hw);
56 return fixup_div->ops->round_rate(&fixup_div->divider.hw, rate, prate);
59 static int clk_fixup_div_set_rate(struct clk_hw *hw, unsigned long rate,
60 unsigned long parent_rate)
62 struct clk_fixup_div *fixup_div = to_clk_fixup_div(hw);
63 struct clk_divider *div = to_clk_div(hw);
64 unsigned int divider, value;
65 unsigned long flags = 0;
66 u32 val;
68 divider = parent_rate / rate;
70 /* Zero based divider */
71 value = divider - 1;
73 if (value > div_mask(div))
74 value = div_mask(div);
76 spin_lock_irqsave(div->lock, flags);
78 val = readl(div->reg);
79 val &= ~(div_mask(div) << div->shift);
80 val |= value << div->shift;
81 fixup_div->fixup(&val);
82 writel(val, div->reg);
84 spin_unlock_irqrestore(div->lock, flags);
86 return 0;
89 static const struct clk_ops clk_fixup_div_ops = {
90 .recalc_rate = clk_fixup_div_recalc_rate,
91 .round_rate = clk_fixup_div_round_rate,
92 .set_rate = clk_fixup_div_set_rate,
95 struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
96 void __iomem *reg, u8 shift, u8 width,
97 void (*fixup)(u32 *val))
99 struct clk_fixup_div *fixup_div;
100 struct clk *clk;
101 struct clk_init_data init;
103 if (!fixup)
104 return ERR_PTR(-EINVAL);
106 fixup_div = kzalloc(sizeof(*fixup_div), GFP_KERNEL);
107 if (!fixup_div)
108 return ERR_PTR(-ENOMEM);
110 init.name = name;
111 init.ops = &clk_fixup_div_ops;
112 init.flags = CLK_SET_RATE_PARENT;
113 init.parent_names = parent ? &parent : NULL;
114 init.num_parents = parent ? 1 : 0;
116 fixup_div->divider.reg = reg;
117 fixup_div->divider.shift = shift;
118 fixup_div->divider.width = width;
119 fixup_div->divider.lock = &imx_ccm_lock;
120 fixup_div->divider.hw.init = &init;
121 fixup_div->ops = &clk_divider_ops;
122 fixup_div->fixup = fixup;
124 clk = clk_register(NULL, &fixup_div->divider.hw);
125 if (IS_ERR(clk))
126 kfree(fixup_div);
128 return clk;