3 * Modified from mach-omap2/board-3430sdp-flash.c
5 * Copyright (C) 2009 Nokia Corporation
6 * Copyright (C) 2009 Texas Instruments
8 * Vimal Singh <vimalsingh@ti.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
20 #include <linux/platform_data/mtd-nand-omap2.h>
21 #include <linux/platform_data/mtd-onenand-omap2.h>
25 #include "board-flash.h"
26 #include "gpmc-onenand.h"
27 #include "gpmc-nand.h"
29 #define REG_FPGA_REV 0x10
30 #define REG_FPGA_DIP_SWITCH_INPUT2 0x60
31 #define MAX_SUPPORTED_GPMC_CONFIG 3
33 #define DEBUG_BASE 0x08000000 /* debug board */
35 /* various memory sizes */
36 #define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
37 #define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
39 static struct physmap_flash_data board_nor_data
= {
43 static struct resource board_nor_resource
= {
44 .flags
= IORESOURCE_MEM
,
47 static struct platform_device board_nor_device
= {
48 .name
= "physmap-flash",
51 .platform_data
= &board_nor_data
,
54 .resource
= &board_nor_resource
,
58 __init
board_nor_init(struct mtd_partition
*nor_parts
, u8 nr_parts
, u8 cs
)
62 board_nor_data
.parts
= nor_parts
;
63 board_nor_data
.nr_parts
= nr_parts
;
65 /* Configure start address and size of NOR device */
66 if (omap_rev() >= OMAP3430_REV_ES1_0
) {
67 err
= gpmc_cs_request(cs
, FLASH_SIZE_SDPV2
- 1,
68 (unsigned long *)&board_nor_resource
.start
);
69 board_nor_resource
.end
= board_nor_resource
.start
70 + FLASH_SIZE_SDPV2
- 1;
72 err
= gpmc_cs_request(cs
, FLASH_SIZE_SDPV1
- 1,
73 (unsigned long *)&board_nor_resource
.start
);
74 board_nor_resource
.end
= board_nor_resource
.start
75 + FLASH_SIZE_SDPV1
- 1;
78 pr_err("NOR: Can't request GPMC CS\n");
81 if (platform_device_register(&board_nor_device
) < 0)
82 pr_err("Unable to register NOR device\n");
85 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
86 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
87 static struct omap_onenand_platform_data board_onenand_data
= {
88 .dma_channel
= -1, /* disable DMA in OMAP OneNAND driver */
92 __init
board_onenand_init(struct mtd_partition
*onenand_parts
,
95 board_onenand_data
.cs
= cs
;
96 board_onenand_data
.parts
= onenand_parts
;
97 board_onenand_data
.nr_parts
= nr_parts
;
99 gpmc_onenand_init(&board_onenand_data
);
101 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
103 #if defined(CONFIG_MTD_NAND_OMAP2) || \
104 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
106 /* Note that all values in this struct are in nanoseconds */
107 struct gpmc_timings nand_default_timings
[1] = {
130 .wr_data_mux_bus
= 0,
134 static struct omap_nand_platform_data board_nand_data
;
137 __init
board_nand_init(struct mtd_partition
*nand_parts
, u8 nr_parts
, u8 cs
,
138 int nand_type
, struct gpmc_timings
*gpmc_t
)
140 board_nand_data
.cs
= cs
;
141 board_nand_data
.parts
= nand_parts
;
142 board_nand_data
.nr_parts
= nr_parts
;
143 board_nand_data
.devsize
= nand_type
;
145 board_nand_data
.ecc_opt
= OMAP_ECC_BCH8_CODE_HW
;
146 gpmc_nand_init(&board_nand_data
, gpmc_t
);
148 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
151 * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
152 * the various cs values.
154 static u8
get_gpmc0_type(void)
157 void __iomem
*fpga_map_addr
;
159 fpga_map_addr
= ioremap(DEBUG_BASE
, 4096);
163 if (!(__raw_readw(fpga_map_addr
+ REG_FPGA_REV
)))
164 /* we dont have an DEBUG FPGA??? */
165 /* Depend on #defines!! default to strata boot return param */
168 /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
169 cs
= __raw_readw(fpga_map_addr
+ REG_FPGA_DIP_SWITCH_INPUT2
) & 0xf;
171 /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
172 if (omap_rev() >= OMAP3430_REV_ES1_0
)
173 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
174 cs
= ((cs
& 8) >> 3) | ((cs
& 4) >> 1) |
175 ((cs
& 2) << 1) | ((cs
& 1) << 3);
177 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
178 cs
= ((cs
& 4) >> 2) | (cs
& 2) | ((cs
& 1) << 2);
180 iounmap(fpga_map_addr
);
185 * board_flash_init - Identify devices connected to GPMC and register.
189 void __init
board_flash_init(struct flash_partitions partition_info
[],
190 char chip_sel_board
[][GPMC_CS_NUM
], int nand_type
)
193 u8 norcs
= GPMC_CS_NUM
+ 1;
194 u8 nandcs
= GPMC_CS_NUM
+ 1;
195 u8 onenandcs
= GPMC_CS_NUM
+ 1;
197 unsigned char *config_sel
= NULL
;
199 /* REVISIT: Is this return correct idx for 2430 SDP?
200 * for which cs configuration matches for 2430 SDP?
202 idx
= get_gpmc0_type();
203 if (idx
>= MAX_SUPPORTED_GPMC_CONFIG
) {
204 pr_err("%s: Invalid chip select: %d\n", __func__
, cs
);
207 config_sel
= (unsigned char *)(chip_sel_board
[idx
]);
209 while (cs
< GPMC_CS_NUM
) {
210 switch (config_sel
[cs
]) {
212 if (norcs
> GPMC_CS_NUM
)
216 if (nandcs
> GPMC_CS_NUM
)
220 if (onenandcs
> GPMC_CS_NUM
)
227 if (norcs
> GPMC_CS_NUM
)
228 pr_err("NOR: Unable to find configuration in GPMC\n");
230 board_nor_init(partition_info
[0].parts
,
231 partition_info
[0].nr_parts
, norcs
);
233 if (onenandcs
> GPMC_CS_NUM
)
234 pr_err("OneNAND: Unable to find configuration in GPMC\n");
236 board_onenand_init(partition_info
[1].parts
,
237 partition_info
[1].nr_parts
, onenandcs
);
239 if (nandcs
> GPMC_CS_NUM
)
240 pr_err("NAND: Unable to find configuration in GPMC\n");
242 board_nand_init(partition_info
[2].parts
,
243 partition_info
[2].nr_parts
, nandcs
,
244 nand_type
, nand_default_timings
);