Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / arch / arm / mach-omap2 / pm.c
blobe1b41416fbf1e711cb0653f403144d2665676af0
1 /*
2 * pm.c - Common OMAP2+ power management-related code
4 * Copyright (C) 2010 Texas Instruments, Inc.
5 * Copyright (C) 2010 Nokia Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/err.h>
16 #include <linux/pm_opp.h>
17 #include <linux/export.h>
18 #include <linux/suspend.h>
19 #include <linux/cpu.h>
21 #include <asm/system_misc.h>
23 #include "omap-pm.h"
24 #include "omap_device.h"
25 #include "common.h"
27 #include "soc.h"
28 #include "prcm-common.h"
29 #include "voltage.h"
30 #include "powerdomain.h"
31 #include "clockdomain.h"
32 #include "pm.h"
33 #include "twl-common.h"
36 * omap_pm_suspend: points to a function that does the SoC-specific
37 * suspend work
39 int (*omap_pm_suspend)(void);
41 #ifdef CONFIG_PM
42 /**
43 * struct omap2_oscillator - Describe the board main oscillator latencies
44 * @startup_time: oscillator startup latency
45 * @shutdown_time: oscillator shutdown latency
47 struct omap2_oscillator {
48 u32 startup_time;
49 u32 shutdown_time;
52 static struct omap2_oscillator oscillator = {
53 .startup_time = ULONG_MAX,
54 .shutdown_time = ULONG_MAX,
57 void omap_pm_setup_oscillator(u32 tstart, u32 tshut)
59 oscillator.startup_time = tstart;
60 oscillator.shutdown_time = tshut;
63 void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
65 if (!tstart || !tshut)
66 return;
68 *tstart = oscillator.startup_time;
69 *tshut = oscillator.shutdown_time;
71 #endif
73 static int __init _init_omap_device(char *name)
75 struct omap_hwmod *oh;
76 struct platform_device *pdev;
78 oh = omap_hwmod_lookup(name);
79 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
80 __func__, name))
81 return -ENODEV;
83 pdev = omap_device_build(oh->name, 0, oh, NULL, 0);
84 if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
85 __func__, name))
86 return -ENODEV;
88 return 0;
92 * Build omap_devices for processors and bus.
94 static void __init omap2_init_processor_devices(void)
96 _init_omap_device("mpu");
97 if (omap3_has_iva())
98 _init_omap_device("iva");
100 if (cpu_is_omap44xx()) {
101 _init_omap_device("l3_main_1");
102 _init_omap_device("dsp");
103 _init_omap_device("iva");
104 } else {
105 _init_omap_device("l3_main");
109 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
111 /* XXX The usecount test is racy */
112 if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
113 !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
114 clkdm_allow_idle(clkdm);
115 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
116 clkdm->usecount == 0)
117 clkdm_sleep(clkdm);
118 return 0;
122 * This API is to be called during init to set the various voltage
123 * domains to the voltage as per the opp table. Typically we boot up
124 * at the nominal voltage. So this function finds out the rate of
125 * the clock associated with the voltage domain, finds out the correct
126 * opp entry and sets the voltage domain to the voltage specified
127 * in the opp entry
129 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
130 const char *oh_name)
132 struct voltagedomain *voltdm;
133 struct clk *clk;
134 struct dev_pm_opp *opp;
135 unsigned long freq, bootup_volt;
136 struct device *dev;
138 if (!vdd_name || !clk_name || !oh_name) {
139 pr_err("%s: invalid parameters\n", __func__);
140 goto exit;
143 if (!strncmp(oh_name, "mpu", 3))
145 * All current OMAPs share voltage rail and clock
146 * source, so CPU0 is used to represent the MPU-SS.
148 dev = get_cpu_device(0);
149 else
150 dev = omap_device_get_by_hwmod_name(oh_name);
152 if (IS_ERR(dev)) {
153 pr_err("%s: Unable to get dev pointer for hwmod %s\n",
154 __func__, oh_name);
155 goto exit;
158 voltdm = voltdm_lookup(vdd_name);
159 if (!voltdm) {
160 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
161 __func__, vdd_name);
162 goto exit;
165 clk = clk_get(NULL, clk_name);
166 if (IS_ERR(clk)) {
167 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
168 goto exit;
171 freq = clk_get_rate(clk);
172 clk_put(clk);
174 rcu_read_lock();
175 opp = dev_pm_opp_find_freq_ceil(dev, &freq);
176 if (IS_ERR(opp)) {
177 rcu_read_unlock();
178 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
179 __func__, vdd_name);
180 goto exit;
183 bootup_volt = dev_pm_opp_get_voltage(opp);
184 rcu_read_unlock();
185 if (!bootup_volt) {
186 pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n",
187 __func__, vdd_name);
188 goto exit;
191 voltdm_scale(voltdm, bootup_volt);
192 return 0;
194 exit:
195 pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
196 return -EINVAL;
199 #ifdef CONFIG_SUSPEND
200 static int omap_pm_enter(suspend_state_t suspend_state)
202 int ret = 0;
204 if (!omap_pm_suspend)
205 return -ENOENT; /* XXX doublecheck */
207 switch (suspend_state) {
208 case PM_SUSPEND_STANDBY:
209 case PM_SUSPEND_MEM:
210 ret = omap_pm_suspend();
211 break;
212 default:
213 ret = -EINVAL;
216 return ret;
219 static int omap_pm_begin(suspend_state_t state)
221 cpu_idle_poll_ctrl(true);
222 if (cpu_is_omap34xx())
223 omap_prcm_irq_prepare();
224 return 0;
227 static void omap_pm_end(void)
229 cpu_idle_poll_ctrl(false);
232 static void omap_pm_finish(void)
234 if (cpu_is_omap34xx())
235 omap_prcm_irq_complete();
238 static const struct platform_suspend_ops omap_pm_ops = {
239 .begin = omap_pm_begin,
240 .end = omap_pm_end,
241 .enter = omap_pm_enter,
242 .finish = omap_pm_finish,
243 .valid = suspend_valid_only_mem,
246 #endif /* CONFIG_SUSPEND */
248 static void __init omap3_init_voltages(void)
250 if (!cpu_is_omap34xx())
251 return;
253 omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
254 omap2_set_init_voltage("core", "l3_ick", "l3_main");
257 static void __init omap4_init_voltages(void)
259 if (!cpu_is_omap44xx())
260 return;
262 omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
263 omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
264 omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
267 static inline void omap_init_cpufreq(void)
269 struct platform_device_info devinfo = { };
271 if (!of_have_populated_dt())
272 devinfo.name = "omap-cpufreq";
273 else
274 devinfo.name = "cpufreq-cpu0";
275 platform_device_register_full(&devinfo);
278 static int __init omap2_common_pm_init(void)
280 if (!of_have_populated_dt())
281 omap2_init_processor_devices();
282 omap_pm_if_init();
284 return 0;
286 omap_postcore_initcall(omap2_common_pm_init);
288 int __init omap2_common_pm_late_init(void)
291 * In the case of DT, the PMIC and SR initialization will be done using
292 * a completely different mechanism.
293 * Disable this part if a DT blob is available.
295 if (!of_have_populated_dt()) {
297 /* Init the voltage layer */
298 omap_pmic_late_init();
299 omap_voltage_late_init();
301 /* Initialize the voltages */
302 omap3_init_voltages();
303 omap4_init_voltages();
305 /* Smartreflex device init */
306 omap_devinit_smartreflex();
310 /* cpufreq dummy device instantiation */
311 omap_init_cpufreq();
313 #ifdef CONFIG_SUSPEND
314 suspend_set_ops(&omap_pm_ops);
315 #endif
317 return 0;