arch/arm/mach-shmobile/board-lager.c

   1 /*
   2  * Lager board support
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Magnus Damm
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/gpio.h>
  22 #include <linux/gpio_keys.h>
  23 #include <linux/input.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/kernel.h>
  26 #include <linux/leds.h>
  27 #include <linux/mmc/host.h>
  28 #include <linux/mmc/sh_mmcif.h>
  29 #include <linux/pinctrl/machine.h>
  30 #include <linux/platform_data/gpio-rcar.h>
  31 #include <linux/platform_data/rcar-du.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/phy.h>
  34 #include <linux/regulator/driver.h>
  35 #include <linux/regulator/fixed.h>
  36 #include <linux/regulator/gpio-regulator.h>
  37 #include <linux/regulator/machine.h>
  38 #include <linux/sh_eth.h>
  39 #include <mach/common.h>
  40 #include <mach/irqs.h>
  41 #include <mach/r8a7790.h>
  42 #include <asm/mach-types.h>
  43 #include <asm/mach/arch.h>
  44 #include <linux/mtd/partitions.h>
  45 #include <linux/mtd/mtd.h>
  46 #include <linux/spi/flash.h>
  47 #include <linux/spi/rspi.h>
  48 #include <linux/spi/spi.h>
  49
  50 /* DU */
  51 static struct rcar_du_encoder_data lager_du_encoders[] = {
  52         {
  53                 .type = RCAR_DU_ENCODER_VGA,
  54                 .output = RCAR_DU_OUTPUT_DPAD0,
  55         }, {
  56                 .type = RCAR_DU_ENCODER_NONE,
  57                 .output = RCAR_DU_OUTPUT_LVDS1,
  58                 .connector.lvds.panel = {
  59                         .width_mm = 210,
  60                         .height_mm = 158,
  61                         .mode = {
  62                                 .clock = 65000,
  63                                 .hdisplay = 1024,
  64                                 .hsync_start = 1048,
  65                                 .hsync_end = 1184,
  66                                 .htotal = 1344,
  67                                 .vdisplay = 768,
  68                                 .vsync_start = 771,
  69                                 .vsync_end = 777,
  70                                 .vtotal = 806,
  71                                 .flags = 0,
  72                         },
  73                 },
  74         },
  75 };
  76
  77 static const struct rcar_du_platform_data lager_du_pdata __initconst = {
  78         .encoders = lager_du_encoders,
  79         .num_encoders = ARRAY_SIZE(lager_du_encoders),
  80 };
  81
  82 static const struct resource du_resources[] __initconst = {
  83         DEFINE_RES_MEM(0xfeb00000, 0x70000),
  84         DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
  85         DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
  86         DEFINE_RES_IRQ(gic_spi(256)),
  87         DEFINE_RES_IRQ(gic_spi(268)),
  88         DEFINE_RES_IRQ(gic_spi(269)),
  89 };
  90
  91 static void __init lager_add_du_device(void)
  92 {
  93         struct platform_device_info info = {
  94                 .name = "rcar-du-r8a7790",
  95                 .id = -1,
  96                 .res = du_resources,
  97                 .num_res = ARRAY_SIZE(du_resources),
  98                 .data = &lager_du_pdata,
  99                 .size_data = sizeof(lager_du_pdata),
 100                 .dma_mask = DMA_BIT_MASK(32),
 101         };
 102
 103         platform_device_register_full(&info);
 104 }
 105
 106 /* LEDS */
 107 static struct gpio_led lager_leds[] = {
 108         {
 109                 .name           = "led8",
 110                 .gpio           = RCAR_GP_PIN(5, 17),
 111                 .default_state  = LEDS_GPIO_DEFSTATE_ON,
 112         }, {
 113                 .name           = "led7",
 114                 .gpio           = RCAR_GP_PIN(4, 23),
 115                 .default_state  = LEDS_GPIO_DEFSTATE_ON,
 116         }, {
 117                 .name           = "led6",
 118                 .gpio           = RCAR_GP_PIN(4, 22),
 119                 .default_state  = LEDS_GPIO_DEFSTATE_ON,
 120         },
 121 };
 122
 123 static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
 124         .leds           = lager_leds,
 125         .num_leds       = ARRAY_SIZE(lager_leds),
 126 };
 127
 128 /* GPIO KEY */
 129 #define GPIO_KEY(c, g, d, ...) \
 130         { .code = c, .gpio = g, .desc = d, .active_low = 1, \
 131           .wakeup = 1, .debounce_interval = 20 }
 132
 133 static struct gpio_keys_button gpio_buttons[] = {
 134         GPIO_KEY(KEY_4,         RCAR_GP_PIN(1, 28),     "SW2-pin4"),
 135         GPIO_KEY(KEY_3,         RCAR_GP_PIN(1, 26),     "SW2-pin3"),
 136         GPIO_KEY(KEY_2,         RCAR_GP_PIN(1, 24),     "SW2-pin2"),
 137         GPIO_KEY(KEY_1,         RCAR_GP_PIN(1, 14),     "SW2-pin1"),
 138 };
 139
 140 static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
 141         .buttons        = gpio_buttons,
 142         .nbuttons       = ARRAY_SIZE(gpio_buttons),
 143 };
 144
 145 /* Fixed 3.3V regulator to be used by MMCIF */
 146 static struct regulator_consumer_supply fixed3v3_power_consumers[] =
 147 {
 148         REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
 149 };
 150
 151 /*
 152  * SDHI regulator macro
 153  *
 154  ** FIXME**
 155  * Lager board vqmmc is provided via DA9063 PMIC chip,
 156  * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
 157  * but, it doesn't have regulator support at this point.
 158  * It uses gpio-regulator for vqmmc as quick-hack.
 159  */
 160 #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin)                          \
 161 static struct regulator_consumer_supply vcc_sdhi##idx##_consumer =      \
 162         REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx);               \
 163                                                                         \
 164 static struct regulator_init_data vcc_sdhi##idx##_init_data = {         \
 165         .constraints = {                                                \
 166                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,              \
 167         },                                                              \
 168         .consumer_supplies      = &vcc_sdhi##idx##_consumer,            \
 169         .num_consumer_supplies  = 1,                                    \
 170 };                                                                      \
 171                                                                         \
 172 static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
 173         .supply_name    = "SDHI" #idx "Vcc",                            \
 174         .microvolts     = 3300000,                                      \
 175         .gpio           = vdd_pin,                                      \
 176         .enable_high    = 1,                                            \
 177         .init_data      = &vcc_sdhi##idx##_init_data,                   \
 178 };                                                                      \
 179                                                                         \
 180 static struct regulator_consumer_supply vccq_sdhi##idx##_consumer =     \
 181         REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx);              \
 182                                                                         \
 183 static struct regulator_init_data vccq_sdhi##idx##_init_data = {        \
 184         .constraints = {                                                \
 185                 .input_uV       = 3300000,                              \
 186                 .min_uV         = 1800000,                              \
 187                 .max_uV         = 3300000,                              \
 188                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |            \
 189                                   REGULATOR_CHANGE_STATUS,              \
 190         },                                                              \
 191         .consumer_supplies      = &vccq_sdhi##idx##_consumer,           \
 192         .num_consumer_supplies  = 1,                                    \
 193 };                                                                      \
 194                                                                         \
 195 static struct gpio vccq_sdhi##idx##_gpio =                              \
 196         { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx };            \
 197                                                                         \
 198 static struct gpio_regulator_state vccq_sdhi##idx##_states[] = {        \
 199         { .value = 1800000, .gpios = 0 },                               \
 200         { .value = 3300000, .gpios = 1 },                               \
 201 };                                                                      \
 202                                                                         \
 203 static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
 204         .supply_name    = "vqmmc",                                      \
 205         .gpios          = &vccq_sdhi##idx##_gpio,                       \
 206         .nr_gpios       = 1,                                            \
 207         .states         = vccq_sdhi##idx##_states,                      \
 208         .nr_states      = ARRAY_SIZE(vccq_sdhi##idx##_states),          \
 209         .type           = REGULATOR_VOLTAGE,                            \
 210         .init_data      = &vccq_sdhi##idx##_init_data,                  \
 211 };
 212
 213 SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
 214 SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
 215
 216 /* MMCIF */
 217 static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
 218         .caps           = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
 219         .clk_ctrl2_present = true,
 220         .ccs_unsupported = true,
 221 };
 222
 223 static const struct resource mmcif1_resources[] __initconst = {
 224         DEFINE_RES_MEM(0xee220000, 0x80),
 225         DEFINE_RES_IRQ(gic_spi(170)),
 226 };
 227
 228 /* Ether */
 229 static const struct sh_eth_plat_data ether_pdata __initconst = {
 230         .phy                    = 0x1,
 231         .edmac_endian           = EDMAC_LITTLE_ENDIAN,
 232         .phy_interface          = PHY_INTERFACE_MODE_RMII,
 233         .ether_link_active_low  = 1,
 234 };
 235
 236 static const struct resource ether_resources[] __initconst = {
 237         DEFINE_RES_MEM(0xee700000, 0x400),
 238         DEFINE_RES_IRQ(gic_spi(162)),
 239 };
 240
 241 /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
 242 static struct mtd_partition spi_flash_part[] = {
 243         /* Reserved for user loader program, read-only */
 244         {
 245                 .name = "loader",
 246                 .offset = 0,
 247                 .size = SZ_256K,
 248                 .mask_flags = MTD_WRITEABLE,
 249         },
 250         /* Reserved for user program, read-only */
 251         {
 252                 .name = "user",
 253                 .offset = MTDPART_OFS_APPEND,
 254                 .size = SZ_4M,
 255                 .mask_flags = MTD_WRITEABLE,
 256         },
 257         /* All else is writable (e.g. JFFS2) */
 258         {
 259                 .name = "flash",
 260                 .offset = MTDPART_OFS_APPEND,
 261                 .size = MTDPART_SIZ_FULL,
 262                 .mask_flags = 0,
 263         },
 264 };
 265
 266 static struct flash_platform_data spi_flash_data = {
 267         .name           = "m25p80",
 268         .parts          = spi_flash_part,
 269         .nr_parts       = ARRAY_SIZE(spi_flash_part),
 270         .type           = "s25fl512s",
 271 };
 272
 273 static const struct rspi_plat_data qspi_pdata __initconst = {
 274         .num_chipselect = 1,
 275 };
 276
 277 static const struct spi_board_info spi_info[] __initconst = {
 278         {
 279                 .modalias               = "m25p80",
 280                 .platform_data          = &spi_flash_data,
 281                 .mode                   = SPI_MODE_0,
 282                 .max_speed_hz           = 30000000,
 283                 .bus_num                = 0,
 284                 .chip_select            = 0,
 285         },
 286 };
 287
 288 /* QSPI resource */
 289 static const struct resource qspi_resources[] __initconst = {
 290         DEFINE_RES_MEM(0xe6b10000, 0x1000),
 291         DEFINE_RES_IRQ(gic_spi(184)),
 292 };
 293
 294 static const struct pinctrl_map lager_pinctrl_map[] = {
 295         /* DU (CN10: ARGB0, CN13: LVDS) */
 296         PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
 297                                   "du_rgb666", "du"),
 298         PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
 299                                   "du_sync_1", "du"),
 300         PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
 301                                   "du_clk_out_0", "du"),
 302         /* SCIF0 (CN19: DEBUG SERIAL0) */
 303         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
 304                                   "scif0_data", "scif0"),
 305         /* SCIF1 (CN20: DEBUG SERIAL1) */
 306         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
 307                                   "scif1_data", "scif1"),
 308         /* MMCIF1 */
 309         PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
 310                                   "mmc1_data8", "mmc1"),
 311         PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
 312                                   "mmc1_ctrl", "mmc1"),
 313         /* Ether */
 314         PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
 315                                   "eth_link", "eth"),
 316         PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
 317                                   "eth_mdio", "eth"),
 318         PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
 319                                   "eth_rmii", "eth"),
 320         PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
 321                                   "intc_irq0", "intc"),
 322 };
 323
 324 static void __init lager_add_standard_devices(void)
 325 {
 326         int fixed_regulator_idx = 0;
 327         int gpio_regulator_idx = 0;
 328
 329         r8a7790_clock_init();
 330
 331         pinctrl_register_mappings(lager_pinctrl_map,
 332                                   ARRAY_SIZE(lager_pinctrl_map));
 333         r8a7790_pinmux_init();
 334
 335         r8a7790_add_standard_devices();
 336         platform_device_register_data(&platform_bus, "leds-gpio", -1,
 337                                       &lager_leds_pdata,
 338                                       sizeof(lager_leds_pdata));
 339         platform_device_register_data(&platform_bus, "gpio-keys", -1,
 340                                       &lager_keys_pdata,
 341                                       sizeof(lager_keys_pdata));
 342         regulator_register_always_on(fixed_regulator_idx++,
 343                                      "fixed-3.3V", fixed3v3_power_consumers,
 344                                      ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
 345         platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
 346                                           mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
 347                                           &mmcif1_pdata, sizeof(mmcif1_pdata));
 348
 349         platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
 350                                           ether_resources,
 351                                           ARRAY_SIZE(ether_resources),
 352                                           &ether_pdata, sizeof(ether_pdata));
 353
 354         lager_add_du_device();
 355
 356         platform_device_register_resndata(&platform_bus, "qspi", 0,
 357                                           qspi_resources,
 358                                           ARRAY_SIZE(qspi_resources),
 359                                           &qspi_pdata, sizeof(qspi_pdata));
 360         spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
 361
 362         platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
 363                                       &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
 364         platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
 365                                       &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
 366
 367         platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
 368                                       &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
 369         platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
 370                                       &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
 371 }
 372
 373 /*
 374  * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
 375  * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
 376  * 14-15. We have to set them back to 01 from the default 00 value each time
 377  * the PHY is reset. It's also important because the PHY's LED0 signal is
 378  * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
 379  * bounce on and off after each packet, which we apparently want to avoid.
 380  */
 381 static int lager_ksz8041_fixup(struct phy_device *phydev)
 382 {
 383         u16 phyctrl1 = phy_read(phydev, 0x1e);
 384
 385         phyctrl1 &= ~0xc000;
 386         phyctrl1 |= 0x4000;
 387         return phy_write(phydev, 0x1e, phyctrl1);
 388 }
 389
 390 static void __init lager_init(void)
 391 {
 392         lager_add_standard_devices();
 393
 394         if (IS_ENABLED(CONFIG_PHYLIB))
 395                 phy_register_fixup_for_id("r8a7790-ether-ff:01",
 396                                           lager_ksz8041_fixup);
 397 }
 398
 399 static const char * const lager_boards_compat_dt[] __initconst = {
 400         "renesas,lager",
 401         NULL,
 402 };
 403
 404 DT_MACHINE_START(LAGER_DT, "lager")
 405         .smp            = smp_ops(r8a7790_smp_ops),
 406         .init_early     = r8a7790_init_early,
 407         .init_time      = rcar_gen2_timer_init,
 408         .init_machine   = lager_init,
 409         .init_late      = shmobile_init_late,
 410         .dt_compat      = lager_boards_compat_dt,
 411 MACHINE_END