arch/arm/mach-shmobile/include/mach/dma-register.h

   1 /*
   2  * SH-ARM CPU-specific DMA definitions, used by both DMA drivers
   3  *
   4  * Copyright (C) 2012 Renesas Solutions Corp
   5  *
   6  * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   7  *
   8  * Based on arch/sh/include/cpu-sh4/cpu/dma-register.h
   9  * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #ifndef DMA_REGISTER_H
  17 #define DMA_REGISTER_H
  18
  19 /*
  20  *              Direct Memory Access Controller
  21  */
  22
  23 /* Transmit sizes and respective CHCR register values */
  24 enum {
  25         XMIT_SZ_8BIT            = 0,
  26         XMIT_SZ_16BIT           = 1,
  27         XMIT_SZ_32BIT           = 2,
  28         XMIT_SZ_64BIT           = 7,
  29         XMIT_SZ_128BIT          = 3,
  30         XMIT_SZ_256BIT          = 4,
  31         XMIT_SZ_512BIT          = 5,
  32 };
  33
  34 /* log2(size / 8) - used to calculate number of transfers */
  35 static const unsigned int dma_ts_shift[] = {
  36         [XMIT_SZ_8BIT]          = 0,
  37         [XMIT_SZ_16BIT]         = 1,
  38         [XMIT_SZ_32BIT]         = 2,
  39         [XMIT_SZ_64BIT]         = 3,
  40         [XMIT_SZ_128BIT]        = 4,
  41         [XMIT_SZ_256BIT]        = 5,
  42         [XMIT_SZ_512BIT]        = 6,
  43 };
  44
  45 #define TS_LOW_BIT      0x3 /* --xx */
  46 #define TS_HI_BIT       0xc /* xx-- */
  47
  48 #define TS_LOW_SHIFT    (3)
  49 #define TS_HI_SHIFT     (20 - 2)        /* 2 bits for shifted low TS */
  50
  51 #define TS_INDEX2VAL(i) \
  52         ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
  53          (((i) & TS_HI_BIT)  << TS_HI_SHIFT))
  54
  55 #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
  56 #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
  57
  58
  59 /*
  60  *              USB High-Speed DMAC
  61  */
  62 /* Transmit sizes and respective CHCR register values */
  63 enum {
  64         USBTS_XMIT_SZ_8BYTE             = 0,
  65         USBTS_XMIT_SZ_16BYTE            = 1,
  66         USBTS_XMIT_SZ_32BYTE            = 2,
  67 };
  68
  69 /* log2(size / 8) - used to calculate number of transfers */
  70 static const unsigned int dma_usbts_shift[] = {
  71         [USBTS_XMIT_SZ_8BYTE]   = 3,
  72         [USBTS_XMIT_SZ_16BYTE]  = 4,
  73         [USBTS_XMIT_SZ_32BYTE]  = 5,
  74 };
  75
  76 #define USBTS_LOW_BIT   0x3 /* --xx */
  77 #define USBTS_HI_BIT    0x0 /* ---- */
  78
  79 #define USBTS_LOW_SHIFT 6
  80 #define USBTS_HI_SHIFT  0
  81
  82 #define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
  83
  84 #endif /* DMA_REGISTER_H */