2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
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37 #include <asm/asm-offsets.h>
38 #include <asm/regdef.h>
39 #include <asm/mipsregs.h>
40 #include <asm/stackframe.h>
41 #include <asm/asmmacro.h>
42 #include <asm/addrspace.h>
44 #include <asm/netlogic/common.h>
46 #include <asm/netlogic/xlp-hal/iomap.h>
47 #include <asm/netlogic/xlp-hal/xlp.h>
48 #include <asm/netlogic/xlp-hal/sys.h>
49 #include <asm/netlogic/xlp-hal/cpucontrol.h>
55 .set arch=xlr /* for mfcr/mtcr, XLR is sufficient */
57 FEXPORT(xlp_boot_core0_siblings) /* "Master" cpu starts from here */
58 dmtc0 sp, $4, 2 /* SP saved in UserLocal */
61 /* find the location to which nlm_boot_siblings was relocated */
62 li t0, CKSEG1ADDR(RESET_VEC_PHYS)
63 dla t1, nlm_reset_entry
64 dla t2, nlm_boot_siblings
72 NESTED(nlm_boot_secondary_cpus, 16, sp)
73 /* Initialize CP0 Status */
79 PTR_LA t1, nlm_next_sp
81 PTR_LA t1, nlm_next_gp
84 /* a0 has the processor id */
86 andi a0, 0x3ff /* a0 <- node/core */
87 PTR_LA t0, nlm_early_init_secondary
91 PTR_LA t0, smp_bootstrap
94 END(nlm_boot_secondary_cpus)
97 * In case of RMIboot bootloader which is used on XLR boards, the CPUs
98 * be already woken up and waiting in bootloader code.
99 * This will get them out of the bootloader code and into linux. Needed
100 * because the bootloader area will be taken and initialized by linux.
102 NESTED(nlm_rmiboot_preboot, 16, sp)
103 mfc0 t0, $15, 1 /* read ebase */
104 andi t0, 0x1f /* t0 has the processor_id() */
105 andi t2, t0, 0x3 /* thread num */
106 sll t0, 2 /* offset in cpu array */
108 li t3, CKSEG1ADDR(RESET_DATA_PHYS)
109 ADDIU t1, t3, BOOT_CPU_READY
114 bnez t2, 1f /* skip thread programming */
115 nop /* for thread id != 0 */
118 * XLR MMU setup only for first thread in core
122 li t2, 6 /* XLR thread mode mask */
124 and t2, t1, t2 /* t2 - current thread mode */
125 li v0, CKSEG1ADDR(RESET_DATA_PHYS)
126 lw v1, BOOT_THREAD_MODE(v0) /* v1 - new thread mode */
128 beq v1, t2, 1f /* same as request value */
129 nop /* nothing to do */
131 and t2, t1, t3 /* mask out old thread mode */
132 or t1, t2, v1 /* put in new value */
133 mtcr t1, t0 /* update core control */
135 /* wait for NMI to hit */
139 END(nlm_rmiboot_preboot)