2 * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
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39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x800000>;
50 reg = <0x20000 0x30000>;
51 label = "diagnostic-nor";
56 reg = <0x200000 0x200000>;
62 reg = <0x400000 0x380000>;
67 reg = <0x780000 0x80000>;
75 enet0: ethernet@24000 {
78 phy-connection-type = "rgmii-id";
82 phy0: ethernet-phy@0 {
83 interrupts = <10 1 0 0>;
86 phy1: ethernet-phy@1 {
87 interrupts = <10 1 0 0>;
91 sgmii_phy0: sgmii-phy@0 {
92 interrupts = <6 1 0 0>;
95 sgmii_phy1: sgmii-phy@1 {
96 interrupts = <6 1 0 0>;
102 device_type = "tbi-phy";
106 enet2: ethernet@26000 {
107 phy-handle = <&phy1>;
108 tbi-handle = <&tbi1>;
109 phy-connection-type = "rgmii-id";
115 device_type = "tbi-phy";
122 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
125 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
126 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
127 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
128 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
131 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
134 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
135 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
137 // IDSEL 0x1f IDE/SATA
138 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
139 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
144 reg = <0x0 0x0 0x0 0x0 0x0>;
146 #address-cells = <3>;
147 ranges = <0x2000000 0x0 0xb0000000
148 0x2000000 0x0 0xb0000000
156 #interrupt-cells = <2>;
158 #address-cells = <2>;
159 reg = <0xf000 0x0 0x0 0x0 0x0>;
160 ranges = <0x1 0x0 0x1000000 0x0 0x0
162 interrupt-parent = <&i8259>;
164 i8259: interrupt-controller@20 {
168 interrupt-controller;
169 device_type = "interrupt-controller";
170 #address-cells = <0>;
171 #interrupt-cells = <2>;
172 compatible = "chrp,iic";
173 interrupts = <9 2 0 0>;
174 interrupt-parent = <&mpic>;
179 #address-cells = <1>;
180 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
181 interrupts = <1 3 12 3>;
187 compatible = "pnpPNP,303";
192 compatible = "pnpPNP,f03";
197 compatible = "pnpPNP,b00";
198 reg = <0x1 0x70 0x2>;
202 reg = <0x1 0x400 0x80>;