Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / arch / powerpc / include / asm / exception-64s.h
blob66830618cc19b2f4b12a5b6cefa8d1663425187e
1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
3 /*
4 * Extracted from head_64.S
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
38 #define EX_R9 0
39 #define EX_R10 8
40 #define EX_R11 16
41 #define EX_R12 24
42 #define EX_R13 32
43 #define EX_SRR0 40
44 #define EX_DAR 48
45 #define EX_DSISR 56
46 #define EX_CCR 60
47 #define EX_R3 64
48 #define EX_LR 72
49 #define EX_CFAR 80
50 #define EX_PPR 88 /* SMT thread status register (priority) */
51 #define EX_CTR 96
53 #ifdef CONFIG_RELOCATABLE
54 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
55 ld r12,PACAKBASE(r13); /* get high part of &label */ \
56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
57 LOAD_HANDLER(r12,label); \
58 mtctr r12; \
59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
60 li r10,MSR_RI; \
61 mtmsrd r10,1; /* Set RI (EE=0) */ \
62 bctr;
63 #else
64 /* If not relocatable, we can jump directly -- and save messing with LR */
65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
68 li r10,MSR_RI; \
69 mtmsrd r10,1; /* Set RI (EE=0) */ \
70 b label;
71 #endif
72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
81 EXCEPTION_PROLOG_0(area); \
82 EXCEPTION_PROLOG_1(area, extra, vec); \
83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
86 * We're short on space and time in the exception prolog, so we can't
87 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
88 * low halfword of the address, but for Kdump we need the whole low
89 * word.
91 #define LOAD_HANDLER(reg, label) \
92 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \
93 ori reg,reg,(label)-_stext; /* virt addr of handler ... */
95 /* Exception register prefixes */
96 #define EXC_HV H
97 #define EXC_STD
99 #if defined(CONFIG_RELOCATABLE)
101 * If we support interrupts with relocation on AND we're a relocatable kernel,
102 * we need to use CTR to get to the 2nd level handler. So, save/restore it
103 * when required.
105 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
106 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
107 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
108 #else
109 /* ...else CTR is unused and in register. */
110 #define SAVE_CTR(reg, area)
111 #define GET_CTR(reg, area) mfctr reg
112 #define RESTORE_CTR(reg, area)
113 #endif
116 * PPR save/restore macros used in exceptions_64s.S
117 * Used for P7 or later processors
119 #define SAVE_PPR(area, ra, rb) \
120 BEGIN_FTR_SECTION_NESTED(940) \
121 ld ra,PACACURRENT(r13); \
122 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
123 std rb,TASKTHREADPPR(ra); \
124 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
126 #define RESTORE_PPR_PACA(area, ra) \
127 BEGIN_FTR_SECTION_NESTED(941) \
128 ld ra,area+EX_PPR(r13); \
129 mtspr SPRN_PPR,ra; \
130 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
133 * Increase the priority on systems where PPR save/restore is not
134 * implemented/ supported.
136 #define HMT_MEDIUM_PPR_DISCARD \
137 BEGIN_FTR_SECTION_NESTED(942) \
138 HMT_MEDIUM; \
139 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/
142 * Get an SPR into a register if the CPU has the given feature
144 #define OPT_GET_SPR(ra, spr, ftr) \
145 BEGIN_FTR_SECTION_NESTED(943) \
146 mfspr ra,spr; \
147 END_FTR_SECTION_NESTED(ftr,ftr,943)
150 * Save a register to the PACA if the CPU has the given feature
152 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
153 BEGIN_FTR_SECTION_NESTED(943) \
154 std ra,offset(r13); \
155 END_FTR_SECTION_NESTED(ftr,ftr,943)
157 #define EXCEPTION_PROLOG_0(area) \
158 GET_PACA(r13); \
159 std r9,area+EX_R9(r13); /* save r9 */ \
160 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
161 HMT_MEDIUM; \
162 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
163 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
165 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
166 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
167 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
168 SAVE_CTR(r10, area); \
169 mfcr r9; \
170 extra(vec); \
171 std r11,area+EX_R11(r13); \
172 std r12,area+EX_R12(r13); \
173 GET_SCRATCH0(r10); \
174 std r10,area+EX_R13(r13)
175 #define EXCEPTION_PROLOG_1(area, extra, vec) \
176 __EXCEPTION_PROLOG_1(area, extra, vec)
178 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
179 ld r12,PACAKBASE(r13); /* get high part of &label */ \
180 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
181 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
182 LOAD_HANDLER(r12,label) \
183 mtspr SPRN_##h##SRR0,r12; \
184 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
185 mtspr SPRN_##h##SRR1,r10; \
186 h##rfid; \
187 b . /* prevent speculative execution */
188 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
189 __EXCEPTION_PROLOG_PSERIES_1(label, h)
191 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
192 EXCEPTION_PROLOG_0(area); \
193 EXCEPTION_PROLOG_1(area, extra, vec); \
194 EXCEPTION_PROLOG_PSERIES_1(label, h);
196 #define __KVMTEST(n) \
197 lbz r10,HSTATE_IN_GUEST(r13); \
198 cmpwi r10,0; \
199 bne do_kvm_##n
201 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
203 * If hv is possible, interrupts come into to the hv version
204 * of the kvmppc_interrupt code, which then jumps to the PR handler,
205 * kvmppc_interrupt_pr, if the guest is a PR guest.
207 #define kvmppc_interrupt kvmppc_interrupt_hv
208 #else
209 #define kvmppc_interrupt kvmppc_interrupt_pr
210 #endif
212 #define __KVM_HANDLER(area, h, n) \
213 do_kvm_##n: \
214 BEGIN_FTR_SECTION_NESTED(947) \
215 ld r10,area+EX_CFAR(r13); \
216 std r10,HSTATE_CFAR(r13); \
217 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
218 BEGIN_FTR_SECTION_NESTED(948) \
219 ld r10,area+EX_PPR(r13); \
220 std r10,HSTATE_PPR(r13); \
221 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
222 ld r10,area+EX_R10(r13); \
223 stw r9,HSTATE_SCRATCH1(r13); \
224 ld r9,area+EX_R9(r13); \
225 std r12,HSTATE_SCRATCH0(r13); \
226 li r12,n; \
227 b kvmppc_interrupt
229 #define __KVM_HANDLER_SKIP(area, h, n) \
230 do_kvm_##n: \
231 cmpwi r10,KVM_GUEST_MODE_SKIP; \
232 ld r10,area+EX_R10(r13); \
233 beq 89f; \
234 stw r9,HSTATE_SCRATCH1(r13); \
235 BEGIN_FTR_SECTION_NESTED(948) \
236 ld r9,area+EX_PPR(r13); \
237 std r9,HSTATE_PPR(r13); \
238 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
239 ld r9,area+EX_R9(r13); \
240 std r12,HSTATE_SCRATCH0(r13); \
241 li r12,n; \
242 b kvmppc_interrupt; \
243 89: mtocrf 0x80,r9; \
244 ld r9,area+EX_R9(r13); \
245 b kvmppc_skip_##h##interrupt
247 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
248 #define KVMTEST(n) __KVMTEST(n)
249 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
250 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
252 #else
253 #define KVMTEST(n)
254 #define KVM_HANDLER(area, h, n)
255 #define KVM_HANDLER_SKIP(area, h, n)
256 #endif
258 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
259 #define KVMTEST_PR(n) __KVMTEST(n)
260 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
261 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
263 #else
264 #define KVMTEST_PR(n)
265 #define KVM_HANDLER_PR(area, h, n)
266 #define KVM_HANDLER_PR_SKIP(area, h, n)
267 #endif
269 #define NOTEST(n)
272 * The common exception prolog is used for all except a few exceptions
273 * such as a segment miss on a kernel address. We have to be prepared
274 * to take another exception from the point where we first touch the
275 * kernel stack onwards.
277 * On entry r13 points to the paca, r9-r13 are saved in the paca,
278 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
279 * SRR1, and relocation is on.
281 #define EXCEPTION_PROLOG_COMMON(n, area) \
282 andi. r10,r12,MSR_PR; /* See if coming from user */ \
283 mr r10,r1; /* Save r1 */ \
284 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
285 beq- 1f; \
286 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
287 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
288 blt+ cr1,3f; /* abort if it is */ \
289 li r1,(n); /* will be reloaded later */ \
290 sth r1,PACA_TRAP_SAVE(r13); \
291 std r3,area+EX_R3(r13); \
292 addi r3,r13,area; /* r3 -> where regs are saved*/ \
293 RESTORE_CTR(r1, area); \
294 b bad_stack; \
295 3: std r9,_CCR(r1); /* save CR in stackframe */ \
296 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
297 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
298 std r10,0(r1); /* make stack chain pointer */ \
299 std r0,GPR0(r1); /* save r0 in stackframe */ \
300 std r10,GPR1(r1); /* save r1 in stackframe */ \
301 beq 4f; /* if from kernel mode */ \
302 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
303 SAVE_PPR(area, r9, r10); \
304 4: EXCEPTION_PROLOG_COMMON_2(area) \
305 EXCEPTION_PROLOG_COMMON_3(n) \
306 ACCOUNT_STOLEN_TIME
308 /* Save original regs values from save area to stack frame. */
309 #define EXCEPTION_PROLOG_COMMON_2(area) \
310 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
311 ld r10,area+EX_R10(r13); \
312 std r9,GPR9(r1); \
313 std r10,GPR10(r1); \
314 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
315 ld r10,area+EX_R12(r13); \
316 ld r11,area+EX_R13(r13); \
317 std r9,GPR11(r1); \
318 std r10,GPR12(r1); \
319 std r11,GPR13(r1); \
320 BEGIN_FTR_SECTION_NESTED(66); \
321 ld r10,area+EX_CFAR(r13); \
322 std r10,ORIG_GPR3(r1); \
323 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
324 GET_CTR(r10, area); \
325 std r10,_CTR(r1);
327 #define EXCEPTION_PROLOG_COMMON_3(n) \
328 std r2,GPR2(r1); /* save r2 in stackframe */ \
329 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
330 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
331 mflr r9; /* Get LR, later save to stack */ \
332 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
333 std r9,_LINK(r1); \
334 lbz r10,PACASOFTIRQEN(r13); \
335 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
336 std r10,SOFTE(r1); \
337 std r11,_XER(r1); \
338 li r9,(n)+1; \
339 std r9,_TRAP(r1); /* set trap number */ \
340 li r10,0; \
341 ld r11,exception_marker@toc(r2); \
342 std r10,RESULT(r1); /* clear regs->result */ \
343 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
346 * Exception vectors.
348 #define STD_EXCEPTION_PSERIES(loc, vec, label) \
349 . = loc; \
350 .globl label##_pSeries; \
351 label##_pSeries: \
352 HMT_MEDIUM_PPR_DISCARD; \
353 SET_SCRATCH0(r13); /* save r13 */ \
354 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
355 EXC_STD, KVMTEST_PR, vec)
357 /* Version of above for when we have to branch out-of-line */
358 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \
359 .globl label##_pSeries; \
360 label##_pSeries: \
361 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
362 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD)
364 #define STD_EXCEPTION_HV(loc, vec, label) \
365 . = loc; \
366 .globl label##_hv; \
367 label##_hv: \
368 HMT_MEDIUM_PPR_DISCARD; \
369 SET_SCRATCH0(r13); /* save r13 */ \
370 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
371 EXC_HV, KVMTEST, vec)
373 /* Version of above for when we have to branch out-of-line */
374 #define STD_EXCEPTION_HV_OOL(vec, label) \
375 .globl label##_hv; \
376 label##_hv: \
377 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
378 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV)
380 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
381 . = loc; \
382 .globl label##_relon_pSeries; \
383 label##_relon_pSeries: \
384 HMT_MEDIUM_PPR_DISCARD; \
385 /* No guest interrupts come through here */ \
386 SET_SCRATCH0(r13); /* save r13 */ \
387 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
388 EXC_STD, NOTEST, vec)
390 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
391 .globl label##_relon_pSeries; \
392 label##_relon_pSeries: \
393 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
394 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD)
396 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
397 . = loc; \
398 .globl label##_relon_hv; \
399 label##_relon_hv: \
400 HMT_MEDIUM_PPR_DISCARD; \
401 /* No guest interrupts come through here */ \
402 SET_SCRATCH0(r13); /* save r13 */ \
403 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
404 EXC_HV, NOTEST, vec)
406 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
407 .globl label##_relon_hv; \
408 label##_relon_hv: \
409 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
410 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV)
412 /* This associate vector numbers with bits in paca->irq_happened */
413 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
414 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
415 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
416 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
417 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
418 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
419 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL
421 #define __SOFTEN_TEST(h, vec) \
422 lbz r10,PACASOFTIRQEN(r13); \
423 cmpwi r10,0; \
424 li r10,SOFTEN_VALUE_##vec; \
425 beq masked_##h##interrupt
426 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
428 #define SOFTEN_TEST_PR(vec) \
429 KVMTEST_PR(vec); \
430 _SOFTEN_TEST(EXC_STD, vec)
432 #define SOFTEN_TEST_HV(vec) \
433 KVMTEST(vec); \
434 _SOFTEN_TEST(EXC_HV, vec)
436 #define SOFTEN_TEST_HV_201(vec) \
437 KVMTEST(vec); \
438 _SOFTEN_TEST(EXC_STD, vec)
440 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
441 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
443 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
444 SET_SCRATCH0(r13); /* save r13 */ \
445 EXCEPTION_PROLOG_0(PACA_EXGEN); \
446 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
447 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
449 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
450 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
452 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
453 . = loc; \
454 .globl label##_pSeries; \
455 label##_pSeries: \
456 HMT_MEDIUM_PPR_DISCARD; \
457 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
458 EXC_STD, SOFTEN_TEST_PR)
460 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
461 . = loc; \
462 .globl label##_hv; \
463 label##_hv: \
464 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
465 EXC_HV, SOFTEN_TEST_HV)
467 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
468 .globl label##_hv; \
469 label##_hv: \
470 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
471 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
473 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
474 HMT_MEDIUM_PPR_DISCARD; \
475 SET_SCRATCH0(r13); /* save r13 */ \
476 EXCEPTION_PROLOG_0(PACA_EXGEN); \
477 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
478 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
479 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
480 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
482 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
483 . = loc; \
484 .globl label##_relon_pSeries; \
485 label##_relon_pSeries: \
486 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
487 EXC_STD, SOFTEN_NOTEST_PR)
489 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
490 . = loc; \
491 .globl label##_relon_hv; \
492 label##_relon_hv: \
493 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
494 EXC_HV, SOFTEN_NOTEST_HV)
496 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
497 .globl label##_relon_hv; \
498 label##_relon_hv: \
499 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \
500 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
503 * Our exception common code can be passed various "additions"
504 * to specify the behaviour of interrupts, whether to kick the
505 * runlatch, etc...
508 /* Exception addition: Hard disable interrupts */
509 #define DISABLE_INTS RECONCILE_IRQ_STATE(r10,r11)
511 #define ADD_NVGPRS \
512 bl .save_nvgprs
514 #define RUNLATCH_ON \
515 BEGIN_FTR_SECTION \
516 CURRENT_THREAD_INFO(r3, r1); \
517 ld r4,TI_LOCAL_FLAGS(r3); \
518 andi. r0,r4,_TLF_RUNLATCH; \
519 beql ppc64_runlatch_on_trampoline; \
520 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
522 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
523 .align 7; \
524 .globl label##_common; \
525 label##_common: \
526 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
527 additions; \
528 addi r3,r1,STACK_FRAME_OVERHEAD; \
529 bl hdlr; \
530 b ret
532 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
533 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
534 ADD_NVGPRS;DISABLE_INTS)
537 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
538 * in the idle task and therefore need the special idle handling
539 * (finish nap and runlatch)
541 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
542 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
543 FINISH_NAP;DISABLE_INTS;RUNLATCH_ON)
546 * When the idle code in power4_idle puts the CPU into NAP mode,
547 * it has to do so in a loop, and relies on the external interrupt
548 * and decrementer interrupt entry code to get it out of the loop.
549 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
550 * to signal that it is in the loop and needs help to get out.
552 #ifdef CONFIG_PPC_970_NAP
553 #define FINISH_NAP \
554 BEGIN_FTR_SECTION \
555 CURRENT_THREAD_INFO(r11, r1); \
556 ld r9,TI_LOCAL_FLAGS(r11); \
557 andi. r10,r9,_TLF_NAPPING; \
558 bnel power4_fixup_nap; \
559 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
560 #else
561 #define FINISH_NAP
562 #endif
564 #endif /* _ASM_POWERPC_EXCEPTION_H */