arch/powerpc/include/asm/smp.h

   1 /*
   2  * smp.h: PowerPC-specific SMP code.
   3  *
   4  * Original was a copy of sparc smp.h.  Now heavily modified
   5  * for PPC.
   6  *
   7  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   8  * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version
  13  * 2 of the License, or (at your option) any later version.
  14  */
  15
  16 #ifndef _ASM_POWERPC_SMP_H
  17 #define _ASM_POWERPC_SMP_H
  18 #ifdef __KERNEL__
  19
  20 #include <linux/threads.h>
  21 #include <linux/cpumask.h>
  22 #include <linux/kernel.h>
  23 #include <linux/irqreturn.h>
  24
  25 #ifndef __ASSEMBLY__
  26
  27 #ifdef CONFIG_PPC64
  28 #include <asm/paca.h>
  29 #endif
  30 #include <asm/percpu.h>
  31
  32 extern int boot_cpuid;
  33 extern int spinning_secondaries;
  34
  35 extern void cpu_die(void);
  36 extern int cpu_to_chip_id(int cpu);
  37
  38 #ifdef CONFIG_SMP
  39
  40 struct smp_ops_t {
  41         void  (*message_pass)(int cpu, int msg);
  42 #ifdef CONFIG_PPC_SMP_MUXED_IPI
  43         void  (*cause_ipi)(int cpu, unsigned long data);
  44 #endif
  45         int   (*probe)(void);
  46         int   (*kick_cpu)(int nr);
  47         void  (*setup_cpu)(int nr);
  48         void  (*bringup_done)(void);
  49         void  (*take_timebase)(void);
  50         void  (*give_timebase)(void);
  51         int   (*cpu_disable)(void);
  52         void  (*cpu_die)(unsigned int nr);
  53         int   (*cpu_bootable)(unsigned int nr);
  54 };
  55
  56 extern void smp_send_debugger_break(void);
  57 extern void start_secondary_resume(void);
  58 extern void smp_generic_give_timebase(void);
  59 extern void smp_generic_take_timebase(void);
  60
  61 DECLARE_PER_CPU(unsigned int, cpu_pvr);
  62
  63 #ifdef CONFIG_HOTPLUG_CPU
  64 extern void migrate_irqs(void);
  65 int generic_cpu_disable(void);
  66 void generic_cpu_die(unsigned int cpu);
  67 void generic_mach_cpu_die(void);
  68 void generic_set_cpu_dead(unsigned int cpu);
  69 void generic_set_cpu_up(unsigned int cpu);
  70 int generic_check_cpu_restart(unsigned int cpu);
  71
  72 extern void inhibit_secondary_onlining(void);
  73 extern void uninhibit_secondary_onlining(void);
  74
  75 #else /* HOTPLUG_CPU */
  76 static inline void inhibit_secondary_onlining(void) {}
  77 static inline void uninhibit_secondary_onlining(void) {}
  78
  79 #endif
  80
  81 #ifdef CONFIG_PPC64
  82 #define raw_smp_processor_id()  (local_paca->paca_index)
  83 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
  84 #else
  85 /* 32-bit */
  86 extern int smp_hw_index[];
  87
  88 #define raw_smp_processor_id()  (current_thread_info()->cpu)
  89 #define hard_smp_processor_id()         (smp_hw_index[smp_processor_id()])
  90
  91 static inline int get_hard_smp_processor_id(int cpu)
  92 {
  93         return smp_hw_index[cpu];
  94 }
  95
  96 static inline void set_hard_smp_processor_id(int cpu, int phys)
  97 {
  98         smp_hw_index[cpu] = phys;
  99 }
 100 #endif
 101
 102 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
 103 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
 104
 105 static inline struct cpumask *cpu_sibling_mask(int cpu)
 106 {
 107         return per_cpu(cpu_sibling_map, cpu);
 108 }
 109
 110 static inline struct cpumask *cpu_core_mask(int cpu)
 111 {
 112         return per_cpu(cpu_core_map, cpu);
 113 }
 114
 115 extern int cpu_to_core_id(int cpu);
 116
 117 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
 118  *
 119  * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
 120  * in /proc/interrupts will be wrong!!! --Troy */
 121 #define PPC_MSG_CALL_FUNCTION   0
 122 #define PPC_MSG_RESCHEDULE      1
 123 #define PPC_MSG_CALL_FUNC_SINGLE        2
 124 #define PPC_MSG_DEBUGGER_BREAK  3
 125
 126 /* for irq controllers that have dedicated ipis per message (4) */
 127 extern int smp_request_message_ipi(int virq, int message);
 128 extern const char *smp_ipi_name[];
 129
 130 /* for irq controllers with only a single ipi */
 131 extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
 132 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
 133 extern irqreturn_t smp_ipi_demux(void);
 134
 135 void smp_init_pSeries(void);
 136 void smp_init_cell(void);
 137 void smp_init_celleb(void);
 138 void smp_setup_cpu_maps(void);
 139
 140 extern int __cpu_disable(void);
 141 extern void __cpu_die(unsigned int cpu);
 142
 143 #else
 144 /* for UP */
 145 #define hard_smp_processor_id()         get_hard_smp_processor_id(0)
 146 #define smp_setup_cpu_maps()
 147 static inline void inhibit_secondary_onlining(void) {}
 148 static inline void uninhibit_secondary_onlining(void) {}
 149 static inline const struct cpumask *cpu_sibling_mask(int cpu)
 150 {
 151         return cpumask_of(cpu);
 152 }
 153
 154 #endif /* CONFIG_SMP */
 155
 156 #ifdef CONFIG_PPC64
 157 static inline int get_hard_smp_processor_id(int cpu)
 158 {
 159         return paca[cpu].hw_cpu_id;
 160 }
 161
 162 static inline void set_hard_smp_processor_id(int cpu, int phys)
 163 {
 164         paca[cpu].hw_cpu_id = phys;
 165 }
 166
 167 extern void smp_release_cpus(void);
 168
 169 #else
 170 /* 32-bit */
 171 #ifndef CONFIG_SMP
 172 extern int boot_cpuid_phys;
 173 static inline int get_hard_smp_processor_id(int cpu)
 174 {
 175         return boot_cpuid_phys;
 176 }
 177
 178 static inline void set_hard_smp_processor_id(int cpu, int phys)
 179 {
 180         boot_cpuid_phys = phys;
 181 }
 182 #endif /* !CONFIG_SMP */
 183 #endif /* !CONFIG_PPC64 */
 184
 185 extern int smt_enabled_at_boot;
 186
 187 extern int smp_mpic_probe(void);
 188 extern void smp_mpic_setup_cpu(int cpu);
 189 extern int smp_generic_kick_cpu(int nr);
 190 extern int smp_generic_cpu_bootable(unsigned int nr);
 191
 192
 193 extern void smp_generic_give_timebase(void);
 194 extern void smp_generic_take_timebase(void);
 195
 196 extern struct smp_ops_t *smp_ops;
 197
 198 extern void arch_send_call_function_single_ipi(int cpu);
 199 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 200
 201 /* Definitions relative to the secondary CPU spin loop
 202  * and entry point. Not all of them exist on both 32 and
 203  * 64-bit but defining them all here doesn't harm
 204  */
 205 extern void generic_secondary_smp_init(void);
 206 extern void generic_secondary_thread_init(void);
 207 extern unsigned long __secondary_hold_spinloop;
 208 extern unsigned long __secondary_hold_acknowledge;
 209 extern char __secondary_hold;
 210
 211 extern void __early_start(void);
 212 #endif /* __ASSEMBLY__ */
 213
 214 #endif /* __KERNEL__ */
 215 #endif /* _ASM_POWERPC_SMP_H) */