Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / arch / powerpc / include / asm / spinlock.h
blob35aa339410bdaef7d50decc76bda487677323e78
1 #ifndef __ASM_SPINLOCK_H
2 #define __ASM_SPINLOCK_H
3 #ifdef __KERNEL__
5 /*
6 * Simple spin lock operations.
8 * Copyright (C) 2001-2004 Paul Mackerras <paulus@au.ibm.com>, IBM
9 * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
10 * Copyright (C) 2002 Dave Engebretsen <engebret@us.ibm.com>, IBM
11 * Rework to support virtual processors
13 * Type of int is used as a full 64b word is not necessary.
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
20 * (the type definitions are in asm/spinlock_types.h)
22 #include <linux/irqflags.h>
23 #ifdef CONFIG_PPC64
24 #include <asm/paca.h>
25 #include <asm/hvcall.h>
26 #endif
27 #include <asm/asm-compat.h>
28 #include <asm/synch.h>
29 #include <asm/ppc-opcode.h>
31 #define smp_mb__after_unlock_lock() smp_mb() /* Full ordering for lock. */
33 #ifdef CONFIG_PPC64
34 /* use 0x800000yy when locked, where yy == CPU number */
35 #ifdef __BIG_ENDIAN__
36 #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
37 #else
38 #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index))
39 #endif
40 #else
41 #define LOCK_TOKEN 1
42 #endif
44 #if defined(CONFIG_PPC64) && defined(CONFIG_SMP)
45 #define CLEAR_IO_SYNC (get_paca()->io_sync = 0)
46 #define SYNC_IO do { \
47 if (unlikely(get_paca()->io_sync)) { \
48 mb(); \
49 get_paca()->io_sync = 0; \
50 } \
51 } while (0)
52 #else
53 #define CLEAR_IO_SYNC
54 #define SYNC_IO
55 #endif
57 static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
59 return lock.slock == 0;
62 static inline int arch_spin_is_locked(arch_spinlock_t *lock)
64 return !arch_spin_value_unlocked(*lock);
68 * This returns the old value in the lock, so we succeeded
69 * in getting the lock if the return value is 0.
71 static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
73 unsigned long tmp, token;
75 token = LOCK_TOKEN;
76 __asm__ __volatile__(
77 "1: " PPC_LWARX(%0,0,%2,1) "\n\
78 cmpwi 0,%0,0\n\
79 bne- 2f\n\
80 stwcx. %1,0,%2\n\
81 bne- 1b\n"
82 PPC_ACQUIRE_BARRIER
83 "2:"
84 : "=&r" (tmp)
85 : "r" (token), "r" (&lock->slock)
86 : "cr0", "memory");
88 return tmp;
91 static inline int arch_spin_trylock(arch_spinlock_t *lock)
93 CLEAR_IO_SYNC;
94 return __arch_spin_trylock(lock) == 0;
98 * On a system with shared processors (that is, where a physical
99 * processor is multiplexed between several virtual processors),
100 * there is no point spinning on a lock if the holder of the lock
101 * isn't currently scheduled on a physical processor. Instead
102 * we detect this situation and ask the hypervisor to give the
103 * rest of our timeslice to the lock holder.
105 * So that we can tell which virtual processor is holding a lock,
106 * we put 0x80000000 | smp_processor_id() in the lock when it is
107 * held. Conveniently, we have a word in the paca that holds this
108 * value.
111 #if defined(CONFIG_PPC_SPLPAR)
112 /* We only yield to the hypervisor if we are in shared processor mode */
113 #define SHARED_PROCESSOR (lppaca_shared_proc(local_paca->lppaca_ptr))
114 extern void __spin_yield(arch_spinlock_t *lock);
115 extern void __rw_yield(arch_rwlock_t *lock);
116 #else /* SPLPAR */
117 #define __spin_yield(x) barrier()
118 #define __rw_yield(x) barrier()
119 #define SHARED_PROCESSOR 0
120 #endif
122 static inline void arch_spin_lock(arch_spinlock_t *lock)
124 CLEAR_IO_SYNC;
125 while (1) {
126 if (likely(__arch_spin_trylock(lock) == 0))
127 break;
128 do {
129 HMT_low();
130 if (SHARED_PROCESSOR)
131 __spin_yield(lock);
132 } while (unlikely(lock->slock != 0));
133 HMT_medium();
137 static inline
138 void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
140 unsigned long flags_dis;
142 CLEAR_IO_SYNC;
143 while (1) {
144 if (likely(__arch_spin_trylock(lock) == 0))
145 break;
146 local_save_flags(flags_dis);
147 local_irq_restore(flags);
148 do {
149 HMT_low();
150 if (SHARED_PROCESSOR)
151 __spin_yield(lock);
152 } while (unlikely(lock->slock != 0));
153 HMT_medium();
154 local_irq_restore(flags_dis);
158 static inline void arch_spin_unlock(arch_spinlock_t *lock)
160 SYNC_IO;
161 __asm__ __volatile__("# arch_spin_unlock\n\t"
162 PPC_RELEASE_BARRIER: : :"memory");
163 lock->slock = 0;
166 #ifdef CONFIG_PPC64
167 extern void arch_spin_unlock_wait(arch_spinlock_t *lock);
168 #else
169 #define arch_spin_unlock_wait(lock) \
170 do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)
171 #endif
174 * Read-write spinlocks, allowing multiple readers
175 * but only one writer.
177 * NOTE! it is quite common to have readers in interrupts
178 * but no interrupt writers. For those circumstances we
179 * can "mix" irq-safe locks - any writer needs to get a
180 * irq-safe write-lock, but readers can get non-irqsafe
181 * read-locks.
184 #define arch_read_can_lock(rw) ((rw)->lock >= 0)
185 #define arch_write_can_lock(rw) (!(rw)->lock)
187 #ifdef CONFIG_PPC64
188 #define __DO_SIGN_EXTEND "extsw %0,%0\n"
189 #define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */
190 #else
191 #define __DO_SIGN_EXTEND
192 #define WRLOCK_TOKEN (-1)
193 #endif
196 * This returns the old value in the lock + 1,
197 * so we got a read lock if the return value is > 0.
199 static inline long __arch_read_trylock(arch_rwlock_t *rw)
201 long tmp;
203 __asm__ __volatile__(
204 "1: " PPC_LWARX(%0,0,%1,1) "\n"
205 __DO_SIGN_EXTEND
206 " addic. %0,%0,1\n\
207 ble- 2f\n"
208 PPC405_ERR77(0,%1)
209 " stwcx. %0,0,%1\n\
210 bne- 1b\n"
211 PPC_ACQUIRE_BARRIER
212 "2:" : "=&r" (tmp)
213 : "r" (&rw->lock)
214 : "cr0", "xer", "memory");
216 return tmp;
220 * This returns the old value in the lock,
221 * so we got the write lock if the return value is 0.
223 static inline long __arch_write_trylock(arch_rwlock_t *rw)
225 long tmp, token;
227 token = WRLOCK_TOKEN;
228 __asm__ __volatile__(
229 "1: " PPC_LWARX(%0,0,%2,1) "\n\
230 cmpwi 0,%0,0\n\
231 bne- 2f\n"
232 PPC405_ERR77(0,%1)
233 " stwcx. %1,0,%2\n\
234 bne- 1b\n"
235 PPC_ACQUIRE_BARRIER
236 "2:" : "=&r" (tmp)
237 : "r" (token), "r" (&rw->lock)
238 : "cr0", "memory");
240 return tmp;
243 static inline void arch_read_lock(arch_rwlock_t *rw)
245 while (1) {
246 if (likely(__arch_read_trylock(rw) > 0))
247 break;
248 do {
249 HMT_low();
250 if (SHARED_PROCESSOR)
251 __rw_yield(rw);
252 } while (unlikely(rw->lock < 0));
253 HMT_medium();
257 static inline void arch_write_lock(arch_rwlock_t *rw)
259 while (1) {
260 if (likely(__arch_write_trylock(rw) == 0))
261 break;
262 do {
263 HMT_low();
264 if (SHARED_PROCESSOR)
265 __rw_yield(rw);
266 } while (unlikely(rw->lock != 0));
267 HMT_medium();
271 static inline int arch_read_trylock(arch_rwlock_t *rw)
273 return __arch_read_trylock(rw) > 0;
276 static inline int arch_write_trylock(arch_rwlock_t *rw)
278 return __arch_write_trylock(rw) == 0;
281 static inline void arch_read_unlock(arch_rwlock_t *rw)
283 long tmp;
285 __asm__ __volatile__(
286 "# read_unlock\n\t"
287 PPC_RELEASE_BARRIER
288 "1: lwarx %0,0,%1\n\
289 addic %0,%0,-1\n"
290 PPC405_ERR77(0,%1)
291 " stwcx. %0,0,%1\n\
292 bne- 1b"
293 : "=&r"(tmp)
294 : "r"(&rw->lock)
295 : "cr0", "xer", "memory");
298 static inline void arch_write_unlock(arch_rwlock_t *rw)
300 __asm__ __volatile__("# write_unlock\n\t"
301 PPC_RELEASE_BARRIER: : :"memory");
302 rw->lock = 0;
305 #define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
306 #define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
308 #define arch_spin_relax(lock) __spin_yield(lock)
309 #define arch_read_relax(lock) __rw_yield(lock)
310 #define arch_write_relax(lock) __rw_yield(lock)
312 #endif /* __KERNEL__ */
313 #endif /* __ASM_SPINLOCK_H */