2 * linux/arch/powerpc/platforms/cell/qpace_setup.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
9 * Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/export.h>
21 #include <linux/delay.h>
22 #include <linux/irq.h>
23 #include <linux/console.h>
24 #include <linux/of_platform.h>
27 #include <asm/processor.h>
29 #include <asm/kexec.h>
30 #include <asm/pgtable.h>
34 #include <asm/machdep.h>
36 #include <asm/cputable.h>
39 #include <asm/spu_priv1.h>
41 #include <asm/cell-regs.h>
43 #include "interrupt.h"
44 #include "pervasive.h"
47 static void qpace_show_cpuinfo(struct seq_file
*m
)
49 struct device_node
*root
;
50 const char *model
= "";
52 root
= of_find_node_by_path("/");
54 model
= of_get_property(root
, "model", NULL
);
55 seq_printf(m
, "machine\t\t: CHRP %s\n", model
);
59 static void qpace_progress(char *s
, unsigned short hex
)
61 printk("*** %04x : %s\n", hex
, s
? s
: "");
64 static const struct of_device_id qpace_bus_ids
[] __initconst
= {
66 { .compatible
= "soc", },
67 { .type
= "spider", },
76 static int __init
qpace_publish_devices(void)
80 /* Publish OF platform devices for southbridge IOs */
81 of_platform_bus_probe(NULL
, qpace_bus_ids
, NULL
);
83 /* There is no device for the MIC memory controller, thus we create
84 * a platform device for it to attach the EDAC driver to.
86 for_each_online_node(node
) {
87 if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node
)) == NULL
)
89 platform_device_register_simple("cbe-mic", node
, NULL
, 0);
94 machine_subsys_initcall(qpace
, qpace_publish_devices
);
96 static void __init
qpace_setup_arch(void)
98 #ifdef CONFIG_SPU_BASE
99 spu_priv1_ops
= &spu_priv1_mmio_ops
;
100 spu_management_ops
= &spu_management_of_ops
;
105 #ifdef CONFIG_CBE_RAS
113 /* init to some ~sane value until calibrate_delay() runs */
114 loops_per_jiffy
= 50000000;
116 cbe_pervasive_init();
117 #ifdef CONFIG_DUMMY_CONSOLE
118 conswitchp
= &dummy_con
;
122 static int __init
qpace_probe(void)
124 unsigned long root
= of_get_flat_dt_root();
126 if (!of_flat_dt_is_compatible(root
, "IBM,QPACE"))
134 define_machine(qpace
) {
136 .probe
= qpace_probe
,
137 .setup_arch
= qpace_setup_arch
,
138 .show_cpuinfo
= qpace_show_cpuinfo
,
139 .restart
= rtas_restart
,
140 .power_off
= rtas_power_off
,
142 .get_boot_time
= rtas_get_boot_time
,
143 .get_rtc_time
= rtas_get_rtc_time
,
144 .set_rtc_time
= rtas_set_rtc_time
,
145 .calibrate_decr
= generic_calibrate_decr
,
146 .progress
= qpace_progress
,
147 .init_IRQ
= iic_init_IRQ
,