arch/tile/include/arch/trio.h

   1 /*
   2  * Copyright 2012 Tilera Corporation. All Rights Reserved.
   3  *
   4  *   This program is free software; you can redistribute it and/or
   5  *   modify it under the terms of the GNU General Public License
   6  *   as published by the Free Software Foundation, version 2.
   7  *
   8  *   This program is distributed in the hope that it will be useful, but
   9  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11  *   NON INFRINGEMENT.  See the GNU General Public License for
  12  *   more details.
  13  */
  14
  15 /* Machine-generated file; do not edit. */
  16
  17 #ifndef __ARCH_TRIO_H__
  18 #define __ARCH_TRIO_H__
  19
  20 #include <arch/abi.h>
  21 #include <arch/trio_def.h>
  22
  23 #ifndef __ASSEMBLER__
  24
  25 /*
  26  * Map SQ Doorbell Format.
  27  * This describes the format of the write-only doorbell register that exists
  28  * in the last 8-bytes of the MAP_SQ_BASE/LIM range.  This register is only
  29  * writable from PCIe space.  Writes to this register will not be written to
  30  * Tile memory space and thus no IO VA translation is required if the last
  31  * page of the BASE/LIM range is not otherwise written.
  32  */
  33
  34 __extension__
  35 typedef union
  36 {
  37   struct
  38   {
  39 #ifndef __BIG_ENDIAN__
  40     /*
  41      * When written with a 1, the associated MAP_SQ region's doorbell
  42      * interrupt will be triggered once all previous writes are visible to
  43      * Tile software.
  44      */
  45     uint_reg_t doorbell   : 1;
  46     /*
  47      * When written with a 1, the descriptor at the head of the associated
  48      * MAP_SQ's FIFO will be dequeued.
  49      */
  50     uint_reg_t pop        : 1;
  51     /* Reserved. */
  52     uint_reg_t __reserved : 62;
  53 #else   /* __BIG_ENDIAN__ */
  54     uint_reg_t __reserved : 62;
  55     uint_reg_t pop        : 1;
  56     uint_reg_t doorbell   : 1;
  57 #endif
  58   };
  59
  60   uint_reg_t word;
  61 } TRIO_MAP_SQ_DOORBELL_FMT_t;
  62
  63
  64 /*
  65  * Tile PIO Region Configuration - CFG Address Format.
  66  * This register describes the address format for PIO accesses when the
  67  * associated region is setup with TYPE=CFG.
  68  */
  69
  70 __extension__
  71 typedef union
  72 {
  73   struct
  74   {
  75 #ifndef __BIG_ENDIAN__
  76     /* Register Address (full byte address). */
  77     uint_reg_t reg_addr     : 12;
  78     /* Function Number */
  79     uint_reg_t fn           : 3;
  80     /* Device Number */
  81     uint_reg_t dev          : 5;
  82     /* BUS Number */
  83     uint_reg_t bus          : 8;
  84     /* Config Type: 0 for access to directly-attached device.  1 otherwise. */
  85     uint_reg_t type         : 1;
  86     /* Reserved. */
  87     uint_reg_t __reserved_0 : 1;
  88     /*
  89      * MAC select.  This must match the configuration in
  90      * TILE_PIO_REGION_SETUP.MAC.
  91      */
  92     uint_reg_t mac          : 2;
  93     /* Reserved. */
  94     uint_reg_t __reserved_1 : 32;
  95 #else   /* __BIG_ENDIAN__ */
  96     uint_reg_t __reserved_1 : 32;
  97     uint_reg_t mac          : 2;
  98     uint_reg_t __reserved_0 : 1;
  99     uint_reg_t type         : 1;
 100     uint_reg_t bus          : 8;
 101     uint_reg_t dev          : 5;
 102     uint_reg_t fn           : 3;
 103     uint_reg_t reg_addr     : 12;
 104 #endif
 105   };
 106
 107   uint_reg_t word;
 108 } TRIO_TILE_PIO_REGION_SETUP_CFG_ADDR_t;
 109 #endif /* !defined(__ASSEMBLER__) */
 110
 111 #endif /* !defined(__ARCH_TRIO_H__) */