2 * Copyright 2011 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #include <linux/kernel.h>
16 #include <linux/string.h>
17 #include <asm/byteorder.h>
18 #include <asm/backtrace.h>
19 #include <asm/tile-desc.h>
23 #define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
24 #define tile_decoded_instruction tilegx_decoded_instruction
25 #define tile_mnemonic tilegx_mnemonic
26 #define parse_insn_tile parse_insn_tilegx
27 #define TILE_OPC_IRET TILEGX_OPC_IRET
28 #define TILE_OPC_ADDI TILEGX_OPC_ADDI
29 #define TILE_OPC_ADDLI TILEGX_OPC_ADDLI
30 #define TILE_OPC_INFO TILEGX_OPC_INFO
31 #define TILE_OPC_INFOL TILEGX_OPC_INFOL
32 #define TILE_OPC_JRP TILEGX_OPC_JRP
33 #define TILE_OPC_MOVE TILEGX_OPC_MOVE
34 #define OPCODE_STORE TILEGX_OPC_ST
35 typedef long long bt_int_reg_t
;
37 #define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE
38 #define tile_decoded_instruction tilepro_decoded_instruction
39 #define tile_mnemonic tilepro_mnemonic
40 #define parse_insn_tile parse_insn_tilepro
41 #define TILE_OPC_IRET TILEPRO_OPC_IRET
42 #define TILE_OPC_ADDI TILEPRO_OPC_ADDI
43 #define TILE_OPC_ADDLI TILEPRO_OPC_ADDLI
44 #define TILE_OPC_INFO TILEPRO_OPC_INFO
45 #define TILE_OPC_INFOL TILEPRO_OPC_INFOL
46 #define TILE_OPC_JRP TILEPRO_OPC_JRP
47 #define TILE_OPC_MOVE TILEPRO_OPC_MOVE
48 #define OPCODE_STORE TILEPRO_OPC_SW
49 typedef int bt_int_reg_t
;
52 /* A decoded bundle used for backtracer analysis. */
53 struct BacktraceBundle
{
54 tile_bundle_bits bits
;
56 struct tile_decoded_instruction
57 insns
[TILE_MAX_INSTRUCTIONS_PER_BUNDLE
];
61 /* Locates an instruction inside the given bundle that
62 * has the specified mnemonic, and whose first 'num_operands_to_match'
63 * operands exactly match those in 'operand_values'.
65 static const struct tile_decoded_instruction
*find_matching_insn(
66 const struct BacktraceBundle
*bundle
,
67 tile_mnemonic mnemonic
,
68 const int *operand_values
,
69 int num_operands_to_match
)
74 for (i
= 0; i
< bundle
->num_insns
; i
++) {
75 const struct tile_decoded_instruction
*insn
=
78 if (insn
->opcode
->mnemonic
!= mnemonic
)
82 for (j
= 0; j
< num_operands_to_match
; j
++) {
83 if (operand_values
[j
] != insn
->operand_values
[j
]) {
96 /* Does this bundle contain an 'iret' instruction? */
97 static inline bool bt_has_iret(const struct BacktraceBundle
*bundle
)
99 return find_matching_insn(bundle
, TILE_OPC_IRET
, NULL
, 0) != NULL
;
102 /* Does this bundle contain an 'addi sp, sp, OFFSET' or
103 * 'addli sp, sp, OFFSET' instruction, and if so, what is OFFSET?
105 static bool bt_has_addi_sp(const struct BacktraceBundle
*bundle
, int *adjust
)
107 static const int vals
[2] = { TREG_SP
, TREG_SP
};
109 const struct tile_decoded_instruction
*insn
=
110 find_matching_insn(bundle
, TILE_OPC_ADDI
, vals
, 2);
112 insn
= find_matching_insn(bundle
, TILE_OPC_ADDLI
, vals
, 2);
115 insn
= find_matching_insn(bundle
, TILEGX_OPC_ADDXLI
, vals
, 2);
117 insn
= find_matching_insn(bundle
, TILEGX_OPC_ADDXI
, vals
, 2);
122 *adjust
= insn
->operand_values
[2];
126 /* Does this bundle contain any 'info OP' or 'infol OP'
127 * instruction, and if so, what are their OP? Note that OP is interpreted
128 * as an unsigned value by this code since that's what the caller wants.
129 * Returns the number of info ops found.
131 static int bt_get_info_ops(const struct BacktraceBundle
*bundle
,
132 int operands
[MAX_INFO_OPS_PER_BUNDLE
])
137 for (i
= 0; i
< bundle
->num_insns
; i
++) {
138 const struct tile_decoded_instruction
*insn
=
141 if (insn
->opcode
->mnemonic
== TILE_OPC_INFO
||
142 insn
->opcode
->mnemonic
== TILE_OPC_INFOL
) {
143 operands
[num_ops
++] = insn
->operand_values
[0];
150 /* Does this bundle contain a jrp instruction, and if so, to which
151 * register is it jumping?
153 static bool bt_has_jrp(const struct BacktraceBundle
*bundle
, int *target_reg
)
155 const struct tile_decoded_instruction
*insn
=
156 find_matching_insn(bundle
, TILE_OPC_JRP
, NULL
, 0);
160 *target_reg
= insn
->operand_values
[0];
164 /* Does this bundle modify the specified register in any way? */
165 static bool bt_modifies_reg(const struct BacktraceBundle
*bundle
, int reg
)
168 for (i
= 0; i
< bundle
->num_insns
; i
++) {
169 const struct tile_decoded_instruction
*insn
=
172 if (insn
->opcode
->implicitly_written_register
== reg
)
175 for (j
= 0; j
< insn
->opcode
->num_operands
; j
++)
176 if (insn
->operands
[j
]->is_dest_reg
&&
177 insn
->operand_values
[j
] == reg
)
184 /* Does this bundle modify sp? */
185 static inline bool bt_modifies_sp(const struct BacktraceBundle
*bundle
)
187 return bt_modifies_reg(bundle
, TREG_SP
);
190 /* Does this bundle modify lr? */
191 static inline bool bt_modifies_lr(const struct BacktraceBundle
*bundle
)
193 return bt_modifies_reg(bundle
, TREG_LR
);
196 /* Does this bundle contain the instruction 'move fp, sp'? */
197 static inline bool bt_has_move_r52_sp(const struct BacktraceBundle
*bundle
)
199 static const int vals
[2] = { 52, TREG_SP
};
200 return find_matching_insn(bundle
, TILE_OPC_MOVE
, vals
, 2) != NULL
;
203 /* Does this bundle contain a store of lr to sp? */
204 static inline bool bt_has_sw_sp_lr(const struct BacktraceBundle
*bundle
)
206 static const int vals
[2] = { TREG_SP
, TREG_LR
};
207 return find_matching_insn(bundle
, OPCODE_STORE
, vals
, 2) != NULL
;
211 /* Track moveli values placed into registers. */
212 static inline void bt_update_moveli(const struct BacktraceBundle
*bundle
,
216 for (i
= 0; i
< bundle
->num_insns
; i
++) {
217 const struct tile_decoded_instruction
*insn
=
220 if (insn
->opcode
->mnemonic
== TILEGX_OPC_MOVELI
) {
221 int reg
= insn
->operand_values
[0];
222 moveli_args
[reg
] = insn
->operand_values
[1];
227 /* Does this bundle contain an 'add sp, sp, reg' instruction
228 * from a register that we saw a moveli into, and if so, what
229 * is the value in the register?
231 static bool bt_has_add_sp(const struct BacktraceBundle
*bundle
, int *adjust
,
234 static const int vals
[2] = { TREG_SP
, TREG_SP
};
236 const struct tile_decoded_instruction
*insn
=
237 find_matching_insn(bundle
, TILEGX_OPC_ADDX
, vals
, 2);
239 int reg
= insn
->operand_values
[2];
240 if (moveli_args
[reg
]) {
241 *adjust
= moveli_args
[reg
];
249 /* Locates the caller's PC and SP for a program starting at the
252 static void find_caller_pc_and_caller_sp(CallerLocation
*location
,
253 const unsigned long start_pc
,
254 BacktraceMemoryReader read_memory_func
,
255 void *read_memory_func_extra
)
257 /* Have we explicitly decided what the sp is,
258 * rather than just the default?
260 bool sp_determined
= false;
262 /* Has any bundle seen so far modified lr? */
263 bool lr_modified
= false;
265 /* Have we seen a move from sp to fp? */
266 bool sp_moved_to_r52
= false;
268 /* Have we seen a terminating bundle? */
269 bool seen_terminating_bundle
= false;
271 /* Cut down on round-trip reading overhead by reading several
274 tile_bundle_bits prefetched_bundles
[32];
275 int num_bundles_prefetched
= 0;
280 /* Naively try to track moveli values to support addx for -m32. */
281 int moveli_args
[TILEGX_NUM_REGISTERS
] = { 0 };
284 /* Default to assuming that the caller's sp is the current sp.
285 * This is necessary to handle the case where we start backtracing
286 * right at the end of the epilog.
288 location
->sp_location
= SP_LOC_OFFSET
;
289 location
->sp_offset
= 0;
291 /* Default to having no idea where the caller PC is. */
292 location
->pc_location
= PC_LOC_UNKNOWN
;
294 /* Don't even try if the PC is not aligned. */
295 if (start_pc
% TILE_BUNDLE_ALIGNMENT_IN_BYTES
!= 0)
298 for (pc
= start_pc
;; pc
+= sizeof(tile_bundle_bits
)) {
300 struct BacktraceBundle bundle
;
301 int num_info_ops
, info_operands
[MAX_INFO_OPS_PER_BUNDLE
];
302 int one_ago
, jrp_reg
;
305 if (next_bundle
>= num_bundles_prefetched
) {
306 /* Prefetch some bytes, but don't cross a page
307 * boundary since that might cause a read failure we
308 * don't care about if we only need the first few
309 * bytes. Note: we don't care what the actual page
310 * size is; using the minimum possible page size will
311 * prevent any problems.
313 unsigned int bytes_to_prefetch
= 4096 - (pc
& 4095);
314 if (bytes_to_prefetch
> sizeof prefetched_bundles
)
315 bytes_to_prefetch
= sizeof prefetched_bundles
;
317 if (!read_memory_func(prefetched_bundles
, pc
,
319 read_memory_func_extra
)) {
320 if (pc
== start_pc
) {
321 /* The program probably called a bad
322 * address, such as a NULL pointer.
323 * So treat this as if we are at the
324 * start of the function prolog so the
325 * backtrace will show how we got here.
327 location
->pc_location
= PC_LOC_IN_LR
;
331 /* Unreadable address. Give up. */
336 num_bundles_prefetched
=
337 bytes_to_prefetch
/ sizeof(tile_bundle_bits
);
341 * Decode the next bundle.
342 * TILE always stores instruction bundles in little-endian
343 * mode, even when the chip is running in big-endian mode.
345 bundle
.bits
= le64_to_cpu(prefetched_bundles
[next_bundle
++]);
347 parse_insn_tile(bundle
.bits
, pc
, bundle
.insns
);
348 num_info_ops
= bt_get_info_ops(&bundle
, info_operands
);
350 /* First look at any one_ago info ops if they are interesting,
351 * since they should shadow any non-one-ago info ops.
353 for (one_ago
= (pc
!= start_pc
) ? 1 : 0;
354 one_ago
>= 0; one_ago
--) {
356 for (i
= 0; i
< num_info_ops
; i
++) {
357 int info_operand
= info_operands
[i
];
358 if (info_operand
< CALLER_UNKNOWN_BASE
) {
359 /* Weird; reserved value, ignore it. */
363 /* Skip info ops which are not in the
364 * "one_ago" mode we want right now.
366 if (((info_operand
& ONE_BUNDLE_AGO_FLAG
) != 0)
370 /* Clear the flag to make later checking
372 info_operand
&= ~ONE_BUNDLE_AGO_FLAG
;
374 /* Default to looking at PC_IN_LR_FLAG. */
375 if (info_operand
& PC_IN_LR_FLAG
)
376 location
->pc_location
=
379 location
->pc_location
=
382 switch (info_operand
) {
383 case CALLER_UNKNOWN_BASE
:
384 location
->pc_location
= PC_LOC_UNKNOWN
;
385 location
->sp_location
= SP_LOC_UNKNOWN
;
388 case CALLER_SP_IN_R52_BASE
:
389 case CALLER_SP_IN_R52_BASE
| PC_IN_LR_FLAG
:
390 location
->sp_location
= SP_LOC_IN_R52
;
395 const unsigned int val
= info_operand
396 - CALLER_SP_OFFSET_BASE
;
397 const unsigned int sp_offset
=
398 (val
>> NUM_INFO_OP_FLAGS
) * 8;
399 if (sp_offset
< 32768) {
400 /* This is a properly encoded
402 location
->sp_location
=
404 location
->sp_offset
=
408 /* This looked like an SP
409 * offset, but it's outside
410 * the legal range, so this
411 * must be an unrecognized
412 * info operand. Ignore it.
421 if (seen_terminating_bundle
) {
422 /* We saw a terminating bundle during the previous
423 * iteration, so we were only looking for an info op.
428 if (bundle
.bits
== 0) {
429 /* Wacky terminating bundle. Stop looping, and hope
430 * we've already seen enough to find the caller.
436 * Try to determine caller's SP.
439 if (!sp_determined
) {
441 if (bt_has_addi_sp(&bundle
, &adjust
)
443 || bt_has_add_sp(&bundle
, &adjust
, moveli_args
)
446 location
->sp_location
= SP_LOC_OFFSET
;
449 /* We are in prolog about to adjust
451 location
->sp_offset
= 0;
453 /* We are in epilog restoring SP. */
454 location
->sp_offset
= adjust
;
457 sp_determined
= true;
459 if (bt_has_move_r52_sp(&bundle
)) {
460 /* Maybe in prolog, creating an
461 * alloca-style frame. But maybe in
462 * the middle of a fixed-size frame
463 * clobbering r52 with SP.
465 sp_moved_to_r52
= true;
468 if (bt_modifies_sp(&bundle
)) {
469 if (sp_moved_to_r52
) {
470 /* We saw SP get saved into
471 * r52 earlier (or now), which
472 * must have been in the
473 * prolog, so we now know that
474 * SP is still holding the
477 location
->sp_location
=
479 location
->sp_offset
= 0;
481 /* Someone must have saved
482 * aside the caller's SP value
483 * into r52, so r52 holds the
486 location
->sp_location
=
489 sp_determined
= true;
494 /* Track moveli arguments for -m32 mode. */
495 bt_update_moveli(&bundle
, moveli_args
);
499 if (bt_has_iret(&bundle
)) {
500 /* This is a terminating bundle. */
501 seen_terminating_bundle
= true;
506 * Try to determine caller's PC.
510 has_jrp
= bt_has_jrp(&bundle
, &jrp_reg
);
512 seen_terminating_bundle
= true;
514 if (location
->pc_location
== PC_LOC_UNKNOWN
) {
516 if (jrp_reg
== TREG_LR
&& !lr_modified
) {
517 /* Looks like a leaf function, or else
518 * lr is already restored. */
519 location
->pc_location
=
522 location
->pc_location
=
525 } else if (bt_has_sw_sp_lr(&bundle
)) {
526 /* In prolog, spilling initial lr to stack. */
527 location
->pc_location
= PC_LOC_IN_LR
;
528 } else if (bt_modifies_lr(&bundle
)) {
535 /* Initializes a backtracer to start from the given location.
537 * If the frame pointer cannot be determined it is set to -1.
539 * state: The state to be filled in.
540 * read_memory_func: A callback that reads memory.
541 * read_memory_func_extra: An arbitrary argument to read_memory_func.
542 * pc: The current PC.
543 * lr: The current value of the 'lr' register.
544 * sp: The current value of the 'sp' register.
545 * r52: The current value of the 'r52' register.
547 void backtrace_init(BacktraceIterator
*state
,
548 BacktraceMemoryReader read_memory_func
,
549 void *read_memory_func_extra
,
550 unsigned long pc
, unsigned long lr
,
551 unsigned long sp
, unsigned long r52
)
553 CallerLocation location
;
554 unsigned long fp
, initial_frame_caller_pc
;
556 /* Find out where we are in the initial frame. */
557 find_caller_pc_and_caller_sp(&location
, pc
,
558 read_memory_func
, read_memory_func_extra
);
560 switch (location
.sp_location
) {
571 fp
= sp
+ location
.sp_offset
;
580 /* If the frame pointer is not aligned to the basic word size
581 * something terrible happened and we should mark it as invalid.
583 if (fp
% sizeof(bt_int_reg_t
) != 0)
586 /* -1 means "don't know initial_frame_caller_pc". */
587 initial_frame_caller_pc
= -1;
589 switch (location
.pc_location
) {
596 if (lr
== 0 || lr
% TILE_BUNDLE_ALIGNMENT_IN_BYTES
!= 0) {
600 initial_frame_caller_pc
= lr
;
604 case PC_LOC_ON_STACK
:
605 /* Leave initial_frame_caller_pc as -1,
606 * meaning check the stack.
619 state
->initial_frame_caller_pc
= initial_frame_caller_pc
;
620 state
->read_memory_func
= read_memory_func
;
621 state
->read_memory_func_extra
= read_memory_func_extra
;
624 /* Handle the case where the register holds more bits than the VA. */
625 static bool valid_addr_reg(bt_int_reg_t reg
)
627 return ((unsigned long)reg
== reg
);
630 /* Advances the backtracing state to the calling frame, returning
631 * true iff successful.
633 bool backtrace_next(BacktraceIterator
*state
)
635 unsigned long next_fp
, next_pc
;
636 bt_int_reg_t next_frame
[2];
638 if (state
->fp
== -1) {
639 /* No parent frame. */
643 /* Try to read the frame linkage data chaining to the next function. */
644 if (!state
->read_memory_func(&next_frame
, state
->fp
, sizeof next_frame
,
645 state
->read_memory_func_extra
)) {
649 next_fp
= next_frame
[1];
650 if (!valid_addr_reg(next_frame
[1]) ||
651 next_fp
% sizeof(bt_int_reg_t
) != 0) {
652 /* Caller's frame pointer is suspect, so give up. */
656 if (state
->initial_frame_caller_pc
!= -1) {
657 /* We must be in the initial stack frame and already know the
660 next_pc
= state
->initial_frame_caller_pc
;
662 /* Force reading stack next time, in case we were in the
663 * initial frame. We don't do this above just to paranoidly
664 * avoid changing the struct at all when we return false.
666 state
->initial_frame_caller_pc
= -1;
668 /* Get the caller PC from the frame linkage area. */
669 next_pc
= next_frame
[0];
670 if (!valid_addr_reg(next_frame
[0]) || next_pc
== 0 ||
671 next_pc
% TILE_BUNDLE_ALIGNMENT_IN_BYTES
!= 0) {
672 /* The PC is suspect, so give up. */
677 /* Update state to become the caller's stack frame. */
679 state
->sp
= state
->fp
;