1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/dmar.h>
10 #include <asm/x2apic.h>
12 static DEFINE_PER_CPU(u32
, x86_cpu_to_logical_apicid
);
13 static DEFINE_PER_CPU(cpumask_var_t
, cpus_in_cluster
);
14 static DEFINE_PER_CPU(cpumask_var_t
, ipi_mask
);
16 static int x2apic_acpi_madt_oem_check(char *oem_id
, char *oem_table_id
)
18 return x2apic_enabled();
21 static inline u32
x2apic_cluster(int cpu
)
23 return per_cpu(x86_cpu_to_logical_apicid
, cpu
) >> 16;
27 __x2apic_send_IPI_mask(const struct cpumask
*mask
, int vector
, int apic_dest
)
29 struct cpumask
*cpus_in_cluster_ptr
;
30 struct cpumask
*ipi_mask_ptr
;
31 unsigned int cpu
, this_cpu
;
37 local_irq_save(flags
);
39 this_cpu
= smp_processor_id();
42 * We are to modify mask, so we need an own copy
43 * and be sure it's manipulated with irq off.
45 ipi_mask_ptr
= __raw_get_cpu_var(ipi_mask
);
46 cpumask_copy(ipi_mask_ptr
, mask
);
49 * The idea is to send one IPI per cluster.
51 for_each_cpu(cpu
, ipi_mask_ptr
) {
54 cpus_in_cluster_ptr
= per_cpu(cpus_in_cluster
, cpu
);
57 /* Collect cpus in cluster. */
58 for_each_cpu_and(i
, ipi_mask_ptr
, cpus_in_cluster_ptr
) {
59 if (apic_dest
== APIC_DEST_ALLINC
|| i
!= this_cpu
)
60 dest
|= per_cpu(x86_cpu_to_logical_apicid
, i
);
66 __x2apic_send_IPI_dest(dest
, vector
, apic
->dest_logical
);
68 * Cluster sibling cpus should be discared now so
69 * we would not send IPI them second time.
71 cpumask_andnot(ipi_mask_ptr
, ipi_mask_ptr
, cpus_in_cluster_ptr
);
74 local_irq_restore(flags
);
77 static void x2apic_send_IPI_mask(const struct cpumask
*mask
, int vector
)
79 __x2apic_send_IPI_mask(mask
, vector
, APIC_DEST_ALLINC
);
83 x2apic_send_IPI_mask_allbutself(const struct cpumask
*mask
, int vector
)
85 __x2apic_send_IPI_mask(mask
, vector
, APIC_DEST_ALLBUT
);
88 static void x2apic_send_IPI_allbutself(int vector
)
90 __x2apic_send_IPI_mask(cpu_online_mask
, vector
, APIC_DEST_ALLBUT
);
93 static void x2apic_send_IPI_all(int vector
)
95 __x2apic_send_IPI_mask(cpu_online_mask
, vector
, APIC_DEST_ALLINC
);
99 x2apic_cpu_mask_to_apicid_and(const struct cpumask
*cpumask
,
100 const struct cpumask
*andmask
,
101 unsigned int *apicid
)
107 for_each_cpu_and(i
, cpumask
, andmask
) {
108 if (!cpumask_test_cpu(i
, cpu_online_mask
))
110 dest
= per_cpu(x86_cpu_to_logical_apicid
, i
);
111 cluster
= x2apic_cluster(i
);
118 for_each_cpu_and(i
, cpumask
, andmask
) {
119 if (!cpumask_test_cpu(i
, cpu_online_mask
))
121 if (cluster
!= x2apic_cluster(i
))
123 dest
|= per_cpu(x86_cpu_to_logical_apicid
, i
);
131 static void init_x2apic_ldr(void)
133 unsigned int this_cpu
= smp_processor_id();
136 per_cpu(x86_cpu_to_logical_apicid
, this_cpu
) = apic_read(APIC_LDR
);
138 __cpu_set(this_cpu
, per_cpu(cpus_in_cluster
, this_cpu
));
139 for_each_online_cpu(cpu
) {
140 if (x2apic_cluster(this_cpu
) != x2apic_cluster(cpu
))
142 __cpu_set(this_cpu
, per_cpu(cpus_in_cluster
, cpu
));
143 __cpu_set(cpu
, per_cpu(cpus_in_cluster
, this_cpu
));
148 * At CPU state changes, update the x2apic cluster sibling info.
151 update_clusterinfo(struct notifier_block
*nfb
, unsigned long action
, void *hcpu
)
153 unsigned int this_cpu
= (unsigned long)hcpu
;
159 if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster
, this_cpu
),
162 } else if (!zalloc_cpumask_var(&per_cpu(ipi_mask
, this_cpu
),
164 free_cpumask_var(per_cpu(cpus_in_cluster
, this_cpu
));
168 case CPU_UP_CANCELED
:
169 case CPU_UP_CANCELED_FROZEN
:
171 for_each_online_cpu(cpu
) {
172 if (x2apic_cluster(this_cpu
) != x2apic_cluster(cpu
))
174 __cpu_clear(this_cpu
, per_cpu(cpus_in_cluster
, cpu
));
175 __cpu_clear(cpu
, per_cpu(cpus_in_cluster
, this_cpu
));
177 free_cpumask_var(per_cpu(cpus_in_cluster
, this_cpu
));
178 free_cpumask_var(per_cpu(ipi_mask
, this_cpu
));
182 return notifier_from_errno(err
);
185 static struct notifier_block __refdata x2apic_cpu_notifier
= {
186 .notifier_call
= update_clusterinfo
,
189 static int x2apic_init_cpu_notifier(void)
191 int cpu
= smp_processor_id();
193 zalloc_cpumask_var(&per_cpu(cpus_in_cluster
, cpu
), GFP_KERNEL
);
194 zalloc_cpumask_var(&per_cpu(ipi_mask
, cpu
), GFP_KERNEL
);
196 BUG_ON(!per_cpu(cpus_in_cluster
, cpu
) || !per_cpu(ipi_mask
, cpu
));
198 __cpu_set(cpu
, per_cpu(cpus_in_cluster
, cpu
));
199 register_hotcpu_notifier(&x2apic_cpu_notifier
);
203 static int x2apic_cluster_probe(void)
206 return x2apic_init_cpu_notifier();
211 static const struct cpumask
*x2apic_cluster_target_cpus(void)
217 * Each x2apic cluster is an allocation domain.
219 static void cluster_vector_allocation_domain(int cpu
, struct cpumask
*retmask
,
220 const struct cpumask
*mask
)
223 * To minimize vector pressure, default case of boot, device bringup
224 * etc will use a single cpu for the interrupt destination.
226 * On explicit migration requests coming from irqbalance etc,
227 * interrupts will be routed to the x2apic cluster (cluster-id
228 * derived from the first cpu in the mask) members specified
231 if (mask
== x2apic_cluster_target_cpus())
232 cpumask_copy(retmask
, cpumask_of(cpu
));
234 cpumask_and(retmask
, mask
, per_cpu(cpus_in_cluster
, cpu
));
237 static struct apic apic_x2apic_cluster
= {
239 .name
= "cluster x2apic",
240 .probe
= x2apic_cluster_probe
,
241 .acpi_madt_oem_check
= x2apic_acpi_madt_oem_check
,
242 .apic_id_valid
= x2apic_apic_id_valid
,
243 .apic_id_registered
= x2apic_apic_id_registered
,
245 .irq_delivery_mode
= dest_LowestPrio
,
246 .irq_dest_mode
= 1, /* logical */
248 .target_cpus
= x2apic_cluster_target_cpus
,
250 .dest_logical
= APIC_DEST_LOGICAL
,
251 .check_apicid_used
= NULL
,
252 .check_apicid_present
= NULL
,
254 .vector_allocation_domain
= cluster_vector_allocation_domain
,
255 .init_apic_ldr
= init_x2apic_ldr
,
257 .ioapic_phys_id_map
= NULL
,
258 .setup_apic_routing
= NULL
,
259 .multi_timer_check
= NULL
,
260 .cpu_present_to_apicid
= default_cpu_present_to_apicid
,
261 .apicid_to_cpu_present
= NULL
,
262 .setup_portio_remap
= NULL
,
263 .check_phys_apicid_present
= default_check_phys_apicid_present
,
264 .enable_apic_mode
= NULL
,
265 .phys_pkg_id
= x2apic_phys_pkg_id
,
266 .mps_oem_check
= NULL
,
268 .get_apic_id
= x2apic_get_apic_id
,
269 .set_apic_id
= x2apic_set_apic_id
,
270 .apic_id_mask
= 0xFFFFFFFFu
,
272 .cpu_mask_to_apicid_and
= x2apic_cpu_mask_to_apicid_and
,
274 .send_IPI_mask
= x2apic_send_IPI_mask
,
275 .send_IPI_mask_allbutself
= x2apic_send_IPI_mask_allbutself
,
276 .send_IPI_allbutself
= x2apic_send_IPI_allbutself
,
277 .send_IPI_all
= x2apic_send_IPI_all
,
278 .send_IPI_self
= x2apic_send_IPI_self
,
280 .trampoline_phys_low
= DEFAULT_TRAMPOLINE_PHYS_LOW
,
281 .trampoline_phys_high
= DEFAULT_TRAMPOLINE_PHYS_HIGH
,
282 .wait_for_init_deassert
= NULL
,
283 .smp_callin_clear_local_apic
= NULL
,
284 .inquire_remote_apic
= NULL
,
286 .read
= native_apic_msr_read
,
287 .write
= native_apic_msr_write
,
288 .eoi_write
= native_apic_msr_eoi_write
,
289 .icr_read
= native_x2apic_icr_read
,
290 .icr_write
= native_x2apic_icr_write
,
291 .wait_icr_idle
= native_x2apic_wait_icr_idle
,
292 .safe_wait_icr_idle
= native_safe_x2apic_wait_icr_idle
,
295 apic_driver(apic_x2apic_cluster
);