2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
39 unsigned force_split
: 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock
);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count
[PG_LEVEL_NUM
];
59 void update_page_count(int level
, unsigned long pages
)
61 /* Protect against CPA */
63 direct_pages_count
[level
] += pages
;
64 spin_unlock(&pgd_lock
);
67 static void split_page_count(int level
)
69 direct_pages_count
[level
]--;
70 direct_pages_count
[level
- 1] += PTRS_PER_PTE
;
73 void arch_report_meminfo(struct seq_file
*m
)
75 seq_printf(m
, "DirectMap4k: %8lu kB\n",
76 direct_pages_count
[PG_LEVEL_4K
] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m
, "DirectMap2M: %8lu kB\n",
79 direct_pages_count
[PG_LEVEL_2M
] << 11);
81 seq_printf(m
, "DirectMap4M: %8lu kB\n",
82 direct_pages_count
[PG_LEVEL_2M
] << 12);
86 seq_printf(m
, "DirectMap1G: %8lu kB\n",
87 direct_pages_count
[PG_LEVEL_1G
] << 20);
91 static inline void split_page_count(int level
) { }
96 static inline unsigned long highmap_start_pfn(void)
98 return __pa_symbol(_text
) >> PAGE_SHIFT
;
101 static inline unsigned long highmap_end_pfn(void)
103 return __pa_symbol(roundup(_brk_end
, PMD_SIZE
)) >> PAGE_SHIFT
;
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
111 # define debug_pagealloc 0
115 within(unsigned long addr
, unsigned long start
, unsigned long end
)
117 return addr
>= start
&& addr
< end
;
125 * clflush_cache_range - flush a cache range with clflush
126 * @vaddr: virtual start address
127 * @size: number of bytes to flush
129 * clflush is an unordered instruction which needs fencing with mfence
130 * to avoid ordering issues.
132 void clflush_cache_range(void *vaddr
, unsigned int size
)
134 void *vend
= vaddr
+ size
- 1;
138 for (; vaddr
< vend
; vaddr
+= boot_cpu_data
.x86_clflush_size
)
141 * Flush any possible final partial cacheline:
147 EXPORT_SYMBOL_GPL(clflush_cache_range
);
149 static void __cpa_flush_all(void *arg
)
151 unsigned long cache
= (unsigned long)arg
;
154 * Flush all to work around Errata in early athlons regarding
155 * large page flushing.
159 if (cache
&& boot_cpu_data
.x86
>= 4)
163 static void cpa_flush_all(unsigned long cache
)
165 BUG_ON(irqs_disabled());
167 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1);
170 static void __cpa_flush_range(void *arg
)
173 * We could optimize that further and do individual per page
174 * tlb invalidates for a low number of pages. Caveat: we must
175 * flush the high aliases on 64bit as well.
180 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
182 unsigned int i
, level
;
185 BUG_ON(irqs_disabled());
186 WARN_ON(PAGE_ALIGN(start
) != start
);
188 on_each_cpu(__cpa_flush_range
, NULL
, 1);
194 * We only need to flush on one CPU,
195 * clflush is a MESI-coherent instruction that
196 * will cause all other CPUs to flush the same
199 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
200 pte_t
*pte
= lookup_address(addr
, &level
);
203 * Only flush present addresses:
205 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
206 clflush_cache_range((void *) addr
, PAGE_SIZE
);
210 static void cpa_flush_array(unsigned long *start
, int numpages
, int cache
,
211 int in_flags
, struct page
**pages
)
213 unsigned int i
, level
;
214 unsigned long do_wbinvd
= cache
&& numpages
>= 1024; /* 4M threshold */
216 BUG_ON(irqs_disabled());
218 on_each_cpu(__cpa_flush_all
, (void *) do_wbinvd
, 1);
220 if (!cache
|| do_wbinvd
)
224 * We only need to flush on one CPU,
225 * clflush is a MESI-coherent instruction that
226 * will cause all other CPUs to flush the same
229 for (i
= 0; i
< numpages
; i
++) {
233 if (in_flags
& CPA_PAGES_ARRAY
)
234 addr
= (unsigned long)page_address(pages
[i
]);
238 pte
= lookup_address(addr
, &level
);
241 * Only flush present addresses:
243 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
244 clflush_cache_range((void *)addr
, PAGE_SIZE
);
249 * Certain areas of memory on x86 require very specific protection flags,
250 * for example the BIOS area or kernel text. Callers don't always get this
251 * right (again, ioremap() on BIOS memory is not uncommon) so this function
252 * checks and fixes these known static required protection bits.
254 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
,
257 pgprot_t forbidden
= __pgprot(0);
260 * The BIOS area between 640k and 1Mb needs to be executable for
261 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
263 #ifdef CONFIG_PCI_BIOS
264 if (pcibios_enabled
&& within(pfn
, BIOS_BEGIN
>> PAGE_SHIFT
, BIOS_END
>> PAGE_SHIFT
))
265 pgprot_val(forbidden
) |= _PAGE_NX
;
269 * The kernel text needs to be executable for obvious reasons
270 * Does not cover __inittext since that is gone later on. On
271 * 64bit we do not enforce !NX on the low mapping
273 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
274 pgprot_val(forbidden
) |= _PAGE_NX
;
277 * The .rodata section needs to be read-only. Using the pfn
278 * catches all aliases.
280 if (within(pfn
, __pa_symbol(__start_rodata
) >> PAGE_SHIFT
,
281 __pa_symbol(__end_rodata
) >> PAGE_SHIFT
))
282 pgprot_val(forbidden
) |= _PAGE_RW
;
284 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
286 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
287 * kernel text mappings for the large page aligned text, rodata sections
288 * will be always read-only. For the kernel identity mappings covering
289 * the holes caused by this alignment can be anything that user asks.
291 * This will preserve the large page mappings for kernel text/data
294 if (kernel_set_to_readonly
&&
295 within(address
, (unsigned long)_text
,
296 (unsigned long)__end_rodata_hpage_align
)) {
300 * Don't enforce the !RW mapping for the kernel text mapping,
301 * if the current mapping is already using small page mapping.
302 * No need to work hard to preserve large page mappings in this
305 * This also fixes the Linux Xen paravirt guest boot failure
306 * (because of unexpected read-only mappings for kernel identity
307 * mappings). In this paravirt guest case, the kernel text
308 * mapping and the kernel identity mapping share the same
309 * page-table pages. Thus we can't really use different
310 * protections for the kernel text and identity mappings. Also,
311 * these shared mappings are made of small page mappings.
312 * Thus this don't enforce !RW mapping for small page kernel
313 * text mapping logic will help Linux Xen parvirt guest boot
316 if (lookup_address(address
, &level
) && (level
!= PG_LEVEL_4K
))
317 pgprot_val(forbidden
) |= _PAGE_RW
;
321 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
326 static pte_t
*__lookup_address_in_pgd(pgd_t
*pgd
, unsigned long address
,
332 *level
= PG_LEVEL_NONE
;
337 pud
= pud_offset(pgd
, address
);
341 *level
= PG_LEVEL_1G
;
342 if (pud_large(*pud
) || !pud_present(*pud
))
345 pmd
= pmd_offset(pud
, address
);
349 *level
= PG_LEVEL_2M
;
350 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
353 *level
= PG_LEVEL_4K
;
355 return pte_offset_kernel(pmd
, address
);
359 * Lookup the page table entry for a virtual address. Return a pointer
360 * to the entry and the level of the mapping.
362 * Note: We return pud and pmd either when the entry is marked large
363 * or when the present bit is not set. Otherwise we would return a
364 * pointer to a nonexisting mapping.
366 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
368 return __lookup_address_in_pgd(pgd_offset_k(address
), address
, level
);
370 EXPORT_SYMBOL_GPL(lookup_address
);
372 static pte_t
*_lookup_address_cpa(struct cpa_data
*cpa
, unsigned long address
,
376 return __lookup_address_in_pgd(cpa
->pgd
+ pgd_index(address
),
379 return lookup_address(address
, level
);
383 * This is necessary because __pa() does not work on some
384 * kinds of memory, like vmalloc() or the alloc_remap()
385 * areas on 32-bit NUMA systems. The percpu areas can
386 * end up in this kind of memory, for instance.
388 * This could be optimized, but it is only intended to be
389 * used at inititalization time, and keeping it
390 * unoptimized should increase the testing coverage for
391 * the more obscure platforms.
393 phys_addr_t
slow_virt_to_phys(void *__virt_addr
)
395 unsigned long virt_addr
= (unsigned long)__virt_addr
;
396 phys_addr_t phys_addr
;
397 unsigned long offset
;
403 pte
= lookup_address(virt_addr
, &level
);
405 psize
= page_level_size(level
);
406 pmask
= page_level_mask(level
);
407 offset
= virt_addr
& ~pmask
;
408 phys_addr
= pte_pfn(*pte
) << PAGE_SHIFT
;
409 return (phys_addr
| offset
);
411 EXPORT_SYMBOL_GPL(slow_virt_to_phys
);
414 * Set the new pmd in all the pgds we know about:
416 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
419 set_pte_atomic(kpte
, pte
);
421 if (!SHARED_KERNEL_PMD
) {
424 list_for_each_entry(page
, &pgd_list
, lru
) {
429 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
430 pud
= pud_offset(pgd
, address
);
431 pmd
= pmd_offset(pud
, address
);
432 set_pte_atomic((pte_t
*)pmd
, pte
);
439 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
440 struct cpa_data
*cpa
)
442 unsigned long nextpage_addr
, numpages
, pmask
, psize
, addr
, pfn
;
443 pte_t new_pte
, old_pte
, *tmp
;
444 pgprot_t old_prot
, new_prot
, req_prot
;
448 if (cpa
->force_split
)
451 spin_lock(&pgd_lock
);
453 * Check for races, another CPU might have split this page
456 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
465 psize
= page_level_size(level
);
466 pmask
= page_level_mask(level
);
474 * Calculate the number of pages, which fit into this large
475 * page starting at address:
477 nextpage_addr
= (address
+ psize
) & pmask
;
478 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
479 if (numpages
< cpa
->numpages
)
480 cpa
->numpages
= numpages
;
483 * We are safe now. Check whether the new pgprot is the same:
486 old_prot
= req_prot
= pte_pgprot(old_pte
);
488 pgprot_val(req_prot
) &= ~pgprot_val(cpa
->mask_clr
);
489 pgprot_val(req_prot
) |= pgprot_val(cpa
->mask_set
);
492 * Set the PSE and GLOBAL flags only if the PRESENT flag is
493 * set otherwise pmd_present/pmd_huge will return true even on
494 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
495 * for the ancient hardware that doesn't support it.
497 if (pgprot_val(req_prot
) & _PAGE_PRESENT
)
498 pgprot_val(req_prot
) |= _PAGE_PSE
| _PAGE_GLOBAL
;
500 pgprot_val(req_prot
) &= ~(_PAGE_PSE
| _PAGE_GLOBAL
);
502 req_prot
= canon_pgprot(req_prot
);
505 * old_pte points to the large page base address. So we need
506 * to add the offset of the virtual address:
508 pfn
= pte_pfn(old_pte
) + ((address
& (psize
- 1)) >> PAGE_SHIFT
);
511 new_prot
= static_protections(req_prot
, address
, pfn
);
514 * We need to check the full range, whether
515 * static_protection() requires a different pgprot for one of
516 * the pages in the range we try to preserve:
518 addr
= address
& pmask
;
519 pfn
= pte_pfn(old_pte
);
520 for (i
= 0; i
< (psize
>> PAGE_SHIFT
); i
++, addr
+= PAGE_SIZE
, pfn
++) {
521 pgprot_t chk_prot
= static_protections(req_prot
, addr
, pfn
);
523 if (pgprot_val(chk_prot
) != pgprot_val(new_prot
))
528 * If there are no changes, return. maxpages has been updated
531 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
537 * We need to change the attributes. Check, whether we can
538 * change the large page in one go. We request a split, when
539 * the address is not aligned and the number of pages is
540 * smaller than the number of pages in the large page. Note
541 * that we limited the number of possible pages already to
542 * the number of pages in the large page.
544 if (address
== (address
& pmask
) && cpa
->numpages
== (psize
>> PAGE_SHIFT
)) {
546 * The address is aligned and the number of pages
547 * covers the full page.
549 new_pte
= pfn_pte(pte_pfn(old_pte
), new_prot
);
550 __set_pmd_pte(kpte
, address
, new_pte
);
551 cpa
->flags
|= CPA_FLUSHTLB
;
556 spin_unlock(&pgd_lock
);
562 __split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
, unsigned long address
,
565 pte_t
*pbase
= (pte_t
*)page_address(base
);
566 unsigned long pfn
, pfninc
= 1;
567 unsigned int i
, level
;
571 spin_lock(&pgd_lock
);
573 * Check for races, another CPU might have split this page
576 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
578 spin_unlock(&pgd_lock
);
582 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
583 ref_prot
= pte_pgprot(pte_clrhuge(*kpte
));
585 * If we ever want to utilize the PAT bit, we need to
586 * update this function to make sure it's converted from
587 * bit 12 to bit 7 when we cross from the 2MB level to
590 WARN_ON_ONCE(pgprot_val(ref_prot
) & _PAGE_PAT_LARGE
);
593 if (level
== PG_LEVEL_1G
) {
594 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
596 * Set the PSE flags only if the PRESENT flag is set
597 * otherwise pmd_present/pmd_huge will return true
598 * even on a non present pmd.
600 if (pgprot_val(ref_prot
) & _PAGE_PRESENT
)
601 pgprot_val(ref_prot
) |= _PAGE_PSE
;
603 pgprot_val(ref_prot
) &= ~_PAGE_PSE
;
608 * Set the GLOBAL flags only if the PRESENT flag is set
609 * otherwise pmd/pte_present will return true even on a non
610 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
611 * for the ancient hardware that doesn't support it.
613 if (pgprot_val(ref_prot
) & _PAGE_PRESENT
)
614 pgprot_val(ref_prot
) |= _PAGE_GLOBAL
;
616 pgprot_val(ref_prot
) &= ~_PAGE_GLOBAL
;
619 * Get the target pfn from the original entry:
621 pfn
= pte_pfn(*kpte
);
622 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
623 set_pte(&pbase
[i
], pfn_pte(pfn
, canon_pgprot(ref_prot
)));
625 if (pfn_range_is_mapped(PFN_DOWN(__pa(address
)),
626 PFN_DOWN(__pa(address
)) + 1))
627 split_page_count(level
);
630 * Install the new, split up pagetable.
632 * We use the standard kernel pagetable protections for the new
633 * pagetable protections, the actual ptes set above control the
634 * primary protection behavior:
636 __set_pmd_pte(kpte
, address
, mk_pte(base
, __pgprot(_KERNPG_TABLE
)));
639 * Intel Atom errata AAH41 workaround.
641 * The real fix should be in hw or in a microcode update, but
642 * we also probabilistically try to reduce the window of having
643 * a large TLB mixed with 4K TLBs while instruction fetches are
647 spin_unlock(&pgd_lock
);
652 static int split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
,
653 unsigned long address
)
657 if (!debug_pagealloc
)
658 spin_unlock(&cpa_lock
);
659 base
= alloc_pages(GFP_KERNEL
| __GFP_NOTRACK
, 0);
660 if (!debug_pagealloc
)
661 spin_lock(&cpa_lock
);
665 if (__split_large_page(cpa
, kpte
, address
, base
))
671 static bool try_to_free_pte_page(pte_t
*pte
)
675 for (i
= 0; i
< PTRS_PER_PTE
; i
++)
676 if (!pte_none(pte
[i
]))
679 free_page((unsigned long)pte
);
683 static bool try_to_free_pmd_page(pmd_t
*pmd
)
687 for (i
= 0; i
< PTRS_PER_PMD
; i
++)
688 if (!pmd_none(pmd
[i
]))
691 free_page((unsigned long)pmd
);
695 static bool unmap_pte_range(pmd_t
*pmd
, unsigned long start
, unsigned long end
)
697 pte_t
*pte
= pte_offset_kernel(pmd
, start
);
699 while (start
< end
) {
700 set_pte(pte
, __pte(0));
706 if (try_to_free_pte_page((pte_t
*)pmd_page_vaddr(*pmd
))) {
713 static void __unmap_pmd_range(pud_t
*pud
, pmd_t
*pmd
,
714 unsigned long start
, unsigned long end
)
716 if (unmap_pte_range(pmd
, start
, end
))
717 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
721 static void unmap_pmd_range(pud_t
*pud
, unsigned long start
, unsigned long end
)
723 pmd_t
*pmd
= pmd_offset(pud
, start
);
726 * Not on a 2MB page boundary?
728 if (start
& (PMD_SIZE
- 1)) {
729 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
730 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
732 __unmap_pmd_range(pud
, pmd
, start
, pre_end
);
739 * Try to unmap in 2M chunks.
741 while (end
- start
>= PMD_SIZE
) {
745 __unmap_pmd_range(pud
, pmd
, start
, start
+ PMD_SIZE
);
755 return __unmap_pmd_range(pud
, pmd
, start
, end
);
758 * Try again to free the PMD page if haven't succeeded above.
761 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
765 static void unmap_pud_range(pgd_t
*pgd
, unsigned long start
, unsigned long end
)
767 pud_t
*pud
= pud_offset(pgd
, start
);
770 * Not on a GB page boundary?
772 if (start
& (PUD_SIZE
- 1)) {
773 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
774 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
776 unmap_pmd_range(pud
, start
, pre_end
);
783 * Try to unmap in 1G chunks?
785 while (end
- start
>= PUD_SIZE
) {
790 unmap_pmd_range(pud
, start
, start
+ PUD_SIZE
);
800 unmap_pmd_range(pud
, start
, end
);
803 * No need to try to free the PUD page because we'll free it in
804 * populate_pgd's error path
808 static int alloc_pte_page(pmd_t
*pmd
)
810 pte_t
*pte
= (pte_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
814 set_pmd(pmd
, __pmd(__pa(pte
) | _KERNPG_TABLE
));
818 static int alloc_pmd_page(pud_t
*pud
)
820 pmd_t
*pmd
= (pmd_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
824 set_pud(pud
, __pud(__pa(pmd
) | _KERNPG_TABLE
));
828 static void populate_pte(struct cpa_data
*cpa
,
829 unsigned long start
, unsigned long end
,
830 unsigned num_pages
, pmd_t
*pmd
, pgprot_t pgprot
)
834 pte
= pte_offset_kernel(pmd
, start
);
836 while (num_pages
-- && start
< end
) {
838 /* deal with the NX bit */
839 if (!(pgprot_val(pgprot
) & _PAGE_NX
))
840 cpa
->pfn
&= ~_PAGE_NX
;
842 set_pte(pte
, pfn_pte(cpa
->pfn
>> PAGE_SHIFT
, pgprot
));
845 cpa
->pfn
+= PAGE_SIZE
;
850 static int populate_pmd(struct cpa_data
*cpa
,
851 unsigned long start
, unsigned long end
,
852 unsigned num_pages
, pud_t
*pud
, pgprot_t pgprot
)
854 unsigned int cur_pages
= 0;
858 * Not on a 2M boundary?
860 if (start
& (PMD_SIZE
- 1)) {
861 unsigned long pre_end
= start
+ (num_pages
<< PAGE_SHIFT
);
862 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
864 pre_end
= min_t(unsigned long, pre_end
, next_page
);
865 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
866 cur_pages
= min_t(unsigned int, num_pages
, cur_pages
);
871 pmd
= pmd_offset(pud
, start
);
873 if (alloc_pte_page(pmd
))
876 populate_pte(cpa
, start
, pre_end
, cur_pages
, pmd
, pgprot
);
882 * We mapped them all?
884 if (num_pages
== cur_pages
)
887 while (end
- start
>= PMD_SIZE
) {
890 * We cannot use a 1G page so allocate a PMD page if needed.
893 if (alloc_pmd_page(pud
))
896 pmd
= pmd_offset(pud
, start
);
898 set_pmd(pmd
, __pmd(cpa
->pfn
| _PAGE_PSE
| massage_pgprot(pgprot
)));
901 cpa
->pfn
+= PMD_SIZE
;
902 cur_pages
+= PMD_SIZE
>> PAGE_SHIFT
;
906 * Map trailing 4K pages.
909 pmd
= pmd_offset(pud
, start
);
911 if (alloc_pte_page(pmd
))
914 populate_pte(cpa
, start
, end
, num_pages
- cur_pages
,
920 static int populate_pud(struct cpa_data
*cpa
, unsigned long start
, pgd_t
*pgd
,
927 end
= start
+ (cpa
->numpages
<< PAGE_SHIFT
);
930 * Not on a Gb page boundary? => map everything up to it with
933 if (start
& (PUD_SIZE
- 1)) {
934 unsigned long pre_end
;
935 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
937 pre_end
= min_t(unsigned long, end
, next_page
);
938 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
939 cur_pages
= min_t(int, (int)cpa
->numpages
, cur_pages
);
941 pud
= pud_offset(pgd
, start
);
947 if (alloc_pmd_page(pud
))
950 cur_pages
= populate_pmd(cpa
, start
, pre_end
, cur_pages
,
958 /* We mapped them all? */
959 if (cpa
->numpages
== cur_pages
)
962 pud
= pud_offset(pgd
, start
);
965 * Map everything starting from the Gb boundary, possibly with 1G pages
967 while (end
- start
>= PUD_SIZE
) {
968 set_pud(pud
, __pud(cpa
->pfn
| _PAGE_PSE
| massage_pgprot(pgprot
)));
971 cpa
->pfn
+= PUD_SIZE
;
972 cur_pages
+= PUD_SIZE
>> PAGE_SHIFT
;
976 /* Map trailing leftover */
980 pud
= pud_offset(pgd
, start
);
982 if (alloc_pmd_page(pud
))
985 tmp
= populate_pmd(cpa
, start
, end
, cpa
->numpages
- cur_pages
,
996 * Restrictions for kernel page table do not necessarily apply when mapping in
999 static int populate_pgd(struct cpa_data
*cpa
, unsigned long addr
)
1001 pgprot_t pgprot
= __pgprot(_KERNPG_TABLE
);
1002 bool allocd_pgd
= false;
1004 pud_t
*pud
= NULL
; /* shut up gcc */
1007 pgd_entry
= cpa
->pgd
+ pgd_index(addr
);
1010 * Allocate a PUD page and hand it down for mapping.
1012 if (pgd_none(*pgd_entry
)) {
1013 pud
= (pud_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
1017 set_pgd(pgd_entry
, __pgd(__pa(pud
) | _KERNPG_TABLE
));
1021 pgprot_val(pgprot
) &= ~pgprot_val(cpa
->mask_clr
);
1022 pgprot_val(pgprot
) |= pgprot_val(cpa
->mask_set
);
1024 ret
= populate_pud(cpa
, addr
, pgd_entry
, pgprot
);
1026 unmap_pud_range(pgd_entry
, addr
,
1027 addr
+ (cpa
->numpages
<< PAGE_SHIFT
));
1031 * If I allocated this PUD page, I can just as well
1032 * free it in this error path.
1034 pgd_clear(pgd_entry
);
1035 free_page((unsigned long)pud
);
1039 cpa
->numpages
= ret
;
1043 static int __cpa_process_fault(struct cpa_data
*cpa
, unsigned long vaddr
,
1047 return populate_pgd(cpa
, vaddr
);
1050 * Ignore all non primary paths.
1056 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1058 * Also set numpages to '1' indicating that we processed cpa req for
1059 * one virtual address page and its pfn. TBD: numpages can be set based
1060 * on the initial value and the level returned by lookup_address().
1062 if (within(vaddr
, PAGE_OFFSET
,
1063 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))) {
1065 cpa
->pfn
= __pa(vaddr
) >> PAGE_SHIFT
;
1068 WARN(1, KERN_WARNING
"CPA: called for zero pte. "
1069 "vaddr = %lx cpa->vaddr = %lx\n", vaddr
,
1076 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
1078 unsigned long address
;
1081 pte_t
*kpte
, old_pte
;
1083 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1084 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1085 if (unlikely(PageHighMem(page
)))
1087 address
= (unsigned long)page_address(page
);
1088 } else if (cpa
->flags
& CPA_ARRAY
)
1089 address
= cpa
->vaddr
[cpa
->curpage
];
1091 address
= *cpa
->vaddr
;
1093 kpte
= _lookup_address_cpa(cpa
, address
, &level
);
1095 return __cpa_process_fault(cpa
, address
, primary
);
1098 if (!pte_val(old_pte
))
1099 return __cpa_process_fault(cpa
, address
, primary
);
1101 if (level
== PG_LEVEL_4K
) {
1103 pgprot_t new_prot
= pte_pgprot(old_pte
);
1104 unsigned long pfn
= pte_pfn(old_pte
);
1106 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
1107 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
1109 new_prot
= static_protections(new_prot
, address
, pfn
);
1112 * Set the GLOBAL flags only if the PRESENT flag is
1113 * set otherwise pte_present will return true even on
1114 * a non present pte. The canon_pgprot will clear
1115 * _PAGE_GLOBAL for the ancient hardware that doesn't
1118 if (pgprot_val(new_prot
) & _PAGE_PRESENT
)
1119 pgprot_val(new_prot
) |= _PAGE_GLOBAL
;
1121 pgprot_val(new_prot
) &= ~_PAGE_GLOBAL
;
1124 * We need to keep the pfn from the existing PTE,
1125 * after all we're only going to change it's attributes
1126 * not the memory it points to
1128 new_pte
= pfn_pte(pfn
, canon_pgprot(new_prot
));
1131 * Do we really change anything ?
1133 if (pte_val(old_pte
) != pte_val(new_pte
)) {
1134 set_pte_atomic(kpte
, new_pte
);
1135 cpa
->flags
|= CPA_FLUSHTLB
;
1142 * Check, whether we can keep the large page intact
1143 * and just change the pte:
1145 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
1147 * When the range fits into the existing large page,
1148 * return. cp->numpages and cpa->tlbflush have been updated in
1155 * We have to split the large page:
1157 err
= split_large_page(cpa
, kpte
, address
);
1160 * Do a global flush tlb after splitting the large page
1161 * and before we do the actual change page attribute in the PTE.
1163 * With out this, we violate the TLB application note, that says
1164 * "The TLBs may contain both ordinary and large-page
1165 * translations for a 4-KByte range of linear addresses. This
1166 * may occur if software modifies the paging structures so that
1167 * the page size used for the address range changes. If the two
1168 * translations differ with respect to page frame or attributes
1169 * (e.g., permissions), processor behavior is undefined and may
1170 * be implementation-specific."
1172 * We do this global tlb flush inside the cpa_lock, so that we
1173 * don't allow any other cpu, with stale tlb entries change the
1174 * page attribute in parallel, that also falls into the
1175 * just split large page entry.
1184 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
1186 static int cpa_process_alias(struct cpa_data
*cpa
)
1188 struct cpa_data alias_cpa
;
1189 unsigned long laddr
= (unsigned long)__va(cpa
->pfn
<< PAGE_SHIFT
);
1190 unsigned long vaddr
;
1193 if (!pfn_range_is_mapped(cpa
->pfn
, cpa
->pfn
+ 1))
1197 * No need to redo, when the primary call touched the direct
1200 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1201 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1202 if (unlikely(PageHighMem(page
)))
1204 vaddr
= (unsigned long)page_address(page
);
1205 } else if (cpa
->flags
& CPA_ARRAY
)
1206 vaddr
= cpa
->vaddr
[cpa
->curpage
];
1208 vaddr
= *cpa
->vaddr
;
1210 if (!(within(vaddr
, PAGE_OFFSET
,
1211 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
)))) {
1214 alias_cpa
.vaddr
= &laddr
;
1215 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1217 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
1222 #ifdef CONFIG_X86_64
1224 * If the primary call didn't touch the high mapping already
1225 * and the physical address is inside the kernel map, we need
1226 * to touch the high mapped kernel as well:
1228 if (!within(vaddr
, (unsigned long)_text
, _brk_end
) &&
1229 within(cpa
->pfn
, highmap_start_pfn(), highmap_end_pfn())) {
1230 unsigned long temp_cpa_vaddr
= (cpa
->pfn
<< PAGE_SHIFT
) +
1231 __START_KERNEL_map
- phys_base
;
1233 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
1234 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1237 * The high mapping range is imprecise, so ignore the
1240 __change_page_attr_set_clr(&alias_cpa
, 0);
1247 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
1249 int ret
, numpages
= cpa
->numpages
;
1253 * Store the remaining nr of pages for the large page
1254 * preservation check.
1256 cpa
->numpages
= numpages
;
1257 /* for array changes, we can't use large page */
1258 if (cpa
->flags
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1261 if (!debug_pagealloc
)
1262 spin_lock(&cpa_lock
);
1263 ret
= __change_page_attr(cpa
, checkalias
);
1264 if (!debug_pagealloc
)
1265 spin_unlock(&cpa_lock
);
1270 ret
= cpa_process_alias(cpa
);
1276 * Adjust the number of pages with the result of the
1277 * CPA operation. Either a large page has been
1278 * preserved or a single page update happened.
1280 BUG_ON(cpa
->numpages
> numpages
);
1281 numpages
-= cpa
->numpages
;
1282 if (cpa
->flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
))
1285 *cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
1291 static inline int cache_attr(pgprot_t attr
)
1293 return pgprot_val(attr
) &
1294 (_PAGE_PAT
| _PAGE_PAT_LARGE
| _PAGE_PWT
| _PAGE_PCD
);
1297 static int change_page_attr_set_clr(unsigned long *addr
, int numpages
,
1298 pgprot_t mask_set
, pgprot_t mask_clr
,
1299 int force_split
, int in_flag
,
1300 struct page
**pages
)
1302 struct cpa_data cpa
;
1303 int ret
, cache
, checkalias
;
1304 unsigned long baddr
= 0;
1306 memset(&cpa
, 0, sizeof(cpa
));
1309 * Check, if we are requested to change a not supported
1312 mask_set
= canon_pgprot(mask_set
);
1313 mask_clr
= canon_pgprot(mask_clr
);
1314 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
1317 /* Ensure we are PAGE_SIZE aligned */
1318 if (in_flag
& CPA_ARRAY
) {
1320 for (i
= 0; i
< numpages
; i
++) {
1321 if (addr
[i
] & ~PAGE_MASK
) {
1322 addr
[i
] &= PAGE_MASK
;
1326 } else if (!(in_flag
& CPA_PAGES_ARRAY
)) {
1328 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1329 * No need to cehck in that case
1331 if (*addr
& ~PAGE_MASK
) {
1334 * People should not be passing in unaligned addresses:
1339 * Save address for cache flush. *addr is modified in the call
1340 * to __change_page_attr_set_clr() below.
1345 /* Must avoid aliasing mappings in the highmem code */
1346 kmap_flush_unused();
1352 cpa
.numpages
= numpages
;
1353 cpa
.mask_set
= mask_set
;
1354 cpa
.mask_clr
= mask_clr
;
1357 cpa
.force_split
= force_split
;
1359 if (in_flag
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1360 cpa
.flags
|= in_flag
;
1362 /* No alias checking for _NX bit modifications */
1363 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
1365 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
1368 * Check whether we really changed something:
1370 if (!(cpa
.flags
& CPA_FLUSHTLB
))
1374 * No need to flush, when we did not set any of the caching
1377 cache
= cache_attr(mask_set
);
1380 * On success we use clflush, when the CPU supports it to
1381 * avoid the wbindv. If the CPU does not support it and in the
1382 * error case we fall back to cpa_flush_all (which uses
1385 if (!ret
&& cpu_has_clflush
) {
1386 if (cpa
.flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
)) {
1387 cpa_flush_array(addr
, numpages
, cache
,
1390 cpa_flush_range(baddr
, numpages
, cache
);
1392 cpa_flush_all(cache
);
1398 static inline int change_page_attr_set(unsigned long *addr
, int numpages
,
1399 pgprot_t mask
, int array
)
1401 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0,
1402 (array
? CPA_ARRAY
: 0), NULL
);
1405 static inline int change_page_attr_clear(unsigned long *addr
, int numpages
,
1406 pgprot_t mask
, int array
)
1408 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0,
1409 (array
? CPA_ARRAY
: 0), NULL
);
1412 static inline int cpa_set_pages_array(struct page
**pages
, int numpages
,
1415 return change_page_attr_set_clr(NULL
, numpages
, mask
, __pgprot(0), 0,
1416 CPA_PAGES_ARRAY
, pages
);
1419 static inline int cpa_clear_pages_array(struct page
**pages
, int numpages
,
1422 return change_page_attr_set_clr(NULL
, numpages
, __pgprot(0), mask
, 0,
1423 CPA_PAGES_ARRAY
, pages
);
1426 int _set_memory_uc(unsigned long addr
, int numpages
)
1429 * for now UC MINUS. see comments in ioremap_nocache()
1431 return change_page_attr_set(&addr
, numpages
,
1432 __pgprot(_PAGE_CACHE_UC_MINUS
), 0);
1435 int set_memory_uc(unsigned long addr
, int numpages
)
1440 * for now UC MINUS. see comments in ioremap_nocache()
1442 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1443 _PAGE_CACHE_UC_MINUS
, NULL
);
1447 ret
= _set_memory_uc(addr
, numpages
);
1454 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1458 EXPORT_SYMBOL(set_memory_uc
);
1460 static int _set_memory_array(unsigned long *addr
, int addrinarray
,
1461 unsigned long new_type
)
1467 * for now UC MINUS. see comments in ioremap_nocache()
1469 for (i
= 0; i
< addrinarray
; i
++) {
1470 ret
= reserve_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
,
1476 ret
= change_page_attr_set(addr
, addrinarray
,
1477 __pgprot(_PAGE_CACHE_UC_MINUS
), 1);
1479 if (!ret
&& new_type
== _PAGE_CACHE_WC
)
1480 ret
= change_page_attr_set_clr(addr
, addrinarray
,
1481 __pgprot(_PAGE_CACHE_WC
),
1482 __pgprot(_PAGE_CACHE_MASK
),
1483 0, CPA_ARRAY
, NULL
);
1490 for (j
= 0; j
< i
; j
++)
1491 free_memtype(__pa(addr
[j
]), __pa(addr
[j
]) + PAGE_SIZE
);
1496 int set_memory_array_uc(unsigned long *addr
, int addrinarray
)
1498 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_UC_MINUS
);
1500 EXPORT_SYMBOL(set_memory_array_uc
);
1502 int set_memory_array_wc(unsigned long *addr
, int addrinarray
)
1504 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_WC
);
1506 EXPORT_SYMBOL(set_memory_array_wc
);
1508 int _set_memory_wc(unsigned long addr
, int numpages
)
1511 unsigned long addr_copy
= addr
;
1513 ret
= change_page_attr_set(&addr
, numpages
,
1514 __pgprot(_PAGE_CACHE_UC_MINUS
), 0);
1516 ret
= change_page_attr_set_clr(&addr_copy
, numpages
,
1517 __pgprot(_PAGE_CACHE_WC
),
1518 __pgprot(_PAGE_CACHE_MASK
),
1524 int set_memory_wc(unsigned long addr
, int numpages
)
1529 return set_memory_uc(addr
, numpages
);
1531 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1532 _PAGE_CACHE_WC
, NULL
);
1536 ret
= _set_memory_wc(addr
, numpages
);
1543 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1547 EXPORT_SYMBOL(set_memory_wc
);
1549 int _set_memory_wb(unsigned long addr
, int numpages
)
1551 return change_page_attr_clear(&addr
, numpages
,
1552 __pgprot(_PAGE_CACHE_MASK
), 0);
1555 int set_memory_wb(unsigned long addr
, int numpages
)
1559 ret
= _set_memory_wb(addr
, numpages
);
1563 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1566 EXPORT_SYMBOL(set_memory_wb
);
1568 int set_memory_array_wb(unsigned long *addr
, int addrinarray
)
1573 ret
= change_page_attr_clear(addr
, addrinarray
,
1574 __pgprot(_PAGE_CACHE_MASK
), 1);
1578 for (i
= 0; i
< addrinarray
; i
++)
1579 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
1583 EXPORT_SYMBOL(set_memory_array_wb
);
1585 int set_memory_x(unsigned long addr
, int numpages
)
1587 if (!(__supported_pte_mask
& _PAGE_NX
))
1590 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1592 EXPORT_SYMBOL(set_memory_x
);
1594 int set_memory_nx(unsigned long addr
, int numpages
)
1596 if (!(__supported_pte_mask
& _PAGE_NX
))
1599 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1601 EXPORT_SYMBOL(set_memory_nx
);
1603 int set_memory_ro(unsigned long addr
, int numpages
)
1605 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1607 EXPORT_SYMBOL_GPL(set_memory_ro
);
1609 int set_memory_rw(unsigned long addr
, int numpages
)
1611 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1613 EXPORT_SYMBOL_GPL(set_memory_rw
);
1615 int set_memory_np(unsigned long addr
, int numpages
)
1617 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_PRESENT
), 0);
1620 int set_memory_4k(unsigned long addr
, int numpages
)
1622 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
1623 __pgprot(0), 1, 0, NULL
);
1626 int set_pages_uc(struct page
*page
, int numpages
)
1628 unsigned long addr
= (unsigned long)page_address(page
);
1630 return set_memory_uc(addr
, numpages
);
1632 EXPORT_SYMBOL(set_pages_uc
);
1634 static int _set_pages_array(struct page
**pages
, int addrinarray
,
1635 unsigned long new_type
)
1637 unsigned long start
;
1643 for (i
= 0; i
< addrinarray
; i
++) {
1644 if (PageHighMem(pages
[i
]))
1646 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1647 end
= start
+ PAGE_SIZE
;
1648 if (reserve_memtype(start
, end
, new_type
, NULL
))
1652 ret
= cpa_set_pages_array(pages
, addrinarray
,
1653 __pgprot(_PAGE_CACHE_UC_MINUS
));
1654 if (!ret
&& new_type
== _PAGE_CACHE_WC
)
1655 ret
= change_page_attr_set_clr(NULL
, addrinarray
,
1656 __pgprot(_PAGE_CACHE_WC
),
1657 __pgprot(_PAGE_CACHE_MASK
),
1658 0, CPA_PAGES_ARRAY
, pages
);
1661 return 0; /* Success */
1664 for (i
= 0; i
< free_idx
; i
++) {
1665 if (PageHighMem(pages
[i
]))
1667 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1668 end
= start
+ PAGE_SIZE
;
1669 free_memtype(start
, end
);
1674 int set_pages_array_uc(struct page
**pages
, int addrinarray
)
1676 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_UC_MINUS
);
1678 EXPORT_SYMBOL(set_pages_array_uc
);
1680 int set_pages_array_wc(struct page
**pages
, int addrinarray
)
1682 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_WC
);
1684 EXPORT_SYMBOL(set_pages_array_wc
);
1686 int set_pages_wb(struct page
*page
, int numpages
)
1688 unsigned long addr
= (unsigned long)page_address(page
);
1690 return set_memory_wb(addr
, numpages
);
1692 EXPORT_SYMBOL(set_pages_wb
);
1694 int set_pages_array_wb(struct page
**pages
, int addrinarray
)
1697 unsigned long start
;
1701 retval
= cpa_clear_pages_array(pages
, addrinarray
,
1702 __pgprot(_PAGE_CACHE_MASK
));
1706 for (i
= 0; i
< addrinarray
; i
++) {
1707 if (PageHighMem(pages
[i
]))
1709 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1710 end
= start
+ PAGE_SIZE
;
1711 free_memtype(start
, end
);
1716 EXPORT_SYMBOL(set_pages_array_wb
);
1718 int set_pages_x(struct page
*page
, int numpages
)
1720 unsigned long addr
= (unsigned long)page_address(page
);
1722 return set_memory_x(addr
, numpages
);
1724 EXPORT_SYMBOL(set_pages_x
);
1726 int set_pages_nx(struct page
*page
, int numpages
)
1728 unsigned long addr
= (unsigned long)page_address(page
);
1730 return set_memory_nx(addr
, numpages
);
1732 EXPORT_SYMBOL(set_pages_nx
);
1734 int set_pages_ro(struct page
*page
, int numpages
)
1736 unsigned long addr
= (unsigned long)page_address(page
);
1738 return set_memory_ro(addr
, numpages
);
1741 int set_pages_rw(struct page
*page
, int numpages
)
1743 unsigned long addr
= (unsigned long)page_address(page
);
1745 return set_memory_rw(addr
, numpages
);
1748 #ifdef CONFIG_DEBUG_PAGEALLOC
1750 static int __set_pages_p(struct page
*page
, int numpages
)
1752 unsigned long tempaddr
= (unsigned long) page_address(page
);
1753 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1755 .numpages
= numpages
,
1756 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1757 .mask_clr
= __pgprot(0),
1761 * No alias checking needed for setting present flag. otherwise,
1762 * we may need to break large pages for 64-bit kernel text
1763 * mappings (this adds to complexity if we want to do this from
1764 * atomic context especially). Let's keep it simple!
1766 return __change_page_attr_set_clr(&cpa
, 0);
1769 static int __set_pages_np(struct page
*page
, int numpages
)
1771 unsigned long tempaddr
= (unsigned long) page_address(page
);
1772 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1774 .numpages
= numpages
,
1775 .mask_set
= __pgprot(0),
1776 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1780 * No alias checking needed for setting not present flag. otherwise,
1781 * we may need to break large pages for 64-bit kernel text
1782 * mappings (this adds to complexity if we want to do this from
1783 * atomic context especially). Let's keep it simple!
1785 return __change_page_attr_set_clr(&cpa
, 0);
1788 void kernel_map_pages(struct page
*page
, int numpages
, int enable
)
1790 if (PageHighMem(page
))
1793 debug_check_no_locks_freed(page_address(page
),
1794 numpages
* PAGE_SIZE
);
1798 * The return value is ignored as the calls cannot fail.
1799 * Large pages for identity mappings are not used at boot time
1800 * and hence no memory allocations during large page split.
1803 __set_pages_p(page
, numpages
);
1805 __set_pages_np(page
, numpages
);
1808 * We should perform an IPI and flush all tlbs,
1809 * but that can deadlock->flush only current cpu:
1813 arch_flush_lazy_mmu_mode();
1816 #ifdef CONFIG_HIBERNATION
1818 bool kernel_page_present(struct page
*page
)
1823 if (PageHighMem(page
))
1826 pte
= lookup_address((unsigned long)page_address(page
), &level
);
1827 return (pte_val(*pte
) & _PAGE_PRESENT
);
1830 #endif /* CONFIG_HIBERNATION */
1832 #endif /* CONFIG_DEBUG_PAGEALLOC */
1834 int kernel_map_pages_in_pgd(pgd_t
*pgd
, u64 pfn
, unsigned long address
,
1835 unsigned numpages
, unsigned long page_flags
)
1837 int retval
= -EINVAL
;
1839 struct cpa_data cpa
= {
1843 .numpages
= numpages
,
1844 .mask_set
= __pgprot(0),
1845 .mask_clr
= __pgprot(0),
1849 if (!(__supported_pte_mask
& _PAGE_NX
))
1852 if (!(page_flags
& _PAGE_NX
))
1853 cpa
.mask_clr
= __pgprot(_PAGE_NX
);
1855 cpa
.mask_set
= __pgprot(_PAGE_PRESENT
| page_flags
);
1857 retval
= __change_page_attr_set_clr(&cpa
, 0);
1865 * The testcases use internal knowledge of the implementation that shouldn't
1866 * be exposed to the rest of the kernel. Include these directly here.
1868 #ifdef CONFIG_CPA_DEBUG
1869 #include "pageattr-test.c"