2 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
11 #include <linux/clk-provider.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk/at91_pmc.h>
15 #include <linux/of_address.h>
16 #include <linux/of_irq.h>
18 #include <linux/wait.h>
19 #include <linux/sched.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
25 #define PROG_SOURCE_MAX 5
28 #define PROG_STATUS_MASK(id) (1 << ((id) + 8))
29 #define PROG_PRES_MASK 0x7
30 #define PROG_MAX_RM9200_CSS 3
32 struct clk_programmable_layout
{
38 struct clk_programmable
{
42 wait_queue_head_t wait
;
47 const struct clk_programmable_layout
*layout
;
50 #define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
53 static irqreturn_t
clk_programmable_irq_handler(int irq
, void *dev_id
)
55 struct clk_programmable
*prog
= (struct clk_programmable
*)dev_id
;
62 static int clk_programmable_prepare(struct clk_hw
*hw
)
65 struct clk_programmable
*prog
= to_clk_programmable(hw
);
66 struct at91_pmc
*pmc
= prog
->pmc
;
67 const struct clk_programmable_layout
*layout
= prog
->layout
;
69 u32 mask
= PROG_STATUS_MASK(id
);
71 tmp
= prog
->css
| (prog
->pres
<< layout
->pres_shift
);
72 if (layout
->have_slck_mck
&& prog
->slckmck
)
73 tmp
|= AT91_PMC_CSSMCK_MCK
;
75 pmc_write(pmc
, AT91_PMC_PCKR(id
), tmp
);
77 while (!(pmc_read(pmc
, AT91_PMC_SR
) & mask
))
78 wait_event(prog
->wait
, pmc_read(pmc
, AT91_PMC_SR
) & mask
);
83 static int clk_programmable_is_ready(struct clk_hw
*hw
)
85 struct clk_programmable
*prog
= to_clk_programmable(hw
);
86 struct at91_pmc
*pmc
= prog
->pmc
;
88 return !!(pmc_read(pmc
, AT91_PMC_SR
) & AT91_PMC_PCKR(prog
->id
));
91 static unsigned long clk_programmable_recalc_rate(struct clk_hw
*hw
,
92 unsigned long parent_rate
)
95 struct clk_programmable
*prog
= to_clk_programmable(hw
);
96 struct at91_pmc
*pmc
= prog
->pmc
;
97 const struct clk_programmable_layout
*layout
= prog
->layout
;
99 tmp
= pmc_read(pmc
, AT91_PMC_PCKR(prog
->id
));
100 prog
->pres
= (tmp
>> layout
->pres_shift
) & PROG_PRES_MASK
;
102 return parent_rate
>> prog
->pres
;
105 static long clk_programmable_round_rate(struct clk_hw
*hw
, unsigned long rate
,
106 unsigned long *parent_rate
)
108 unsigned long best_rate
= *parent_rate
;
109 unsigned long best_diff
;
110 unsigned long new_diff
;
111 unsigned long cur_rate
;
114 if (rate
> *parent_rate
)
117 best_diff
= *parent_rate
- rate
;
122 for (shift
= 1; shift
< PROG_PRES_MASK
; shift
++) {
123 cur_rate
= *parent_rate
>> shift
;
126 new_diff
= cur_rate
- rate
;
128 new_diff
= rate
- cur_rate
;
133 if (new_diff
< best_diff
) {
134 best_diff
= new_diff
;
135 best_rate
= cur_rate
;
145 static int clk_programmable_set_parent(struct clk_hw
*hw
, u8 index
)
147 struct clk_programmable
*prog
= to_clk_programmable(hw
);
148 const struct clk_programmable_layout
*layout
= prog
->layout
;
149 if (index
> layout
->css_mask
) {
150 if (index
> PROG_MAX_RM9200_CSS
&& layout
->have_slck_mck
) {
163 static u8
clk_programmable_get_parent(struct clk_hw
*hw
)
167 struct clk_programmable
*prog
= to_clk_programmable(hw
);
168 struct at91_pmc
*pmc
= prog
->pmc
;
169 const struct clk_programmable_layout
*layout
= prog
->layout
;
171 tmp
= pmc_read(pmc
, AT91_PMC_PCKR(prog
->id
));
172 prog
->css
= tmp
& layout
->css_mask
;
174 if (layout
->have_slck_mck
) {
175 prog
->slckmck
= !!(tmp
& AT91_PMC_CSSMCK_MCK
);
176 if (prog
->slckmck
&& !ret
)
177 ret
= PROG_MAX_RM9200_CSS
+ 1;
183 static int clk_programmable_set_rate(struct clk_hw
*hw
, unsigned long rate
,
184 unsigned long parent_rate
)
186 struct clk_programmable
*prog
= to_clk_programmable(hw
);
187 unsigned long best_rate
= parent_rate
;
188 unsigned long best_diff
;
189 unsigned long new_diff
;
190 unsigned long cur_rate
;
193 if (rate
> parent_rate
)
196 best_diff
= parent_rate
- rate
;
203 for (shift
= 1; shift
< PROG_PRES_MASK
; shift
++) {
204 cur_rate
= parent_rate
>> shift
;
207 new_diff
= cur_rate
- rate
;
209 new_diff
= rate
- cur_rate
;
214 if (new_diff
< best_diff
) {
215 best_diff
= new_diff
;
216 best_rate
= cur_rate
;
227 static const struct clk_ops programmable_ops
= {
228 .prepare
= clk_programmable_prepare
,
229 .is_prepared
= clk_programmable_is_ready
,
230 .recalc_rate
= clk_programmable_recalc_rate
,
231 .round_rate
= clk_programmable_round_rate
,
232 .get_parent
= clk_programmable_get_parent
,
233 .set_parent
= clk_programmable_set_parent
,
234 .set_rate
= clk_programmable_set_rate
,
237 static struct clk
* __init
238 at91_clk_register_programmable(struct at91_pmc
*pmc
, unsigned int irq
,
239 const char *name
, const char **parent_names
,
240 u8 num_parents
, u8 id
,
241 const struct clk_programmable_layout
*layout
)
244 struct clk_programmable
*prog
;
245 struct clk
*clk
= NULL
;
246 struct clk_init_data init
;
249 if (id
> PROG_ID_MAX
)
250 return ERR_PTR(-EINVAL
);
252 prog
= kzalloc(sizeof(*prog
), GFP_KERNEL
);
254 return ERR_PTR(-ENOMEM
);
257 init
.ops
= &programmable_ops
;
258 init
.parent_names
= parent_names
;
259 init
.num_parents
= num_parents
;
260 init
.flags
= CLK_SET_RATE_GATE
| CLK_SET_PARENT_GATE
;
263 prog
->layout
= layout
;
264 prog
->hw
.init
= &init
;
267 init_waitqueue_head(&prog
->wait
);
268 irq_set_status_flags(prog
->irq
, IRQ_NOAUTOEN
);
269 snprintf(irq_name
, sizeof(irq_name
), "clk-prog%d", id
);
270 ret
= request_irq(prog
->irq
, clk_programmable_irq_handler
,
271 IRQF_TRIGGER_HIGH
, irq_name
, prog
);
275 clk
= clk_register(NULL
, &prog
->hw
);
282 static const struct clk_programmable_layout at91rm9200_programmable_layout
= {
288 static const struct clk_programmable_layout at91sam9g45_programmable_layout
= {
294 static const struct clk_programmable_layout at91sam9x5_programmable_layout
= {
301 of_at91_clk_prog_setup(struct device_node
*np
, struct at91_pmc
*pmc
,
302 const struct clk_programmable_layout
*layout
)
310 const char *parent_names
[PROG_SOURCE_MAX
];
312 struct device_node
*progclknp
;
314 num_parents
= of_count_phandle_with_args(np
, "clocks", "#clock-cells");
315 if (num_parents
<= 0 || num_parents
> PROG_SOURCE_MAX
)
318 for (i
= 0; i
< num_parents
; ++i
) {
319 parent_names
[i
] = of_clk_get_parent_name(np
, i
);
320 if (!parent_names
[i
])
324 num
= of_get_child_count(np
);
325 if (!num
|| num
> (PROG_ID_MAX
+ 1))
328 for_each_child_of_node(np
, progclknp
) {
329 if (of_property_read_u32(progclknp
, "reg", &id
))
332 if (of_property_read_string(np
, "clock-output-names", &name
))
333 name
= progclknp
->name
;
335 irq
= irq_of_parse_and_map(progclknp
, 0);
339 clk
= at91_clk_register_programmable(pmc
, irq
, name
,
340 parent_names
, num_parents
,
345 of_clk_add_provider(progclknp
, of_clk_src_simple_get
, clk
);
350 void __init
of_at91rm9200_clk_prog_setup(struct device_node
*np
,
351 struct at91_pmc
*pmc
)
353 of_at91_clk_prog_setup(np
, pmc
, &at91rm9200_programmable_layout
);
356 void __init
of_at91sam9g45_clk_prog_setup(struct device_node
*np
,
357 struct at91_pmc
*pmc
)
359 of_at91_clk_prog_setup(np
, pmc
, &at91sam9g45_programmable_layout
);
362 void __init
of_at91sam9x5_clk_prog_setup(struct device_node
*np
,
363 struct at91_pmc
*pmc
)
365 of_at91_clk_prog_setup(np
, pmc
, &at91sam9x5_programmable_layout
);