Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / drivers / dma / ioat / dca.c
blob9e84d5bc930779d4b8f60c98a68ac43108bd3660
1 /*
2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 - 2009 Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
23 #include <linux/kernel.h>
24 #include <linux/pci.h>
25 #include <linux/smp.h>
26 #include <linux/interrupt.h>
27 #include <linux/dca.h>
29 /* either a kernel change is needed, or we need something like this in kernel */
30 #ifndef CONFIG_SMP
31 #include <asm/smp.h>
32 #undef cpu_physical_id
33 #define cpu_physical_id(cpu) (cpuid_ebx(1) >> 24)
34 #endif
36 #include "dma.h"
37 #include "registers.h"
40 * Bit 7 of a tag map entry is the "valid" bit, if it is set then bits 0:6
41 * contain the bit number of the APIC ID to map into the DCA tag. If the valid
42 * bit is not set, then the value must be 0 or 1 and defines the bit in the tag.
44 #define DCA_TAG_MAP_VALID 0x80
46 #define DCA3_TAG_MAP_BIT_TO_INV 0x80
47 #define DCA3_TAG_MAP_BIT_TO_SEL 0x40
48 #define DCA3_TAG_MAP_LITERAL_VAL 0x1
50 #define DCA_TAG_MAP_MASK 0xDF
52 /* expected tag map bytes for I/OAT ver.2 */
53 #define DCA2_TAG_MAP_BYTE0 0x80
54 #define DCA2_TAG_MAP_BYTE1 0x0
55 #define DCA2_TAG_MAP_BYTE2 0x81
56 #define DCA2_TAG_MAP_BYTE3 0x82
57 #define DCA2_TAG_MAP_BYTE4 0x82
59 /* verify if tag map matches expected values */
60 static inline int dca2_tag_map_valid(u8 *tag_map)
62 return ((tag_map[0] == DCA2_TAG_MAP_BYTE0) &&
63 (tag_map[1] == DCA2_TAG_MAP_BYTE1) &&
64 (tag_map[2] == DCA2_TAG_MAP_BYTE2) &&
65 (tag_map[3] == DCA2_TAG_MAP_BYTE3) &&
66 (tag_map[4] == DCA2_TAG_MAP_BYTE4));
70 * "Legacy" DCA systems do not implement the DCA register set in the
71 * I/OAT device. Software needs direct support for their tag mappings.
74 #define APICID_BIT(x) (DCA_TAG_MAP_VALID | (x))
75 #define IOAT_TAG_MAP_LEN 8
77 static u8 ioat_tag_map_BNB[IOAT_TAG_MAP_LEN] = {
78 1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
79 static u8 ioat_tag_map_SCNB[IOAT_TAG_MAP_LEN] = {
80 1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
81 static u8 ioat_tag_map_CNB[IOAT_TAG_MAP_LEN] = {
82 1, APICID_BIT(1), APICID_BIT(3), APICID_BIT(4), APICID_BIT(2), };
83 static u8 ioat_tag_map_UNISYS[IOAT_TAG_MAP_LEN] = { 0 };
85 /* pack PCI B/D/F into a u16 */
86 static inline u16 dcaid_from_pcidev(struct pci_dev *pci)
88 return (pci->bus->number << 8) | pci->devfn;
91 static int dca_enabled_in_bios(struct pci_dev *pdev)
93 /* CPUID level 9 returns DCA configuration */
94 /* Bit 0 indicates DCA enabled by the BIOS */
95 unsigned long cpuid_level_9;
96 int res;
98 cpuid_level_9 = cpuid_eax(9);
99 res = test_bit(0, &cpuid_level_9);
100 if (!res)
101 dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
103 return res;
106 int system_has_dca_enabled(struct pci_dev *pdev)
108 if (boot_cpu_has(X86_FEATURE_DCA))
109 return dca_enabled_in_bios(pdev);
111 dev_dbg(&pdev->dev, "boot cpu doesn't have X86_FEATURE_DCA\n");
112 return 0;
115 struct ioat_dca_slot {
116 struct pci_dev *pdev; /* requester device */
117 u16 rid; /* requester id, as used by IOAT */
120 #define IOAT_DCA_MAX_REQ 6
121 #define IOAT3_DCA_MAX_REQ 2
123 struct ioat_dca_priv {
124 void __iomem *iobase;
125 void __iomem *dca_base;
126 int max_requesters;
127 int requester_count;
128 u8 tag_map[IOAT_TAG_MAP_LEN];
129 struct ioat_dca_slot req_slots[0];
132 /* 5000 series chipset DCA Port Requester ID Table Entry Format
133 * [15:8] PCI-Express Bus Number
134 * [7:3] PCI-Express Device Number
135 * [2:0] PCI-Express Function Number
137 * 5000 series chipset DCA control register format
138 * [7:1] Reserved (0)
139 * [0] Ignore Function Number
142 static int ioat_dca_add_requester(struct dca_provider *dca, struct device *dev)
144 struct ioat_dca_priv *ioatdca = dca_priv(dca);
145 struct pci_dev *pdev;
146 int i;
147 u16 id;
149 /* This implementation only supports PCI-Express */
150 if (dev->bus != &pci_bus_type)
151 return -ENODEV;
152 pdev = to_pci_dev(dev);
153 id = dcaid_from_pcidev(pdev);
155 if (ioatdca->requester_count == ioatdca->max_requesters)
156 return -ENODEV;
158 for (i = 0; i < ioatdca->max_requesters; i++) {
159 if (ioatdca->req_slots[i].pdev == NULL) {
160 /* found an empty slot */
161 ioatdca->requester_count++;
162 ioatdca->req_slots[i].pdev = pdev;
163 ioatdca->req_slots[i].rid = id;
164 writew(id, ioatdca->dca_base + (i * 4));
165 /* make sure the ignore function bit is off */
166 writeb(0, ioatdca->dca_base + (i * 4) + 2);
167 return i;
170 /* Error, ioatdma->requester_count is out of whack */
171 return -EFAULT;
174 static int ioat_dca_remove_requester(struct dca_provider *dca,
175 struct device *dev)
177 struct ioat_dca_priv *ioatdca = dca_priv(dca);
178 struct pci_dev *pdev;
179 int i;
181 /* This implementation only supports PCI-Express */
182 if (dev->bus != &pci_bus_type)
183 return -ENODEV;
184 pdev = to_pci_dev(dev);
186 for (i = 0; i < ioatdca->max_requesters; i++) {
187 if (ioatdca->req_slots[i].pdev == pdev) {
188 writew(0, ioatdca->dca_base + (i * 4));
189 ioatdca->req_slots[i].pdev = NULL;
190 ioatdca->req_slots[i].rid = 0;
191 ioatdca->requester_count--;
192 return i;
195 return -ENODEV;
198 static u8 ioat_dca_get_tag(struct dca_provider *dca,
199 struct device *dev,
200 int cpu)
202 struct ioat_dca_priv *ioatdca = dca_priv(dca);
203 int i, apic_id, bit, value;
204 u8 entry, tag;
206 tag = 0;
207 apic_id = cpu_physical_id(cpu);
209 for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
210 entry = ioatdca->tag_map[i];
211 if (entry & DCA_TAG_MAP_VALID) {
212 bit = entry & ~DCA_TAG_MAP_VALID;
213 value = (apic_id & (1 << bit)) ? 1 : 0;
214 } else {
215 value = entry ? 1 : 0;
217 tag |= (value << i);
219 return tag;
222 static int ioat_dca_dev_managed(struct dca_provider *dca,
223 struct device *dev)
225 struct ioat_dca_priv *ioatdca = dca_priv(dca);
226 struct pci_dev *pdev;
227 int i;
229 pdev = to_pci_dev(dev);
230 for (i = 0; i < ioatdca->max_requesters; i++) {
231 if (ioatdca->req_slots[i].pdev == pdev)
232 return 1;
234 return 0;
237 static struct dca_ops ioat_dca_ops = {
238 .add_requester = ioat_dca_add_requester,
239 .remove_requester = ioat_dca_remove_requester,
240 .get_tag = ioat_dca_get_tag,
241 .dev_managed = ioat_dca_dev_managed,
245 struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase)
247 struct dca_provider *dca;
248 struct ioat_dca_priv *ioatdca;
249 u8 *tag_map = NULL;
250 int i;
251 int err;
252 u8 version;
253 u8 max_requesters;
255 if (!system_has_dca_enabled(pdev))
256 return NULL;
258 /* I/OAT v1 systems must have a known tag_map to support DCA */
259 switch (pdev->vendor) {
260 case PCI_VENDOR_ID_INTEL:
261 switch (pdev->device) {
262 case PCI_DEVICE_ID_INTEL_IOAT:
263 tag_map = ioat_tag_map_BNB;
264 break;
265 case PCI_DEVICE_ID_INTEL_IOAT_CNB:
266 tag_map = ioat_tag_map_CNB;
267 break;
268 case PCI_DEVICE_ID_INTEL_IOAT_SCNB:
269 tag_map = ioat_tag_map_SCNB;
270 break;
272 break;
273 case PCI_VENDOR_ID_UNISYS:
274 switch (pdev->device) {
275 case PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR:
276 tag_map = ioat_tag_map_UNISYS;
277 break;
279 break;
281 if (tag_map == NULL)
282 return NULL;
284 version = readb(iobase + IOAT_VER_OFFSET);
285 if (version == IOAT_VER_3_0)
286 max_requesters = IOAT3_DCA_MAX_REQ;
287 else
288 max_requesters = IOAT_DCA_MAX_REQ;
290 dca = alloc_dca_provider(&ioat_dca_ops,
291 sizeof(*ioatdca) +
292 (sizeof(struct ioat_dca_slot) * max_requesters));
293 if (!dca)
294 return NULL;
296 ioatdca = dca_priv(dca);
297 ioatdca->max_requesters = max_requesters;
298 ioatdca->dca_base = iobase + 0x54;
300 /* copy over the APIC ID to DCA tag mapping */
301 for (i = 0; i < IOAT_TAG_MAP_LEN; i++)
302 ioatdca->tag_map[i] = tag_map[i];
304 err = register_dca_provider(dca, &pdev->dev);
305 if (err) {
306 free_dca_provider(dca);
307 return NULL;
310 return dca;
314 static int ioat2_dca_add_requester(struct dca_provider *dca, struct device *dev)
316 struct ioat_dca_priv *ioatdca = dca_priv(dca);
317 struct pci_dev *pdev;
318 int i;
319 u16 id;
320 u16 global_req_table;
322 /* This implementation only supports PCI-Express */
323 if (dev->bus != &pci_bus_type)
324 return -ENODEV;
325 pdev = to_pci_dev(dev);
326 id = dcaid_from_pcidev(pdev);
328 if (ioatdca->requester_count == ioatdca->max_requesters)
329 return -ENODEV;
331 for (i = 0; i < ioatdca->max_requesters; i++) {
332 if (ioatdca->req_slots[i].pdev == NULL) {
333 /* found an empty slot */
334 ioatdca->requester_count++;
335 ioatdca->req_slots[i].pdev = pdev;
336 ioatdca->req_slots[i].rid = id;
337 global_req_table =
338 readw(ioatdca->dca_base + IOAT_DCA_GREQID_OFFSET);
339 writel(id | IOAT_DCA_GREQID_VALID,
340 ioatdca->iobase + global_req_table + (i * 4));
341 return i;
344 /* Error, ioatdma->requester_count is out of whack */
345 return -EFAULT;
348 static int ioat2_dca_remove_requester(struct dca_provider *dca,
349 struct device *dev)
351 struct ioat_dca_priv *ioatdca = dca_priv(dca);
352 struct pci_dev *pdev;
353 int i;
354 u16 global_req_table;
356 /* This implementation only supports PCI-Express */
357 if (dev->bus != &pci_bus_type)
358 return -ENODEV;
359 pdev = to_pci_dev(dev);
361 for (i = 0; i < ioatdca->max_requesters; i++) {
362 if (ioatdca->req_slots[i].pdev == pdev) {
363 global_req_table =
364 readw(ioatdca->dca_base + IOAT_DCA_GREQID_OFFSET);
365 writel(0, ioatdca->iobase + global_req_table + (i * 4));
366 ioatdca->req_slots[i].pdev = NULL;
367 ioatdca->req_slots[i].rid = 0;
368 ioatdca->requester_count--;
369 return i;
372 return -ENODEV;
375 static u8 ioat2_dca_get_tag(struct dca_provider *dca,
376 struct device *dev,
377 int cpu)
379 u8 tag;
381 tag = ioat_dca_get_tag(dca, dev, cpu);
382 tag = (~tag) & 0x1F;
383 return tag;
386 static struct dca_ops ioat2_dca_ops = {
387 .add_requester = ioat2_dca_add_requester,
388 .remove_requester = ioat2_dca_remove_requester,
389 .get_tag = ioat2_dca_get_tag,
390 .dev_managed = ioat_dca_dev_managed,
393 static int ioat2_dca_count_dca_slots(void __iomem *iobase, u16 dca_offset)
395 int slots = 0;
396 u32 req;
397 u16 global_req_table;
399 global_req_table = readw(iobase + dca_offset + IOAT_DCA_GREQID_OFFSET);
400 if (global_req_table == 0)
401 return 0;
402 do {
403 req = readl(iobase + global_req_table + (slots * sizeof(u32)));
404 slots++;
405 } while ((req & IOAT_DCA_GREQID_LASTID) == 0);
407 return slots;
410 struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase)
412 struct dca_provider *dca;
413 struct ioat_dca_priv *ioatdca;
414 int slots;
415 int i;
416 int err;
417 u32 tag_map;
418 u16 dca_offset;
419 u16 csi_fsb_control;
420 u16 pcie_control;
421 u8 bit;
423 if (!system_has_dca_enabled(pdev))
424 return NULL;
426 dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET);
427 if (dca_offset == 0)
428 return NULL;
430 slots = ioat2_dca_count_dca_slots(iobase, dca_offset);
431 if (slots == 0)
432 return NULL;
434 dca = alloc_dca_provider(&ioat2_dca_ops,
435 sizeof(*ioatdca)
436 + (sizeof(struct ioat_dca_slot) * slots));
437 if (!dca)
438 return NULL;
440 ioatdca = dca_priv(dca);
441 ioatdca->iobase = iobase;
442 ioatdca->dca_base = iobase + dca_offset;
443 ioatdca->max_requesters = slots;
445 /* some bios might not know to turn these on */
446 csi_fsb_control = readw(ioatdca->dca_base + IOAT_FSB_CAP_ENABLE_OFFSET);
447 if ((csi_fsb_control & IOAT_FSB_CAP_ENABLE_PREFETCH) == 0) {
448 csi_fsb_control |= IOAT_FSB_CAP_ENABLE_PREFETCH;
449 writew(csi_fsb_control,
450 ioatdca->dca_base + IOAT_FSB_CAP_ENABLE_OFFSET);
452 pcie_control = readw(ioatdca->dca_base + IOAT_PCI_CAP_ENABLE_OFFSET);
453 if ((pcie_control & IOAT_PCI_CAP_ENABLE_MEMWR) == 0) {
454 pcie_control |= IOAT_PCI_CAP_ENABLE_MEMWR;
455 writew(pcie_control,
456 ioatdca->dca_base + IOAT_PCI_CAP_ENABLE_OFFSET);
460 /* TODO version, compatibility and configuration checks */
462 /* copy out the APIC to DCA tag map */
463 tag_map = readl(ioatdca->dca_base + IOAT_APICID_TAG_MAP_OFFSET);
464 for (i = 0; i < 5; i++) {
465 bit = (tag_map >> (4 * i)) & 0x0f;
466 if (bit < 8)
467 ioatdca->tag_map[i] = bit | DCA_TAG_MAP_VALID;
468 else
469 ioatdca->tag_map[i] = 0;
472 if (!dca2_tag_map_valid(ioatdca->tag_map)) {
473 WARN_TAINT_ONCE(1, TAINT_FIRMWARE_WORKAROUND,
474 "%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
475 dev_driver_string(&pdev->dev),
476 dev_name(&pdev->dev));
477 free_dca_provider(dca);
478 return NULL;
481 err = register_dca_provider(dca, &pdev->dev);
482 if (err) {
483 free_dca_provider(dca);
484 return NULL;
487 return dca;
490 static int ioat3_dca_add_requester(struct dca_provider *dca, struct device *dev)
492 struct ioat_dca_priv *ioatdca = dca_priv(dca);
493 struct pci_dev *pdev;
494 int i;
495 u16 id;
496 u16 global_req_table;
498 /* This implementation only supports PCI-Express */
499 if (dev->bus != &pci_bus_type)
500 return -ENODEV;
501 pdev = to_pci_dev(dev);
502 id = dcaid_from_pcidev(pdev);
504 if (ioatdca->requester_count == ioatdca->max_requesters)
505 return -ENODEV;
507 for (i = 0; i < ioatdca->max_requesters; i++) {
508 if (ioatdca->req_slots[i].pdev == NULL) {
509 /* found an empty slot */
510 ioatdca->requester_count++;
511 ioatdca->req_slots[i].pdev = pdev;
512 ioatdca->req_slots[i].rid = id;
513 global_req_table =
514 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
515 writel(id | IOAT_DCA_GREQID_VALID,
516 ioatdca->iobase + global_req_table + (i * 4));
517 return i;
520 /* Error, ioatdma->requester_count is out of whack */
521 return -EFAULT;
524 static int ioat3_dca_remove_requester(struct dca_provider *dca,
525 struct device *dev)
527 struct ioat_dca_priv *ioatdca = dca_priv(dca);
528 struct pci_dev *pdev;
529 int i;
530 u16 global_req_table;
532 /* This implementation only supports PCI-Express */
533 if (dev->bus != &pci_bus_type)
534 return -ENODEV;
535 pdev = to_pci_dev(dev);
537 for (i = 0; i < ioatdca->max_requesters; i++) {
538 if (ioatdca->req_slots[i].pdev == pdev) {
539 global_req_table =
540 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
541 writel(0, ioatdca->iobase + global_req_table + (i * 4));
542 ioatdca->req_slots[i].pdev = NULL;
543 ioatdca->req_slots[i].rid = 0;
544 ioatdca->requester_count--;
545 return i;
548 return -ENODEV;
551 static u8 ioat3_dca_get_tag(struct dca_provider *dca,
552 struct device *dev,
553 int cpu)
555 u8 tag;
557 struct ioat_dca_priv *ioatdca = dca_priv(dca);
558 int i, apic_id, bit, value;
559 u8 entry;
561 tag = 0;
562 apic_id = cpu_physical_id(cpu);
564 for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
565 entry = ioatdca->tag_map[i];
566 if (entry & DCA3_TAG_MAP_BIT_TO_SEL) {
567 bit = entry &
568 ~(DCA3_TAG_MAP_BIT_TO_SEL | DCA3_TAG_MAP_BIT_TO_INV);
569 value = (apic_id & (1 << bit)) ? 1 : 0;
570 } else if (entry & DCA3_TAG_MAP_BIT_TO_INV) {
571 bit = entry & ~DCA3_TAG_MAP_BIT_TO_INV;
572 value = (apic_id & (1 << bit)) ? 0 : 1;
573 } else {
574 value = (entry & DCA3_TAG_MAP_LITERAL_VAL) ? 1 : 0;
576 tag |= (value << i);
579 return tag;
582 static struct dca_ops ioat3_dca_ops = {
583 .add_requester = ioat3_dca_add_requester,
584 .remove_requester = ioat3_dca_remove_requester,
585 .get_tag = ioat3_dca_get_tag,
586 .dev_managed = ioat_dca_dev_managed,
589 static int ioat3_dca_count_dca_slots(void *iobase, u16 dca_offset)
591 int slots = 0;
592 u32 req;
593 u16 global_req_table;
595 global_req_table = readw(iobase + dca_offset + IOAT3_DCA_GREQID_OFFSET);
596 if (global_req_table == 0)
597 return 0;
599 do {
600 req = readl(iobase + global_req_table + (slots * sizeof(u32)));
601 slots++;
602 } while ((req & IOAT_DCA_GREQID_LASTID) == 0);
604 return slots;
607 static inline int dca3_tag_map_invalid(u8 *tag_map)
610 * If the tag map is not programmed by the BIOS the default is:
611 * 0x80 0x80 0x80 0x80 0x80 0x00 0x00 0x00
613 * This an invalid map and will result in only 2 possible tags
614 * 0x1F and 0x00. 0x00 is an invalid DCA tag so we know that
615 * this entire definition is invalid.
617 return ((tag_map[0] == DCA_TAG_MAP_VALID) &&
618 (tag_map[1] == DCA_TAG_MAP_VALID) &&
619 (tag_map[2] == DCA_TAG_MAP_VALID) &&
620 (tag_map[3] == DCA_TAG_MAP_VALID) &&
621 (tag_map[4] == DCA_TAG_MAP_VALID));
624 struct dca_provider *ioat3_dca_init(struct pci_dev *pdev, void __iomem *iobase)
626 struct dca_provider *dca;
627 struct ioat_dca_priv *ioatdca;
628 int slots;
629 int i;
630 int err;
631 u16 dca_offset;
632 u16 csi_fsb_control;
633 u16 pcie_control;
634 u8 bit;
636 union {
637 u64 full;
638 struct {
639 u32 low;
640 u32 high;
642 } tag_map;
644 if (!system_has_dca_enabled(pdev))
645 return NULL;
647 dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET);
648 if (dca_offset == 0)
649 return NULL;
651 slots = ioat3_dca_count_dca_slots(iobase, dca_offset);
652 if (slots == 0)
653 return NULL;
655 dca = alloc_dca_provider(&ioat3_dca_ops,
656 sizeof(*ioatdca)
657 + (sizeof(struct ioat_dca_slot) * slots));
658 if (!dca)
659 return NULL;
661 ioatdca = dca_priv(dca);
662 ioatdca->iobase = iobase;
663 ioatdca->dca_base = iobase + dca_offset;
664 ioatdca->max_requesters = slots;
666 /* some bios might not know to turn these on */
667 csi_fsb_control = readw(ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
668 if ((csi_fsb_control & IOAT3_CSI_CONTROL_PREFETCH) == 0) {
669 csi_fsb_control |= IOAT3_CSI_CONTROL_PREFETCH;
670 writew(csi_fsb_control,
671 ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
673 pcie_control = readw(ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
674 if ((pcie_control & IOAT3_PCI_CONTROL_MEMWR) == 0) {
675 pcie_control |= IOAT3_PCI_CONTROL_MEMWR;
676 writew(pcie_control,
677 ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
681 /* TODO version, compatibility and configuration checks */
683 /* copy out the APIC to DCA tag map */
684 tag_map.low =
685 readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_LOW);
686 tag_map.high =
687 readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_HIGH);
688 for (i = 0; i < 8; i++) {
689 bit = tag_map.full >> (8 * i);
690 ioatdca->tag_map[i] = bit & DCA_TAG_MAP_MASK;
693 if (dca3_tag_map_invalid(ioatdca->tag_map)) {
694 WARN_TAINT_ONCE(1, TAINT_FIRMWARE_WORKAROUND,
695 "%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
696 dev_driver_string(&pdev->dev),
697 dev_name(&pdev->dev));
698 free_dca_provider(dca);
699 return NULL;
702 err = register_dca_provider(dca, &pdev->dev);
703 if (err) {
704 free_dca_provider(dca);
705 return NULL;
708 return dca;