drivers/isdn/hardware/mISDN/isar.h

   1 /*
   2  *
   3  * isar.h   ISAR (Siemens PSB 7110) specific defines
   4  *
   5  * Author Karsten Keil (keil@isdn4linux.de)
   6  *
   7  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  */
  23
  24 #include "iohelper.h"
  25
  26 struct isar_hw;
  27
  28 struct isar_ch {
  29         struct bchannel         bch;
  30         struct isar_hw          *is;
  31         struct timer_list       ftimer;
  32         u8                      nr;
  33         u8                      dpath;
  34         u8                      mml;
  35         u8                      state;
  36         u8                      cmd;
  37         u8                      mod;
  38         u8                      newcmd;
  39         u8                      newmod;
  40         u8                      try_mod;
  41         u8                      conmsg[16];
  42 };
  43
  44 struct isar_hw {
  45         struct  isar_ch ch[2];
  46         void            *hw;
  47         spinlock_t      *hwlock;        /* lock HW access */
  48         char            *name;
  49         struct module   *owner;
  50         read_reg_func   *read_reg;
  51         write_reg_func  *write_reg;
  52         fifo_func       *read_fifo;
  53         fifo_func       *write_fifo;
  54         int             (*ctrl)(void *, u32, u_long);
  55         void            (*release)(struct isar_hw *);
  56         int             (*init)(struct isar_hw *);
  57         int             (*open)(struct isar_hw *, struct channel_req *);
  58         int             (*firmware)(struct isar_hw *, const u8 *, int);
  59         unsigned long   Flags;
  60         int             version;
  61         u8              bstat;
  62         u8              iis;
  63         u8              cmsb;
  64         u8              clsb;
  65         u8              buf[256];
  66         u8              log[256];
  67 };
  68
  69 #define ISAR_IRQMSK     0x04
  70 #define ISAR_IRQSTA     0x04
  71 #define ISAR_IRQBIT     0x75
  72 #define ISAR_CTRL_H     0x61
  73 #define ISAR_CTRL_L     0x60
  74 #define ISAR_IIS        0x58
  75 #define ISAR_IIA        0x58
  76 #define ISAR_HIS        0x50
  77 #define ISAR_HIA        0x50
  78 #define ISAR_MBOX       0x4c
  79 #define ISAR_WADR       0x4a
  80 #define ISAR_RADR       0x48
  81
  82 #define ISAR_HIS_VNR            0x14
  83 #define ISAR_HIS_DKEY           0x02
  84 #define ISAR_HIS_FIRM           0x1e
  85 #define ISAR_HIS_STDSP          0x08
  86 #define ISAR_HIS_DIAG           0x05
  87 #define ISAR_HIS_P0CFG          0x3c
  88 #define ISAR_HIS_P12CFG         0x24
  89 #define ISAR_HIS_SARTCFG        0x25
  90 #define ISAR_HIS_PUMPCFG        0x26
  91 #define ISAR_HIS_PUMPCTRL       0x2a
  92 #define ISAR_HIS_IOM2CFG        0x27
  93 #define ISAR_HIS_IOM2REQ        0x07
  94 #define ISAR_HIS_IOM2CTRL       0x2b
  95 #define ISAR_HIS_BSTREQ         0x0c
  96 #define ISAR_HIS_PSTREQ         0x0e
  97 #define ISAR_HIS_SDATA          0x20
  98 #define ISAR_HIS_DPS1           0x40
  99 #define ISAR_HIS_DPS2           0x80
 100 #define SET_DPS(x)              ((x << 6) & 0xc0)
 101
 102 #define ISAR_IIS_MSCMSD         0x3f
 103 #define ISAR_IIS_VNR            0x15
 104 #define ISAR_IIS_DKEY           0x03
 105 #define ISAR_IIS_FIRM           0x1f
 106 #define ISAR_IIS_STDSP          0x09
 107 #define ISAR_IIS_DIAG           0x25
 108 #define ISAR_IIS_GSTEV          0x00
 109 #define ISAR_IIS_BSTEV          0x28
 110 #define ISAR_IIS_BSTRSP         0x2c
 111 #define ISAR_IIS_PSTRSP         0x2e
 112 #define ISAR_IIS_PSTEV          0x2a
 113 #define ISAR_IIS_IOM2RSP        0x27
 114 #define ISAR_IIS_RDATA          0x20
 115 #define ISAR_IIS_INVMSG         0x3f
 116
 117 #define ISAR_CTRL_SWVER 0x10
 118 #define ISAR_CTRL_STST  0x40
 119
 120 #define ISAR_MSG_HWVER  0x20
 121
 122 #define ISAR_DP1_USE    1
 123 #define ISAR_DP2_USE    2
 124 #define ISAR_RATE_REQ   3
 125
 126 #define PMOD_DISABLE    0
 127 #define PMOD_FAX        1
 128 #define PMOD_DATAMODEM  2
 129 #define PMOD_HALFDUPLEX 3
 130 #define PMOD_V110       4
 131 #define PMOD_DTMF       5
 132 #define PMOD_DTMF_TRANS 6
 133 #define PMOD_BYPASS     7
 134
 135 #define PCTRL_ORIG      0x80
 136 #define PV32P2_V23R     0x40
 137 #define PV32P2_V22A     0x20
 138 #define PV32P2_V22B     0x10
 139 #define PV32P2_V22C     0x08
 140 #define PV32P2_V21      0x02
 141 #define PV32P2_BEL      0x01
 142
 143 /* LSB MSB in ISAR doc wrong !!! Arghhh */
 144 #define PV32P3_AMOD     0x80
 145 #define PV32P3_V32B     0x02
 146 #define PV32P3_V23B     0x01
 147 #define PV32P4_48       0x11
 148 #define PV32P5_48       0x05
 149 #define PV32P4_UT48     0x11
 150 #define PV32P5_UT48     0x0d
 151 #define PV32P4_96       0x11
 152 #define PV32P5_96       0x03
 153 #define PV32P4_UT96     0x11
 154 #define PV32P5_UT96     0x0f
 155 #define PV32P4_B96      0x91
 156 #define PV32P5_B96      0x0b
 157 #define PV32P4_UTB96    0xd1
 158 #define PV32P5_UTB96    0x0f
 159 #define PV32P4_120      0xb1
 160 #define PV32P5_120      0x09
 161 #define PV32P4_UT120    0xf1
 162 #define PV32P5_UT120    0x0f
 163 #define PV32P4_144      0x99
 164 #define PV32P5_144      0x09
 165 #define PV32P4_UT144    0xf9
 166 #define PV32P5_UT144    0x0f
 167 #define PV32P6_CTN      0x01
 168 #define PV32P6_ATN      0x02
 169
 170 #define PFAXP2_CTN      0x01
 171 #define PFAXP2_ATN      0x04
 172
 173 #define PSEV_10MS_TIMER 0x02
 174 #define PSEV_CON_ON     0x18
 175 #define PSEV_CON_OFF    0x19
 176 #define PSEV_V24_OFF    0x20
 177 #define PSEV_CTS_ON     0x21
 178 #define PSEV_CTS_OFF    0x22
 179 #define PSEV_DCD_ON     0x23
 180 #define PSEV_DCD_OFF    0x24
 181 #define PSEV_DSR_ON     0x25
 182 #define PSEV_DSR_OFF    0x26
 183 #define PSEV_REM_RET    0xcc
 184 #define PSEV_REM_REN    0xcd
 185 #define PSEV_GSTN_CLR   0xd4
 186
 187 #define PSEV_RSP_READY  0xbc
 188 #define PSEV_LINE_TX_H  0xb3
 189 #define PSEV_LINE_TX_B  0xb2
 190 #define PSEV_LINE_RX_H  0xb1
 191 #define PSEV_LINE_RX_B  0xb0
 192 #define PSEV_RSP_CONN   0xb5
 193 #define PSEV_RSP_DISC   0xb7
 194 #define PSEV_RSP_FCERR  0xb9
 195 #define PSEV_RSP_SILDET 0xbe
 196 #define PSEV_RSP_SILOFF 0xab
 197 #define PSEV_FLAGS_DET  0xba
 198
 199 #define PCTRL_CMD_TDTMF 0x5a
 200
 201 #define PCTRL_CMD_FTH   0xa7
 202 #define PCTRL_CMD_FRH   0xa5
 203 #define PCTRL_CMD_FTM   0xa8
 204 #define PCTRL_CMD_FRM   0xa6
 205 #define PCTRL_CMD_SILON 0xac
 206 #define PCTRL_CMD_CONT  0xa2
 207 #define PCTRL_CMD_ESC   0xa4
 208 #define PCTRL_CMD_SILOFF 0xab
 209 #define PCTRL_CMD_HALT  0xa9
 210
 211 #define PCTRL_LOC_RET   0xcf
 212 #define PCTRL_LOC_REN   0xce
 213
 214 #define SMODE_DISABLE   0
 215 #define SMODE_V14       2
 216 #define SMODE_HDLC      3
 217 #define SMODE_BINARY    4
 218 #define SMODE_FSK_V14   5
 219
 220 #define SCTRL_HDMC_BOTH 0x00
 221 #define SCTRL_HDMC_DTX  0x80
 222 #define SCTRL_HDMC_DRX  0x40
 223 #define S_P1_OVSP       0x40
 224 #define S_P1_SNP        0x20
 225 #define S_P1_EOP        0x10
 226 #define S_P1_EDP        0x08
 227 #define S_P1_NSB        0x04
 228 #define S_P1_CHS_8      0x03
 229 #define S_P1_CHS_7      0x02
 230 #define S_P1_CHS_6      0x01
 231 #define S_P1_CHS_5      0x00
 232
 233 #define S_P2_BFT_DEF    0x10
 234
 235 #define IOM_CTRL_ENA    0x80
 236 #define IOM_CTRL_NOPCM  0x00
 237 #define IOM_CTRL_ALAW   0x02
 238 #define IOM_CTRL_ULAW   0x04
 239 #define IOM_CTRL_RCV    0x01
 240
 241 #define IOM_P1_TXD      0x10
 242
 243 #define HDLC_FED        0x40
 244 #define HDLC_FSD        0x20
 245 #define HDLC_FST        0x20
 246 #define HDLC_ERROR      0x1c
 247 #define HDLC_ERR_FAD    0x10
 248 #define HDLC_ERR_RER    0x08
 249 #define HDLC_ERR_CER    0x04
 250 #define SART_NMD        0x01
 251
 252 #define BSTAT_RDM0      0x1
 253 #define BSTAT_RDM1      0x2
 254 #define BSTAT_RDM2      0x4
 255 #define BSTAT_RDM3      0x8
 256 #define BSTEV_TBO       0x1f
 257 #define BSTEV_RBO       0x2f
 258
 259 /* FAX State Machine */
 260 #define STFAX_NULL      0
 261 #define STFAX_READY     1
 262 #define STFAX_LINE      2
 263 #define STFAX_CONT      3
 264 #define STFAX_ACTIV     4
 265 #define STFAX_ESCAPE    5
 266 #define STFAX_SILDET    6
 267
 268 extern u32 mISDNisar_init(struct isar_hw *, void *);
 269 extern void mISDNisar_irq(struct isar_hw *);