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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / drivers / misc / eeprom / at25.c
blob4f3bca1003a175d2eb0ea7fdf423cd8dfa70e14d
1 /*
2 * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
3 *
4 * Copyright (C) 2006 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/sched.h>
19
20 #include <linux/spi/spi.h>
21 #include <linux/spi/eeprom.h>
22 #include <linux/of.h>
23
24 /*
25 * NOTE: this is an *EEPROM* driver. The vagaries of product naming
26 * mean that some AT25 products are EEPROMs, and others are FLASH.
27 * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
28 * not this one!
29 */
30
31 struct at25_data {
32 struct spi_device *spi;
33 struct memory_accessor mem;
34 struct mutex lock;
35 struct spi_eeprom chip;
36 struct bin_attribute bin;
37 unsigned addrlen;
38 };
39
40 #define AT25_WREN 0x06 /* latch the write enable */
41 #define AT25_WRDI 0x04 /* reset the write enable */
42 #define AT25_RDSR 0x05 /* read status register */
43 #define AT25_WRSR 0x01 /* write status register */
44 #define AT25_READ 0x03 /* read byte(s) */
45 #define AT25_WRITE 0x02 /* write byte(s)/sector */
46
47 #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
48 #define AT25_SR_WEN 0x02 /* write enable (latched) */
49 #define AT25_SR_BP0 0x04 /* BP for software writeprotect */
50 #define AT25_SR_BP1 0x08
51 #define AT25_SR_WPEN 0x80 /* writeprotect enable */
52
53 #define AT25_INSTR_BIT3 0x08 /* Additional address bit in instr */
54
55 #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
56
57 /* Specs often allow 5 msec for a page write, sometimes 20 msec;
58 * it's important to recover from write timeouts.
59 */
60 #define EE_TIMEOUT 25
61
62 /*-------------------------------------------------------------------------*/
63
64 #define io_limit PAGE_SIZE /* bytes */
65
66 static ssize_t
67 at25_ee_read(
68 struct at25_data *at25,
69 char *buf,
70 unsigned offset,
71 size_t count
72 )
73 {
74 u8 command[EE_MAXADDRLEN + 1];
75 u8 *cp;
76 ssize_t status;
77 struct spi_transfer t[2];
78 struct spi_message m;
79 u8 instr;
80
81 if (unlikely(offset >= at25->bin.size))
82 return 0;
83 if ((offset + count) > at25->bin.size)
84 count = at25->bin.size - offset;
85 if (unlikely(!count))
86 return count;
87
88 cp = command;
89
90 instr = AT25_READ;
91 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
92 if (offset >= (1U << (at25->addrlen * 8)))
93 instr |= AT25_INSTR_BIT3;
94 *cp++ = instr;
95
96 /* 8/16/24-bit address is written MSB first */
97 switch (at25->addrlen) {
98 default: /* case 3 */
99 *cp++ = offset >> 16;
100 case 2:
101 *cp++ = offset >> 8;
102 case 1:
103 case 0: /* can't happen: for better codegen */
104 *cp++ = offset >> 0;
105 }
106
107 spi_message_init(&m);
108 memset(t, 0, sizeof t);
109
110 t[0].tx_buf = command;
111 t[0].len = at25->addrlen + 1;
112 spi_message_add_tail(&t[0], &m);
113
114 t[1].rx_buf = buf;
115 t[1].len = count;
116 spi_message_add_tail(&t[1], &m);
117
118 mutex_lock(&at25->lock);
119
120 /* Read it all at once.
121 *
122 * REVISIT that's potentially a problem with large chips, if
123 * other devices on the bus need to be accessed regularly or
124 * this chip is clocked very slowly
125 */
126 status = spi_sync(at25->spi, &m);
127 dev_dbg(&at25->spi->dev,
128 "read %Zd bytes at %d --> %d\n",
129 count, offset, (int) status);
130
131 mutex_unlock(&at25->lock);
132 return status ? status : count;
133 }
134
135 static ssize_t
136 at25_bin_read(struct file *filp, struct kobject *kobj,
137 struct bin_attribute *bin_attr,
138 char *buf, loff_t off, size_t count)
139 {
140 struct device *dev;
141 struct at25_data *at25;
142
143 dev = container_of(kobj, struct device, kobj);
144 at25 = dev_get_drvdata(dev);
145
146 return at25_ee_read(at25, buf, off, count);
147 }
148
149
150 static ssize_t
151 at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
152 size_t count)
153 {
154 ssize_t status = 0;
155 unsigned written = 0;
156 unsigned buf_size;
157 u8 *bounce;
158
159 if (unlikely(off >= at25->bin.size))
160 return -EFBIG;
161 if ((off + count) > at25->bin.size)
162 count = at25->bin.size - off;
163 if (unlikely(!count))
164 return count;
165
166 /* Temp buffer starts with command and address */
167 buf_size = at25->chip.page_size;
168 if (buf_size > io_limit)
169 buf_size = io_limit;
170 bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
171 if (!bounce)
172 return -ENOMEM;
173
174 /* For write, rollover is within the page ... so we write at
175 * most one page, then manually roll over to the next page.
176 */
177 mutex_lock(&at25->lock);
178 do {
179 unsigned long timeout, retries;
180 unsigned segment;
181 unsigned offset = (unsigned) off;
182 u8 *cp = bounce;
183 int sr;
184 u8 instr;
185
186 *cp = AT25_WREN;
187 status = spi_write(at25->spi, cp, 1);
188 if (status < 0) {
189 dev_dbg(&at25->spi->dev, "WREN --> %d\n",
190 (int) status);
191 break;
192 }
193
194 instr = AT25_WRITE;
195 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
196 if (offset >= (1U << (at25->addrlen * 8)))
197 instr |= AT25_INSTR_BIT3;
198 *cp++ = instr;
199
200 /* 8/16/24-bit address is written MSB first */
201 switch (at25->addrlen) {
202 default: /* case 3 */
203 *cp++ = offset >> 16;
204 case 2:
205 *cp++ = offset >> 8;
206 case 1:
207 case 0: /* can't happen: for better codegen */
208 *cp++ = offset >> 0;
209 }
210
211 /* Write as much of a page as we can */
212 segment = buf_size - (offset % buf_size);
213 if (segment > count)
214 segment = count;
215 memcpy(cp, buf, segment);
216 status = spi_write(at25->spi, bounce,
217 segment + at25->addrlen + 1);
218 dev_dbg(&at25->spi->dev,
219 "write %u bytes at %u --> %d\n",
220 segment, offset, (int) status);
221 if (status < 0)
222 break;
223
224 /* REVISIT this should detect (or prevent) failed writes
225 * to readonly sections of the EEPROM...
226 */
227
228 /* Wait for non-busy status */
229 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
230 retries = 0;
231 do {
232
233 sr = spi_w8r8(at25->spi, AT25_RDSR);
234 if (sr < 0 || (sr & AT25_SR_nRDY)) {
235 dev_dbg(&at25->spi->dev,
236 "rdsr --> %d (%02x)\n", sr, sr);
237 /* at HZ=100, this is sloooow */
238 msleep(1);
239 continue;
240 }
241 if (!(sr & AT25_SR_nRDY))
242 break;
243 } while (retries++ < 3 || time_before_eq(jiffies, timeout));
244
245 if ((sr < 0) || (sr & AT25_SR_nRDY)) {
246 dev_err(&at25->spi->dev,
247 "write %d bytes offset %d, "
248 "timeout after %u msecs\n",
249 segment, offset,
250 jiffies_to_msecs(jiffies -
251 (timeout - EE_TIMEOUT)));
252 status = -ETIMEDOUT;
253 break;
254 }
255
256 off += segment;
257 buf += segment;
258 count -= segment;
259 written += segment;
260
261 } while (count > 0);
262
263 mutex_unlock(&at25->lock);
264
265 kfree(bounce);
266 return written ? written : status;
267 }
268
269 static ssize_t
270 at25_bin_write(struct file *filp, struct kobject *kobj,
271 struct bin_attribute *bin_attr,
272 char *buf, loff_t off, size_t count)
273 {
274 struct device *dev;
275 struct at25_data *at25;
276
277 dev = container_of(kobj, struct device, kobj);
278 at25 = dev_get_drvdata(dev);
279
280 return at25_ee_write(at25, buf, off, count);
281 }
282
283 /*-------------------------------------------------------------------------*/
284
285 /* Let in-kernel code access the eeprom data. */
286
287 static ssize_t at25_mem_read(struct memory_accessor *mem, char *buf,
288 off_t offset, size_t count)
289 {
290 struct at25_data *at25 = container_of(mem, struct at25_data, mem);
291
292 return at25_ee_read(at25, buf, offset, count);
293 }
294
295 static ssize_t at25_mem_write(struct memory_accessor *mem, const char *buf,
296 off_t offset, size_t count)
297 {
298 struct at25_data *at25 = container_of(mem, struct at25_data, mem);
299
300 return at25_ee_write(at25, buf, offset, count);
301 }
302
303 /*-------------------------------------------------------------------------*/
304
305 static int at25_np_to_chip(struct device *dev,
306 struct device_node *np,
307 struct spi_eeprom *chip)
308 {
309 u32 val;
310
311 memset(chip, 0, sizeof(*chip));
312 strncpy(chip->name, np->name, sizeof(chip->name));
313
314 if (of_property_read_u32(np, "size", &val) == 0 ||
315 of_property_read_u32(np, "at25,byte-len", &val) == 0) {
316 chip->byte_len = val;
317 } else {
318 dev_err(dev, "Error: missing \"size\" property\n");
319 return -ENODEV;
320 }
321
322 if (of_property_read_u32(np, "pagesize", &val) == 0 ||
323 of_property_read_u32(np, "at25,page-size", &val) == 0) {
324 chip->page_size = (u16)val;
325 } else {
326 dev_err(dev, "Error: missing \"pagesize\" property\n");
327 return -ENODEV;
328 }
329
330 if (of_property_read_u32(np, "at25,addr-mode", &val) == 0) {
331 chip->flags = (u16)val;
332 } else {
333 if (of_property_read_u32(np, "address-width", &val)) {
334 dev_err(dev,
335 "Error: missing \"address-width\" property\n");
336 return -ENODEV;
337 }
338 switch (val) {
339 case 8:
340 chip->flags |= EE_ADDR1;
341 break;
342 case 16:
343 chip->flags |= EE_ADDR2;
344 break;
345 case 24:
346 chip->flags |= EE_ADDR3;
347 break;
348 default:
349 dev_err(dev,
350 "Error: bad \"address-width\" property: %u\n",
351 val);
352 return -ENODEV;
353 }
354 if (of_find_property(np, "read-only", NULL))
355 chip->flags |= EE_READONLY;
356 }
357 return 0;
358 }
359
360 static int at25_probe(struct spi_device *spi)
361 {
362 struct at25_data *at25 = NULL;
363 struct spi_eeprom chip;
364 struct device_node *np = spi->dev.of_node;
365 int err;
366 int sr;
367 int addrlen;
368
369 /* Chip description */
370 if (!spi->dev.platform_data) {
371 if (np) {
372 err = at25_np_to_chip(&spi->dev, np, &chip);
373 if (err)
374 return err;
375 } else {
376 dev_err(&spi->dev, "Error: no chip description\n");
377 return -ENODEV;
378 }
379 } else
380 chip = *(struct spi_eeprom *)spi->dev.platform_data;
381
382 /* For now we only support 8/16/24 bit addressing */
383 if (chip.flags & EE_ADDR1)
384 addrlen = 1;
385 else if (chip.flags & EE_ADDR2)
386 addrlen = 2;
387 else if (chip.flags & EE_ADDR3)
388 addrlen = 3;
389 else {
390 dev_dbg(&spi->dev, "unsupported address type\n");
391 return -EINVAL;
392 }
393
394 /* Ping the chip ... the status register is pretty portable,
395 * unlike probing manufacturer IDs. We do expect that system
396 * firmware didn't write it in the past few milliseconds!
397 */
398 sr = spi_w8r8(spi, AT25_RDSR);
399 if (sr < 0 || sr & AT25_SR_nRDY) {
400 dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
401 return -ENXIO;
402 }
403
404 at25 = devm_kzalloc(&spi->dev, sizeof(struct at25_data), GFP_KERNEL);
405 if (!at25)
406 return -ENOMEM;
407
408 mutex_init(&at25->lock);
409 at25->chip = chip;
410 at25->spi = spi_dev_get(spi);
411 spi_set_drvdata(spi, at25);
412 at25->addrlen = addrlen;
413
414 /* Export the EEPROM bytes through sysfs, since that's convenient.
415 * And maybe to other kernel code; it might hold a board's Ethernet
416 * address, or board-specific calibration data generated on the
417 * manufacturing floor.
418 *
419 * Default to root-only access to the data; EEPROMs often hold data
420 * that's sensitive for read and/or write, like ethernet addresses,
421 * security codes, board-specific manufacturing calibrations, etc.
422 */
423 sysfs_bin_attr_init(&at25->bin);
424 at25->bin.attr.name = "eeprom";
425 at25->bin.attr.mode = S_IRUSR;
426 at25->bin.read = at25_bin_read;
427 at25->mem.read = at25_mem_read;
428
429 at25->bin.size = at25->chip.byte_len;
430 if (!(chip.flags & EE_READONLY)) {
431 at25->bin.write = at25_bin_write;
432 at25->bin.attr.mode |= S_IWUSR;
433 at25->mem.write = at25_mem_write;
434 }
435
436 err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
437 if (err)
438 return err;
439
440 if (chip.setup)
441 chip.setup(&at25->mem, chip.context);
442
443 dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
444 (at25->bin.size < 1024)
445 ? at25->bin.size
446 : (at25->bin.size / 1024),
447 (at25->bin.size < 1024) ? "Byte" : "KByte",
448 at25->chip.name,
449 (chip.flags & EE_READONLY) ? " (readonly)" : "",
450 at25->chip.page_size);
451 return 0;
452 }
453
454 static int at25_remove(struct spi_device *spi)
455 {
456 struct at25_data *at25;
457
458 at25 = spi_get_drvdata(spi);
459 sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
460 return 0;
461 }
462
463 /*-------------------------------------------------------------------------*/
464
465 static const struct of_device_id at25_of_match[] = {
466 { .compatible = "atmel,at25", },
467 { }
468 };
469 MODULE_DEVICE_TABLE(of, at25_of_match);
470
471 static struct spi_driver at25_driver = {
472 .driver = {
473 .name = "at25",
474 .owner = THIS_MODULE,
475 .of_match_table = at25_of_match,
476 },
477 .probe = at25_probe,
478 .remove = at25_remove,
479 };
480
481 module_spi_driver(at25_driver);
482
483 MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
484 MODULE_AUTHOR("David Brownell");
485 MODULE_LICENSE("GPL");
486 MODULE_ALIAS("spi:at25");
Linux with added FPC-III support