drivers/pinctrl/sh-pfc/pfc-sh7785.c

   1 /*
   2  * SH7785 Pinmux
   3  *
   4  *  Copyright (C) 2008  Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <cpu/sh7785.h>
  14
  15 #include "sh_pfc.h"
  16
  17 enum {
  18         PINMUX_RESERVED = 0,
  19
  20         PINMUX_DATA_BEGIN,
  21         PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
  22         PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
  23         PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
  24         PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
  25         PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
  26         PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
  27         PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
  28         PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
  29         PE5_DATA, PE4_DATA, PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
  30         PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
  31         PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
  32         PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
  33         PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
  34         PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
  35         PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
  36         PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
  37         PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
  38         PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
  39         PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
  40         PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
  41         PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA,
  42         PM1_DATA, PM0_DATA,
  43         PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
  44         PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA,
  45         PP5_DATA, PP4_DATA, PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA,
  46         PQ4_DATA, PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA,
  47         PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA,
  48         PINMUX_DATA_END,
  49
  50         PINMUX_INPUT_BEGIN,
  51         PA7_IN, PA6_IN, PA5_IN, PA4_IN,
  52         PA3_IN, PA2_IN, PA1_IN, PA0_IN,
  53         PB7_IN, PB6_IN, PB5_IN, PB4_IN,
  54         PB3_IN, PB2_IN, PB1_IN, PB0_IN,
  55         PC7_IN, PC6_IN, PC5_IN, PC4_IN,
  56         PC3_IN, PC2_IN, PC1_IN, PC0_IN,
  57         PD7_IN, PD6_IN, PD5_IN, PD4_IN,
  58         PD3_IN, PD2_IN, PD1_IN, PD0_IN,
  59         PE5_IN, PE4_IN, PE3_IN, PE2_IN, PE1_IN, PE0_IN,
  60         PF7_IN, PF6_IN, PF5_IN, PF4_IN,
  61         PF3_IN, PF2_IN, PF1_IN, PF0_IN,
  62         PG7_IN, PG6_IN, PG5_IN, PG4_IN,
  63         PG3_IN, PG2_IN, PG1_IN, PG0_IN,
  64         PH7_IN, PH6_IN, PH5_IN, PH4_IN,
  65         PH3_IN, PH2_IN, PH1_IN, PH0_IN,
  66         PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
  67         PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
  68         PK7_IN, PK6_IN, PK5_IN, PK4_IN,
  69         PK3_IN, PK2_IN, PK1_IN, PK0_IN,
  70         PL7_IN, PL6_IN, PL5_IN, PL4_IN,
  71         PL3_IN, PL2_IN, PL1_IN, PL0_IN,
  72         PM1_IN, PM0_IN,
  73         PN7_IN, PN6_IN, PN5_IN, PN4_IN,
  74         PN3_IN, PN2_IN, PN1_IN, PN0_IN,
  75         PP5_IN, PP4_IN, PP3_IN, PP2_IN, PP1_IN, PP0_IN,
  76         PQ4_IN, PQ3_IN, PQ2_IN, PQ1_IN, PQ0_IN,
  77         PR3_IN, PR2_IN, PR1_IN, PR0_IN,
  78         PINMUX_INPUT_END,
  79
  80         PINMUX_OUTPUT_BEGIN,
  81         PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
  82         PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
  83         PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
  84         PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
  85         PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
  86         PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
  87         PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
  88         PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
  89         PE5_OUT, PE4_OUT, PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
  90         PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
  91         PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
  92         PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
  93         PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
  94         PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
  95         PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
  96         PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
  97         PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
  98         PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
  99         PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
 100         PL7_OUT, PL6_OUT, PL5_OUT, PL4_OUT,
 101         PL3_OUT, PL2_OUT, PL1_OUT, PL0_OUT,
 102         PM1_OUT, PM0_OUT,
 103         PN7_OUT, PN6_OUT, PN5_OUT, PN4_OUT,
 104         PN3_OUT, PN2_OUT, PN1_OUT, PN0_OUT,
 105         PP5_OUT, PP4_OUT, PP3_OUT, PP2_OUT, PP1_OUT, PP0_OUT,
 106         PQ4_OUT, PQ3_OUT, PQ2_OUT, PQ1_OUT, PQ0_OUT,
 107         PR3_OUT, PR2_OUT, PR1_OUT, PR0_OUT,
 108         PINMUX_OUTPUT_END,
 109
 110         PINMUX_FUNCTION_BEGIN,
 111         PA7_FN, PA6_FN, PA5_FN, PA4_FN,
 112         PA3_FN, PA2_FN, PA1_FN, PA0_FN,
 113         PB7_FN, PB6_FN, PB5_FN, PB4_FN,
 114         PB3_FN, PB2_FN, PB1_FN, PB0_FN,
 115         PC7_FN, PC6_FN, PC5_FN, PC4_FN,
 116         PC3_FN, PC2_FN, PC1_FN, PC0_FN,
 117         PD7_FN, PD6_FN, PD5_FN, PD4_FN,
 118         PD3_FN, PD2_FN, PD1_FN, PD0_FN,
 119         PE5_FN, PE4_FN, PE3_FN, PE2_FN, PE1_FN, PE0_FN,
 120         PF7_FN, PF6_FN, PF5_FN, PF4_FN,
 121         PF3_FN, PF2_FN, PF1_FN, PF0_FN,
 122         PG7_FN, PG6_FN, PG5_FN, PG4_FN,
 123         PG3_FN, PG2_FN, PG1_FN, PG0_FN,
 124         PH7_FN, PH6_FN, PH5_FN, PH4_FN,
 125         PH3_FN, PH2_FN, PH1_FN, PH0_FN,
 126         PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
 127         PJ3_FN, PJ2_FN, PJ1_FN, PJ0_FN,
 128         PK7_FN, PK6_FN, PK5_FN, PK4_FN,
 129         PK3_FN, PK2_FN, PK1_FN, PK0_FN,
 130         PL7_FN, PL6_FN, PL5_FN, PL4_FN,
 131         PL3_FN, PL2_FN, PL1_FN, PL0_FN,
 132         PM1_FN, PM0_FN,
 133         PN7_FN, PN6_FN, PN5_FN, PN4_FN,
 134         PN3_FN, PN2_FN, PN1_FN, PN0_FN,
 135         PP5_FN, PP4_FN, PP3_FN, PP2_FN, PP1_FN, PP0_FN,
 136         PQ4_FN, PQ3_FN, PQ2_FN, PQ1_FN, PQ0_FN,
 137         PR3_FN, PR2_FN, PR1_FN, PR0_FN,
 138         P1MSEL15_0, P1MSEL15_1,
 139         P1MSEL14_0, P1MSEL14_1,
 140         P1MSEL13_0, P1MSEL13_1,
 141         P1MSEL12_0, P1MSEL12_1,
 142         P1MSEL11_0, P1MSEL11_1,
 143         P1MSEL10_0, P1MSEL10_1,
 144         P1MSEL9_0, P1MSEL9_1,
 145         P1MSEL8_0, P1MSEL8_1,
 146         P1MSEL7_0, P1MSEL7_1,
 147         P1MSEL6_0, P1MSEL6_1,
 148         P1MSEL5_0,
 149         P1MSEL4_0, P1MSEL4_1,
 150         P1MSEL3_0, P1MSEL3_1,
 151         P1MSEL2_0, P1MSEL2_1,
 152         P1MSEL1_0, P1MSEL1_1,
 153         P1MSEL0_0, P1MSEL0_1,
 154         P2MSEL2_0, P2MSEL2_1,
 155         P2MSEL1_0, P2MSEL1_1,
 156         P2MSEL0_0, P2MSEL0_1,
 157         PINMUX_FUNCTION_END,
 158
 159         PINMUX_MARK_BEGIN,
 160         D63_AD31_MARK,
 161         D62_AD30_MARK,
 162         D61_AD29_MARK,
 163         D60_AD28_MARK,
 164         D59_AD27_MARK,
 165         D58_AD26_MARK,
 166         D57_AD25_MARK,
 167         D56_AD24_MARK,
 168         D55_AD23_MARK,
 169         D54_AD22_MARK,
 170         D53_AD21_MARK,
 171         D52_AD20_MARK,
 172         D51_AD19_MARK,
 173         D50_AD18_MARK,
 174         D49_AD17_DB5_MARK,
 175         D48_AD16_DB4_MARK,
 176         D47_AD15_DB3_MARK,
 177         D46_AD14_DB2_MARK,
 178         D45_AD13_DB1_MARK,
 179         D44_AD12_DB0_MARK,
 180         D43_AD11_DG5_MARK,
 181         D42_AD10_DG4_MARK,
 182         D41_AD9_DG3_MARK,
 183         D40_AD8_DG2_MARK,
 184         D39_AD7_DG1_MARK,
 185         D38_AD6_DG0_MARK,
 186         D37_AD5_DR5_MARK,
 187         D36_AD4_DR4_MARK,
 188         D35_AD3_DR3_MARK,
 189         D34_AD2_DR2_MARK,
 190         D33_AD1_DR1_MARK,
 191         D32_AD0_DR0_MARK,
 192         REQ1_MARK,
 193         REQ2_MARK,
 194         REQ3_MARK,
 195         GNT1_MARK,
 196         GNT2_MARK,
 197         GNT3_MARK,
 198         MMCCLK_MARK,
 199         D31_MARK,
 200         D30_MARK,
 201         D29_MARK,
 202         D28_MARK,
 203         D27_MARK,
 204         D26_MARK,
 205         D25_MARK,
 206         D24_MARK,
 207         D23_MARK,
 208         D22_MARK,
 209         D21_MARK,
 210         D20_MARK,
 211         D19_MARK,
 212         D18_MARK,
 213         D17_MARK,
 214         D16_MARK,
 215         SCIF1_SCK_MARK,
 216         SCIF1_RXD_MARK,
 217         SCIF1_TXD_MARK,
 218         SCIF0_CTS_MARK,
 219         INTD_MARK,
 220         FCE_MARK,
 221         SCIF0_RTS_MARK,
 222         HSPI_CS_MARK,
 223         FSE_MARK,
 224         SCIF0_SCK_MARK,
 225         HSPI_CLK_MARK,
 226         FRE_MARK,
 227         SCIF0_RXD_MARK,
 228         HSPI_RX_MARK,
 229         FRB_MARK,
 230         SCIF0_TXD_MARK,
 231         HSPI_TX_MARK,
 232         FWE_MARK,
 233         SCIF5_TXD_MARK,
 234         HAC1_SYNC_MARK,
 235         SSI1_WS_MARK,
 236         SIOF_TXD_PJ_MARK,
 237         HAC0_SDOUT_MARK,
 238         SSI0_SDATA_MARK,
 239         SIOF_RXD_PJ_MARK,
 240         HAC0_SDIN_MARK,
 241         SSI0_SCK_MARK,
 242         SIOF_SYNC_PJ_MARK,
 243         HAC0_SYNC_MARK,
 244         SSI0_WS_MARK,
 245         SIOF_MCLK_PJ_MARK,
 246         HAC_RES_MARK,
 247         SIOF_SCK_PJ_MARK,
 248         HAC0_BITCLK_MARK,
 249         SSI0_CLK_MARK,
 250         HAC1_BITCLK_MARK,
 251         SSI1_CLK_MARK,
 252         TCLK_MARK,
 253         IOIS16_MARK,
 254         STATUS0_MARK,
 255         DRAK0_PK3_MARK,
 256         STATUS1_MARK,
 257         DRAK1_PK2_MARK,
 258         DACK2_MARK,
 259         SCIF2_TXD_MARK,
 260         MMCCMD_MARK,
 261         SIOF_TXD_PK_MARK,
 262         DACK3_MARK,
 263         SCIF2_SCK_MARK,
 264         MMCDAT_MARK,
 265         SIOF_SCK_PK_MARK,
 266         DREQ0_MARK,
 267         DREQ1_MARK,
 268         DRAK0_PK1_MARK,
 269         DRAK1_PK0_MARK,
 270         DREQ2_MARK,
 271         INTB_MARK,
 272         DREQ3_MARK,
 273         INTC_MARK,
 274         DRAK2_MARK,
 275         CE2A_MARK,
 276         IRL4_MARK,
 277         FD4_MARK,
 278         IRL5_MARK,
 279         FD5_MARK,
 280         IRL6_MARK,
 281         FD6_MARK,
 282         IRL7_MARK,
 283         FD7_MARK,
 284         DRAK3_MARK,
 285         CE2B_MARK,
 286         BREQ_BSACK_MARK,
 287         BACK_BSREQ_MARK,
 288         SCIF5_RXD_MARK,
 289         HAC1_SDIN_MARK,
 290         SSI1_SCK_MARK,
 291         SCIF5_SCK_MARK,
 292         HAC1_SDOUT_MARK,
 293         SSI1_SDATA_MARK,
 294         SCIF3_TXD_MARK,
 295         FCLE_MARK,
 296         SCIF3_RXD_MARK,
 297         FALE_MARK,
 298         SCIF3_SCK_MARK,
 299         FD0_MARK,
 300         SCIF4_TXD_MARK,
 301         FD1_MARK,
 302         SCIF4_RXD_MARK,
 303         FD2_MARK,
 304         SCIF4_SCK_MARK,
 305         FD3_MARK,
 306         DEVSEL_DCLKOUT_MARK,
 307         STOP_CDE_MARK,
 308         LOCK_ODDF_MARK,
 309         TRDY_DISPL_MARK,
 310         IRDY_HSYNC_MARK,
 311         PCIFRAME_VSYNC_MARK,
 312         INTA_MARK,
 313         GNT0_GNTIN_MARK,
 314         REQ0_REQOUT_MARK,
 315         PERR_MARK,
 316         SERR_MARK,
 317         WE7_CBE3_MARK,
 318         WE6_CBE2_MARK,
 319         WE5_CBE1_MARK,
 320         WE4_CBE0_MARK,
 321         SCIF2_RXD_MARK,
 322         SIOF_RXD_MARK,
 323         MRESETOUT_MARK,
 324         IRQOUT_MARK,
 325         PINMUX_MARK_END,
 326 };
 327
 328 static const u16 pinmux_data[] = {
 329         /* PA GPIO */
 330         PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
 331         PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
 332         PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
 333         PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
 334         PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
 335         PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
 336         PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
 337         PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
 338
 339         /* PB GPIO */
 340         PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
 341         PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
 342         PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
 343         PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
 344         PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
 345         PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
 346         PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
 347         PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
 348
 349         /* PC GPIO */
 350         PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
 351         PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
 352         PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
 353         PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
 354         PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
 355         PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
 356         PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
 357         PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
 358
 359         /* PD GPIO */
 360         PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
 361         PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
 362         PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
 363         PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
 364         PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
 365         PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
 366         PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
 367         PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
 368
 369         /* PE GPIO */
 370         PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
 371         PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
 372         PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
 373         PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
 374         PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
 375         PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
 376
 377         /* PF GPIO */
 378         PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
 379         PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
 380         PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
 381         PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
 382         PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
 383         PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
 384         PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
 385         PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
 386
 387         /* PG GPIO */
 388         PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
 389         PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
 390         PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
 391         PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
 392         PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
 393         PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
 394         PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
 395         PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
 396
 397         /* PH GPIO */
 398         PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT),
 399         PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT),
 400         PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
 401         PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
 402         PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
 403         PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
 404         PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
 405         PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
 406
 407         /* PJ GPIO */
 408         PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT),
 409         PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT),
 410         PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT),
 411         PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT),
 412         PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT),
 413         PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT),
 414         PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT),
 415         PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT),
 416
 417         /* PK GPIO */
 418         PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT),
 419         PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT),
 420         PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT),
 421         PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT),
 422         PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT),
 423         PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT),
 424         PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT),
 425         PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT),
 426
 427         /* PL GPIO */
 428         PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT),
 429         PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT),
 430         PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT),
 431         PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT),
 432         PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT),
 433         PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT),
 434         PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT),
 435         PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT),
 436
 437         /* PM GPIO */
 438         PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT),
 439         PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT),
 440
 441         /* PN GPIO */
 442         PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT),
 443         PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT),
 444         PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT),
 445         PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT),
 446         PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT),
 447         PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT),
 448         PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT),
 449         PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT),
 450
 451         /* PP GPIO */
 452         PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT),
 453         PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT),
 454         PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT),
 455         PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT),
 456         PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT),
 457         PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT),
 458
 459         /* PQ GPIO */
 460         PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT),
 461         PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT),
 462         PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT),
 463         PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT),
 464         PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT),
 465
 466         /* PR GPIO */
 467         PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT),
 468         PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT),
 469         PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT),
 470         PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT),
 471
 472         /* PA FN */
 473         PINMUX_DATA(D63_AD31_MARK, PA7_FN),
 474         PINMUX_DATA(D62_AD30_MARK, PA6_FN),
 475         PINMUX_DATA(D61_AD29_MARK, PA5_FN),
 476         PINMUX_DATA(D60_AD28_MARK, PA4_FN),
 477         PINMUX_DATA(D59_AD27_MARK, PA3_FN),
 478         PINMUX_DATA(D58_AD26_MARK, PA2_FN),
 479         PINMUX_DATA(D57_AD25_MARK, PA1_FN),
 480         PINMUX_DATA(D56_AD24_MARK, PA0_FN),
 481
 482         /* PB FN */
 483         PINMUX_DATA(D55_AD23_MARK, PB7_FN),
 484         PINMUX_DATA(D54_AD22_MARK, PB6_FN),
 485         PINMUX_DATA(D53_AD21_MARK, PB5_FN),
 486         PINMUX_DATA(D52_AD20_MARK, PB4_FN),
 487         PINMUX_DATA(D51_AD19_MARK, PB3_FN),
 488         PINMUX_DATA(D50_AD18_MARK, PB2_FN),
 489         PINMUX_DATA(D49_AD17_DB5_MARK, PB1_FN),
 490         PINMUX_DATA(D48_AD16_DB4_MARK, PB0_FN),
 491
 492         /* PC FN */
 493         PINMUX_DATA(D47_AD15_DB3_MARK, PC7_FN),
 494         PINMUX_DATA(D46_AD14_DB2_MARK, PC6_FN),
 495         PINMUX_DATA(D45_AD13_DB1_MARK, PC5_FN),
 496         PINMUX_DATA(D44_AD12_DB0_MARK, PC4_FN),
 497         PINMUX_DATA(D43_AD11_DG5_MARK, PC3_FN),
 498         PINMUX_DATA(D42_AD10_DG4_MARK, PC2_FN),
 499         PINMUX_DATA(D41_AD9_DG3_MARK, PC1_FN),
 500         PINMUX_DATA(D40_AD8_DG2_MARK, PC0_FN),
 501
 502         /* PD FN */
 503         PINMUX_DATA(D39_AD7_DG1_MARK, PD7_FN),
 504         PINMUX_DATA(D38_AD6_DG0_MARK, PD6_FN),
 505         PINMUX_DATA(D37_AD5_DR5_MARK, PD5_FN),
 506         PINMUX_DATA(D36_AD4_DR4_MARK, PD4_FN),
 507         PINMUX_DATA(D35_AD3_DR3_MARK, PD3_FN),
 508         PINMUX_DATA(D34_AD2_DR2_MARK, PD2_FN),
 509         PINMUX_DATA(D33_AD1_DR1_MARK, PD1_FN),
 510         PINMUX_DATA(D32_AD0_DR0_MARK, PD0_FN),
 511
 512         /* PE FN */
 513         PINMUX_DATA(REQ1_MARK, PE5_FN),
 514         PINMUX_DATA(REQ2_MARK, PE4_FN),
 515         PINMUX_DATA(REQ3_MARK, P2MSEL0_0, PE3_FN),
 516         PINMUX_DATA(GNT1_MARK, PE2_FN),
 517         PINMUX_DATA(GNT2_MARK, PE1_FN),
 518         PINMUX_DATA(GNT3_MARK, P2MSEL0_0, PE0_FN),
 519         PINMUX_DATA(MMCCLK_MARK, P2MSEL0_1, PE0_FN),
 520
 521         /* PF FN */
 522         PINMUX_DATA(D31_MARK, PF7_FN),
 523         PINMUX_DATA(D30_MARK, PF6_FN),
 524         PINMUX_DATA(D29_MARK, PF5_FN),
 525         PINMUX_DATA(D28_MARK, PF4_FN),
 526         PINMUX_DATA(D27_MARK, PF3_FN),
 527         PINMUX_DATA(D26_MARK, PF2_FN),
 528         PINMUX_DATA(D25_MARK, PF1_FN),
 529         PINMUX_DATA(D24_MARK, PF0_FN),
 530
 531         /* PF FN */
 532         PINMUX_DATA(D23_MARK, PG7_FN),
 533         PINMUX_DATA(D22_MARK, PG6_FN),
 534         PINMUX_DATA(D21_MARK, PG5_FN),
 535         PINMUX_DATA(D20_MARK, PG4_FN),
 536         PINMUX_DATA(D19_MARK, PG3_FN),
 537         PINMUX_DATA(D18_MARK, PG2_FN),
 538         PINMUX_DATA(D17_MARK, PG1_FN),
 539         PINMUX_DATA(D16_MARK, PG0_FN),
 540
 541         /* PH FN */
 542         PINMUX_DATA(SCIF1_SCK_MARK, PH7_FN),
 543         PINMUX_DATA(SCIF1_RXD_MARK, PH6_FN),
 544         PINMUX_DATA(SCIF1_TXD_MARK, PH5_FN),
 545         PINMUX_DATA(SCIF0_CTS_MARK, PH4_FN),
 546         PINMUX_DATA(INTD_MARK, P1MSEL7_1, PH4_FN),
 547         PINMUX_DATA(FCE_MARK, P1MSEL8_1, P1MSEL7_0, PH4_FN),
 548         PINMUX_DATA(SCIF0_RTS_MARK, P1MSEL8_0, P1MSEL7_0, PH3_FN),
 549         PINMUX_DATA(HSPI_CS_MARK, P1MSEL8_0, P1MSEL7_1, PH3_FN),
 550         PINMUX_DATA(FSE_MARK, P1MSEL8_1, P1MSEL7_0, PH3_FN),
 551         PINMUX_DATA(SCIF0_SCK_MARK, P1MSEL8_0, P1MSEL7_0, PH2_FN),
 552         PINMUX_DATA(HSPI_CLK_MARK, P1MSEL8_0, P1MSEL7_1, PH2_FN),
 553         PINMUX_DATA(FRE_MARK, P1MSEL8_1, P1MSEL7_0, PH2_FN),
 554         PINMUX_DATA(SCIF0_RXD_MARK, P1MSEL8_0, P1MSEL7_0, PH1_FN),
 555         PINMUX_DATA(HSPI_RX_MARK, P1MSEL8_0, P1MSEL7_1, PH1_FN),
 556         PINMUX_DATA(FRB_MARK, P1MSEL8_1, P1MSEL7_0, PH1_FN),
 557         PINMUX_DATA(SCIF0_TXD_MARK, P1MSEL8_0, P1MSEL7_0, PH0_FN),
 558         PINMUX_DATA(HSPI_TX_MARK, P1MSEL8_0, P1MSEL7_1, PH0_FN),
 559         PINMUX_DATA(FWE_MARK, P1MSEL8_1, P1MSEL7_0, PH0_FN),
 560
 561         /* PJ FN */
 562         PINMUX_DATA(SCIF5_TXD_MARK, P1MSEL2_0, P1MSEL1_0, PJ7_FN),
 563         PINMUX_DATA(HAC1_SYNC_MARK, P1MSEL2_0, P1MSEL1_1, PJ7_FN),
 564         PINMUX_DATA(SSI1_WS_MARK, P1MSEL2_1, P1MSEL1_0, PJ7_FN),
 565         PINMUX_DATA(SIOF_TXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ6_FN),
 566         PINMUX_DATA(HAC0_SDOUT_MARK, P1MSEL4_0, P1MSEL3_1, PJ6_FN),
 567         PINMUX_DATA(SSI0_SDATA_MARK, P1MSEL4_1, P1MSEL3_0, PJ6_FN),
 568         PINMUX_DATA(SIOF_RXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ5_FN),
 569         PINMUX_DATA(HAC0_SDIN_MARK, P1MSEL4_0, P1MSEL3_1, PJ5_FN),
 570         PINMUX_DATA(SSI0_SCK_MARK, P1MSEL4_1, P1MSEL3_0, PJ5_FN),
 571         PINMUX_DATA(SIOF_SYNC_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ4_FN),
 572         PINMUX_DATA(HAC0_SYNC_MARK, P1MSEL4_0, P1MSEL3_1, PJ4_FN),
 573         PINMUX_DATA(SSI0_WS_MARK, P1MSEL4_1, P1MSEL3_0, PJ4_FN),
 574         PINMUX_DATA(SIOF_MCLK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ3_FN),
 575         PINMUX_DATA(HAC_RES_MARK, P1MSEL4_0, P1MSEL3_1, PJ3_FN),
 576         PINMUX_DATA(SIOF_SCK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ2_FN),
 577         PINMUX_DATA(HAC0_BITCLK_MARK, P1MSEL4_0, P1MSEL3_1, PJ2_FN),
 578         PINMUX_DATA(SSI0_CLK_MARK, P1MSEL4_1, P1MSEL3_0, PJ2_FN),
 579         PINMUX_DATA(HAC1_BITCLK_MARK, P1MSEL2_0, PJ1_FN),
 580         PINMUX_DATA(SSI1_CLK_MARK, P1MSEL2_1, P1MSEL1_0, PJ1_FN),
 581         PINMUX_DATA(TCLK_MARK, P1MSEL9_0, PJ0_FN),
 582         PINMUX_DATA(IOIS16_MARK, P1MSEL9_1, PJ0_FN),
 583
 584         /* PK FN */
 585         PINMUX_DATA(STATUS0_MARK, P1MSEL15_0, PK7_FN),
 586         PINMUX_DATA(DRAK0_PK3_MARK, P1MSEL15_1, PK7_FN),
 587         PINMUX_DATA(STATUS1_MARK, P1MSEL15_0, PK6_FN),
 588         PINMUX_DATA(DRAK1_PK2_MARK, P1MSEL15_1, PK6_FN),
 589         PINMUX_DATA(DACK2_MARK, P1MSEL12_0, P1MSEL11_0, PK5_FN),
 590         PINMUX_DATA(SCIF2_TXD_MARK, P1MSEL12_1, P1MSEL11_0, PK5_FN),
 591         PINMUX_DATA(MMCCMD_MARK, P1MSEL12_1, P1MSEL11_1, PK5_FN),
 592         PINMUX_DATA(SIOF_TXD_PK_MARK, P2MSEL1_1,
 593                     P1MSEL12_0, P1MSEL11_1, PK5_FN),
 594         PINMUX_DATA(DACK3_MARK, P1MSEL12_0, P1MSEL11_0, PK4_FN),
 595         PINMUX_DATA(SCIF2_SCK_MARK, P1MSEL12_1, P1MSEL11_0, PK4_FN),
 596         PINMUX_DATA(MMCDAT_MARK, P1MSEL12_1, P1MSEL11_1, PK4_FN),
 597         PINMUX_DATA(SIOF_SCK_PK_MARK, P2MSEL1_1,
 598                     P1MSEL12_0, P1MSEL11_1, PK4_FN),
 599         PINMUX_DATA(DREQ0_MARK, PK3_FN),
 600         PINMUX_DATA(DREQ1_MARK, PK2_FN),
 601         PINMUX_DATA(DRAK0_PK1_MARK, PK1_FN),
 602         PINMUX_DATA(DRAK1_PK0_MARK, PK0_FN),
 603
 604         /* PL FN */
 605         PINMUX_DATA(DREQ2_MARK, P1MSEL13_0, PL7_FN),
 606         PINMUX_DATA(INTB_MARK, P1MSEL13_1, PL7_FN),
 607         PINMUX_DATA(DREQ3_MARK, P1MSEL13_0, PL6_FN),
 608         PINMUX_DATA(INTC_MARK, P1MSEL13_1, PL6_FN),
 609         PINMUX_DATA(DRAK2_MARK, P1MSEL10_0, PL5_FN),
 610         PINMUX_DATA(CE2A_MARK, P1MSEL10_1, PL5_FN),
 611         PINMUX_DATA(IRL4_MARK, P1MSEL14_0, PL4_FN),
 612         PINMUX_DATA(FD4_MARK, P1MSEL14_1, PL4_FN),
 613         PINMUX_DATA(IRL5_MARK, P1MSEL14_0, PL3_FN),
 614         PINMUX_DATA(FD5_MARK, P1MSEL14_1, PL3_FN),
 615         PINMUX_DATA(IRL6_MARK, P1MSEL14_0, PL2_FN),
 616         PINMUX_DATA(FD6_MARK, P1MSEL14_1, PL2_FN),
 617         PINMUX_DATA(IRL7_MARK, P1MSEL14_0, PL1_FN),
 618         PINMUX_DATA(FD7_MARK, P1MSEL14_1, PL1_FN),
 619         PINMUX_DATA(DRAK3_MARK, P1MSEL10_0, PL0_FN),
 620         PINMUX_DATA(CE2B_MARK, P1MSEL10_1, PL0_FN),
 621
 622         /* PM FN */
 623         PINMUX_DATA(BREQ_BSACK_MARK, PM1_FN),
 624         PINMUX_DATA(BACK_BSREQ_MARK, PM0_FN),
 625
 626         /* PN FN */
 627         PINMUX_DATA(SCIF5_RXD_MARK, P1MSEL2_0, P1MSEL1_0, PN7_FN),
 628         PINMUX_DATA(HAC1_SDIN_MARK, P1MSEL2_0, P1MSEL1_1, PN7_FN),
 629         PINMUX_DATA(SSI1_SCK_MARK, P1MSEL2_1, P1MSEL1_0, PN7_FN),
 630         PINMUX_DATA(SCIF5_SCK_MARK, P1MSEL2_0, P1MSEL1_0, PN6_FN),
 631         PINMUX_DATA(HAC1_SDOUT_MARK, P1MSEL2_0, P1MSEL1_1, PN6_FN),
 632         PINMUX_DATA(SSI1_SDATA_MARK, P1MSEL2_1, P1MSEL1_0, PN6_FN),
 633         PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL0_0, PN5_FN),
 634         PINMUX_DATA(FCLE_MARK, P1MSEL0_1, PN5_FN),
 635         PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL0_0, PN4_FN),
 636         PINMUX_DATA(FALE_MARK, P1MSEL0_1, PN4_FN),
 637         PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL0_0, PN3_FN),
 638         PINMUX_DATA(FD0_MARK, P1MSEL0_1, PN3_FN),
 639         PINMUX_DATA(SCIF4_TXD_MARK, P1MSEL0_0, PN2_FN),
 640         PINMUX_DATA(FD1_MARK, P1MSEL0_1, PN2_FN),
 641         PINMUX_DATA(SCIF4_RXD_MARK, P1MSEL0_0, PN1_FN),
 642         PINMUX_DATA(FD2_MARK, P1MSEL0_1, PN1_FN),
 643         PINMUX_DATA(SCIF4_SCK_MARK, P1MSEL0_0, PN0_FN),
 644         PINMUX_DATA(FD3_MARK, P1MSEL0_1, PN0_FN),
 645
 646         /* PP FN */
 647         PINMUX_DATA(DEVSEL_DCLKOUT_MARK, PP5_FN),
 648         PINMUX_DATA(STOP_CDE_MARK, PP4_FN),
 649         PINMUX_DATA(LOCK_ODDF_MARK, PP3_FN),
 650         PINMUX_DATA(TRDY_DISPL_MARK, PP2_FN),
 651         PINMUX_DATA(IRDY_HSYNC_MARK, PP1_FN),
 652         PINMUX_DATA(PCIFRAME_VSYNC_MARK, PP0_FN),
 653
 654         /* PQ FN */
 655         PINMUX_DATA(INTA_MARK, PQ4_FN),
 656         PINMUX_DATA(GNT0_GNTIN_MARK, PQ3_FN),
 657         PINMUX_DATA(REQ0_REQOUT_MARK, PQ2_FN),
 658         PINMUX_DATA(PERR_MARK, PQ1_FN),
 659         PINMUX_DATA(SERR_MARK, PQ0_FN),
 660
 661         /* PR FN */
 662         PINMUX_DATA(WE7_CBE3_MARK, PR3_FN),
 663         PINMUX_DATA(WE6_CBE2_MARK, PR2_FN),
 664         PINMUX_DATA(WE5_CBE1_MARK, PR1_FN),
 665         PINMUX_DATA(WE4_CBE0_MARK, PR0_FN),
 666
 667         /* MISC FN */
 668         PINMUX_DATA(SCIF2_RXD_MARK, P1MSEL6_0, P1MSEL5_0),
 669         PINMUX_DATA(SIOF_RXD_MARK, P2MSEL1_1, P1MSEL6_1, P1MSEL5_0),
 670         PINMUX_DATA(MRESETOUT_MARK, P2MSEL2_0),
 671         PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1),
 672 };
 673
 674 static const struct sh_pfc_pin pinmux_pins[] = {
 675         /* PA */
 676         PINMUX_GPIO(PA7),
 677         PINMUX_GPIO(PA6),
 678         PINMUX_GPIO(PA5),
 679         PINMUX_GPIO(PA4),
 680         PINMUX_GPIO(PA3),
 681         PINMUX_GPIO(PA2),
 682         PINMUX_GPIO(PA1),
 683         PINMUX_GPIO(PA0),
 684
 685         /* PB */
 686         PINMUX_GPIO(PB7),
 687         PINMUX_GPIO(PB6),
 688         PINMUX_GPIO(PB5),
 689         PINMUX_GPIO(PB4),
 690         PINMUX_GPIO(PB3),
 691         PINMUX_GPIO(PB2),
 692         PINMUX_GPIO(PB1),
 693         PINMUX_GPIO(PB0),
 694
 695         /* PC */
 696         PINMUX_GPIO(PC7),
 697         PINMUX_GPIO(PC6),
 698         PINMUX_GPIO(PC5),
 699         PINMUX_GPIO(PC4),
 700         PINMUX_GPIO(PC3),
 701         PINMUX_GPIO(PC2),
 702         PINMUX_GPIO(PC1),
 703         PINMUX_GPIO(PC0),
 704
 705         /* PD */
 706         PINMUX_GPIO(PD7),
 707         PINMUX_GPIO(PD6),
 708         PINMUX_GPIO(PD5),
 709         PINMUX_GPIO(PD4),
 710         PINMUX_GPIO(PD3),
 711         PINMUX_GPIO(PD2),
 712         PINMUX_GPIO(PD1),
 713         PINMUX_GPIO(PD0),
 714
 715         /* PE */
 716         PINMUX_GPIO(PE5),
 717         PINMUX_GPIO(PE4),
 718         PINMUX_GPIO(PE3),
 719         PINMUX_GPIO(PE2),
 720         PINMUX_GPIO(PE1),
 721         PINMUX_GPIO(PE0),
 722
 723         /* PF */
 724         PINMUX_GPIO(PF7),
 725         PINMUX_GPIO(PF6),
 726         PINMUX_GPIO(PF5),
 727         PINMUX_GPIO(PF4),
 728         PINMUX_GPIO(PF3),
 729         PINMUX_GPIO(PF2),
 730         PINMUX_GPIO(PF1),
 731         PINMUX_GPIO(PF0),
 732
 733         /* PG */
 734         PINMUX_GPIO(PG7),
 735         PINMUX_GPIO(PG6),
 736         PINMUX_GPIO(PG5),
 737         PINMUX_GPIO(PG4),
 738         PINMUX_GPIO(PG3),
 739         PINMUX_GPIO(PG2),
 740         PINMUX_GPIO(PG1),
 741         PINMUX_GPIO(PG0),
 742
 743         /* PH */
 744         PINMUX_GPIO(PH7),
 745         PINMUX_GPIO(PH6),
 746         PINMUX_GPIO(PH5),
 747         PINMUX_GPIO(PH4),
 748         PINMUX_GPIO(PH3),
 749         PINMUX_GPIO(PH2),
 750         PINMUX_GPIO(PH1),
 751         PINMUX_GPIO(PH0),
 752
 753         /* PJ */
 754         PINMUX_GPIO(PJ7),
 755         PINMUX_GPIO(PJ6),
 756         PINMUX_GPIO(PJ5),
 757         PINMUX_GPIO(PJ4),
 758         PINMUX_GPIO(PJ3),
 759         PINMUX_GPIO(PJ2),
 760         PINMUX_GPIO(PJ1),
 761         PINMUX_GPIO(PJ0),
 762
 763         /* PK */
 764         PINMUX_GPIO(PK7),
 765         PINMUX_GPIO(PK6),
 766         PINMUX_GPIO(PK5),
 767         PINMUX_GPIO(PK4),
 768         PINMUX_GPIO(PK3),
 769         PINMUX_GPIO(PK2),
 770         PINMUX_GPIO(PK1),
 771         PINMUX_GPIO(PK0),
 772
 773         /* PL */
 774         PINMUX_GPIO(PL7),
 775         PINMUX_GPIO(PL6),
 776         PINMUX_GPIO(PL5),
 777         PINMUX_GPIO(PL4),
 778         PINMUX_GPIO(PL3),
 779         PINMUX_GPIO(PL2),
 780         PINMUX_GPIO(PL1),
 781         PINMUX_GPIO(PL0),
 782
 783         /* PM */
 784         PINMUX_GPIO(PM1),
 785         PINMUX_GPIO(PM0),
 786
 787         /* PN */
 788         PINMUX_GPIO(PN7),
 789         PINMUX_GPIO(PN6),
 790         PINMUX_GPIO(PN5),
 791         PINMUX_GPIO(PN4),
 792         PINMUX_GPIO(PN3),
 793         PINMUX_GPIO(PN2),
 794         PINMUX_GPIO(PN1),
 795         PINMUX_GPIO(PN0),
 796
 797         /* PP */
 798         PINMUX_GPIO(PP5),
 799         PINMUX_GPIO(PP4),
 800         PINMUX_GPIO(PP3),
 801         PINMUX_GPIO(PP2),
 802         PINMUX_GPIO(PP1),
 803         PINMUX_GPIO(PP0),
 804
 805         /* PQ */
 806         PINMUX_GPIO(PQ4),
 807         PINMUX_GPIO(PQ3),
 808         PINMUX_GPIO(PQ2),
 809         PINMUX_GPIO(PQ1),
 810         PINMUX_GPIO(PQ0),
 811
 812         /* PR */
 813         PINMUX_GPIO(PR3),
 814         PINMUX_GPIO(PR2),
 815         PINMUX_GPIO(PR1),
 816         PINMUX_GPIO(PR0),
 817 };
 818
 819 #define PINMUX_FN_BASE  ARRAY_SIZE(pinmux_pins)
 820
 821 static const struct pinmux_func pinmux_func_gpios[] = {
 822         /* FN */
 823         GPIO_FN(D63_AD31),
 824         GPIO_FN(D62_AD30),
 825         GPIO_FN(D61_AD29),
 826         GPIO_FN(D60_AD28),
 827         GPIO_FN(D59_AD27),
 828         GPIO_FN(D58_AD26),
 829         GPIO_FN(D57_AD25),
 830         GPIO_FN(D56_AD24),
 831         GPIO_FN(D55_AD23),
 832         GPIO_FN(D54_AD22),
 833         GPIO_FN(D53_AD21),
 834         GPIO_FN(D52_AD20),
 835         GPIO_FN(D51_AD19),
 836         GPIO_FN(D50_AD18),
 837         GPIO_FN(D49_AD17_DB5),
 838         GPIO_FN(D48_AD16_DB4),
 839         GPIO_FN(D47_AD15_DB3),
 840         GPIO_FN(D46_AD14_DB2),
 841         GPIO_FN(D45_AD13_DB1),
 842         GPIO_FN(D44_AD12_DB0),
 843         GPIO_FN(D43_AD11_DG5),
 844         GPIO_FN(D42_AD10_DG4),
 845         GPIO_FN(D41_AD9_DG3),
 846         GPIO_FN(D40_AD8_DG2),
 847         GPIO_FN(D39_AD7_DG1),
 848         GPIO_FN(D38_AD6_DG0),
 849         GPIO_FN(D37_AD5_DR5),
 850         GPIO_FN(D36_AD4_DR4),
 851         GPIO_FN(D35_AD3_DR3),
 852         GPIO_FN(D34_AD2_DR2),
 853         GPIO_FN(D33_AD1_DR1),
 854         GPIO_FN(D32_AD0_DR0),
 855         GPIO_FN(REQ1),
 856         GPIO_FN(REQ2),
 857         GPIO_FN(REQ3),
 858         GPIO_FN(GNT1),
 859         GPIO_FN(GNT2),
 860         GPIO_FN(GNT3),
 861         GPIO_FN(MMCCLK),
 862         GPIO_FN(D31),
 863         GPIO_FN(D30),
 864         GPIO_FN(D29),
 865         GPIO_FN(D28),
 866         GPIO_FN(D27),
 867         GPIO_FN(D26),
 868         GPIO_FN(D25),
 869         GPIO_FN(D24),
 870         GPIO_FN(D23),
 871         GPIO_FN(D22),
 872         GPIO_FN(D21),
 873         GPIO_FN(D20),
 874         GPIO_FN(D19),
 875         GPIO_FN(D18),
 876         GPIO_FN(D17),
 877         GPIO_FN(D16),
 878         GPIO_FN(SCIF1_SCK),
 879         GPIO_FN(SCIF1_RXD),
 880         GPIO_FN(SCIF1_TXD),
 881         GPIO_FN(SCIF0_CTS),
 882         GPIO_FN(INTD),
 883         GPIO_FN(FCE),
 884         GPIO_FN(SCIF0_RTS),
 885         GPIO_FN(HSPI_CS),
 886         GPIO_FN(FSE),
 887         GPIO_FN(SCIF0_SCK),
 888         GPIO_FN(HSPI_CLK),
 889         GPIO_FN(FRE),
 890         GPIO_FN(SCIF0_RXD),
 891         GPIO_FN(HSPI_RX),
 892         GPIO_FN(FRB),
 893         GPIO_FN(SCIF0_TXD),
 894         GPIO_FN(HSPI_TX),
 895         GPIO_FN(FWE),
 896         GPIO_FN(SCIF5_TXD),
 897         GPIO_FN(HAC1_SYNC),
 898         GPIO_FN(SSI1_WS),
 899         GPIO_FN(SIOF_TXD_PJ),
 900         GPIO_FN(HAC0_SDOUT),
 901         GPIO_FN(SSI0_SDATA),
 902         GPIO_FN(SIOF_RXD_PJ),
 903         GPIO_FN(HAC0_SDIN),
 904         GPIO_FN(SSI0_SCK),
 905         GPIO_FN(SIOF_SYNC_PJ),
 906         GPIO_FN(HAC0_SYNC),
 907         GPIO_FN(SSI0_WS),
 908         GPIO_FN(SIOF_MCLK_PJ),
 909         GPIO_FN(HAC_RES),
 910         GPIO_FN(SIOF_SCK_PJ),
 911         GPIO_FN(HAC0_BITCLK),
 912         GPIO_FN(SSI0_CLK),
 913         GPIO_FN(HAC1_BITCLK),
 914         GPIO_FN(SSI1_CLK),
 915         GPIO_FN(TCLK),
 916         GPIO_FN(IOIS16),
 917         GPIO_FN(STATUS0),
 918         GPIO_FN(DRAK0_PK3),
 919         GPIO_FN(STATUS1),
 920         GPIO_FN(DRAK1_PK2),
 921         GPIO_FN(DACK2),
 922         GPIO_FN(SCIF2_TXD),
 923         GPIO_FN(MMCCMD),
 924         GPIO_FN(SIOF_TXD_PK),
 925         GPIO_FN(DACK3),
 926         GPIO_FN(SCIF2_SCK),
 927         GPIO_FN(MMCDAT),
 928         GPIO_FN(SIOF_SCK_PK),
 929         GPIO_FN(DREQ0),
 930         GPIO_FN(DREQ1),
 931         GPIO_FN(DRAK0_PK1),
 932         GPIO_FN(DRAK1_PK0),
 933         GPIO_FN(DREQ2),
 934         GPIO_FN(INTB),
 935         GPIO_FN(DREQ3),
 936         GPIO_FN(INTC),
 937         GPIO_FN(DRAK2),
 938         GPIO_FN(CE2A),
 939         GPIO_FN(IRL4),
 940         GPIO_FN(FD4),
 941         GPIO_FN(IRL5),
 942         GPIO_FN(FD5),
 943         GPIO_FN(IRL6),
 944         GPIO_FN(FD6),
 945         GPIO_FN(IRL7),
 946         GPIO_FN(FD7),
 947         GPIO_FN(DRAK3),
 948         GPIO_FN(CE2B),
 949         GPIO_FN(BREQ_BSACK),
 950         GPIO_FN(BACK_BSREQ),
 951         GPIO_FN(SCIF5_RXD),
 952         GPIO_FN(HAC1_SDIN),
 953         GPIO_FN(SSI1_SCK),
 954         GPIO_FN(SCIF5_SCK),
 955         GPIO_FN(HAC1_SDOUT),
 956         GPIO_FN(SSI1_SDATA),
 957         GPIO_FN(SCIF3_TXD),
 958         GPIO_FN(FCLE),
 959         GPIO_FN(SCIF3_RXD),
 960         GPIO_FN(FALE),
 961         GPIO_FN(SCIF3_SCK),
 962         GPIO_FN(FD0),
 963         GPIO_FN(SCIF4_TXD),
 964         GPIO_FN(FD1),
 965         GPIO_FN(SCIF4_RXD),
 966         GPIO_FN(FD2),
 967         GPIO_FN(SCIF4_SCK),
 968         GPIO_FN(FD3),
 969         GPIO_FN(DEVSEL_DCLKOUT),
 970         GPIO_FN(STOP_CDE),
 971         GPIO_FN(LOCK_ODDF),
 972         GPIO_FN(TRDY_DISPL),
 973         GPIO_FN(IRDY_HSYNC),
 974         GPIO_FN(PCIFRAME_VSYNC),
 975         GPIO_FN(INTA),
 976         GPIO_FN(GNT0_GNTIN),
 977         GPIO_FN(REQ0_REQOUT),
 978         GPIO_FN(PERR),
 979         GPIO_FN(SERR),
 980         GPIO_FN(WE7_CBE3),
 981         GPIO_FN(WE6_CBE2),
 982         GPIO_FN(WE5_CBE1),
 983         GPIO_FN(WE4_CBE0),
 984         GPIO_FN(SCIF2_RXD),
 985         GPIO_FN(SIOF_RXD),
 986         GPIO_FN(MRESETOUT),
 987         GPIO_FN(IRQOUT),
 988 };
 989
 990 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 991         { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) {
 992                 PA7_FN, PA7_OUT, PA7_IN, 0,
 993                 PA6_FN, PA6_OUT, PA6_IN, 0,
 994                 PA5_FN, PA5_OUT, PA5_IN, 0,
 995                 PA4_FN, PA4_OUT, PA4_IN, 0,
 996                 PA3_FN, PA3_OUT, PA3_IN, 0,
 997                 PA2_FN, PA2_OUT, PA2_IN, 0,
 998                 PA1_FN, PA1_OUT, PA1_IN, 0,
 999                 PA0_FN, PA0_OUT, PA0_IN, 0 }
1000         },
1001         { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2) {
1002                 PB7_FN, PB7_OUT, PB7_IN, 0,
1003                 PB6_FN, PB6_OUT, PB6_IN, 0,
1004                 PB5_FN, PB5_OUT, PB5_IN, 0,
1005                 PB4_FN, PB4_OUT, PB4_IN, 0,
1006                 PB3_FN, PB3_OUT, PB3_IN, 0,
1007                 PB2_FN, PB2_OUT, PB2_IN, 0,
1008                 PB1_FN, PB1_OUT, PB1_IN, 0,
1009                 PB0_FN, PB0_OUT, PB0_IN, 0 }
1010         },
1011         { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2) {
1012                 PC7_FN, PC7_OUT, PC7_IN, 0,
1013                 PC6_FN, PC6_OUT, PC6_IN, 0,
1014                 PC5_FN, PC5_OUT, PC5_IN, 0,
1015                 PC4_FN, PC4_OUT, PC4_IN, 0,
1016                 PC3_FN, PC3_OUT, PC3_IN, 0,
1017                 PC2_FN, PC2_OUT, PC2_IN, 0,
1018                 PC1_FN, PC1_OUT, PC1_IN, 0,
1019                 PC0_FN, PC0_OUT, PC0_IN, 0 }
1020         },
1021         { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2) {
1022                 PD7_FN, PD7_OUT, PD7_IN, 0,
1023                 PD6_FN, PD6_OUT, PD6_IN, 0,
1024                 PD5_FN, PD5_OUT, PD5_IN, 0,
1025                 PD4_FN, PD4_OUT, PD4_IN, 0,
1026                 PD3_FN, PD3_OUT, PD3_IN, 0,
1027                 PD2_FN, PD2_OUT, PD2_IN, 0,
1028                 PD1_FN, PD1_OUT, PD1_IN, 0,
1029                 PD0_FN, PD0_OUT, PD0_IN, 0 }
1030         },
1031         { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2) {
1032                 0, 0, 0, 0,
1033                 0, 0, 0, 0,
1034                 PE5_FN, PE5_OUT, PE5_IN, 0,
1035                 PE4_FN, PE4_OUT, PE4_IN, 0,
1036                 PE3_FN, PE3_OUT, PE3_IN, 0,
1037                 PE2_FN, PE2_OUT, PE2_IN, 0,
1038                 PE1_FN, PE1_OUT, PE1_IN, 0,
1039                 PE0_FN, PE0_OUT, PE0_IN, 0 }
1040         },
1041         { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2) {
1042                 PF7_FN, PF7_OUT, PF7_IN, 0,
1043                 PF6_FN, PF6_OUT, PF6_IN, 0,
1044                 PF5_FN, PF5_OUT, PF5_IN, 0,
1045                 PF4_FN, PF4_OUT, PF4_IN, 0,
1046                 PF3_FN, PF3_OUT, PF3_IN, 0,
1047                 PF2_FN, PF2_OUT, PF2_IN, 0,
1048                 PF1_FN, PF1_OUT, PF1_IN, 0,
1049                 PF0_FN, PF0_OUT, PF0_IN, 0 }
1050         },
1051         { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2) {
1052                 PG7_FN, PG7_OUT, PG7_IN, 0,
1053                 PG6_FN, PG6_OUT, PG6_IN, 0,
1054                 PG5_FN, PG5_OUT, PG5_IN, 0,
1055                 PG4_FN, PG4_OUT, PG4_IN, 0,
1056                 PG3_FN, PG3_OUT, PG3_IN, 0,
1057                 PG2_FN, PG2_OUT, PG2_IN, 0,
1058                 PG1_FN, PG1_OUT, PG1_IN, 0,
1059                 PG0_FN, PG0_OUT, PG0_IN, 0 }
1060         },
1061         { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2) {
1062                 PH7_FN, PH7_OUT, PH7_IN, 0,
1063                 PH6_FN, PH6_OUT, PH6_IN, 0,
1064                 PH5_FN, PH5_OUT, PH5_IN, 0,
1065                 PH4_FN, PH4_OUT, PH4_IN, 0,
1066                 PH3_FN, PH3_OUT, PH3_IN, 0,
1067                 PH2_FN, PH2_OUT, PH2_IN, 0,
1068                 PH1_FN, PH1_OUT, PH1_IN, 0,
1069                 PH0_FN, PH0_OUT, PH0_IN, 0 }
1070         },
1071         { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2) {
1072                 PJ7_FN, PJ7_OUT, PJ7_IN, 0,
1073                 PJ6_FN, PJ6_OUT, PJ6_IN, 0,
1074                 PJ5_FN, PJ5_OUT, PJ5_IN, 0,
1075                 PJ4_FN, PJ4_OUT, PJ4_IN, 0,
1076                 PJ3_FN, PJ3_OUT, PJ3_IN, 0,
1077                 PJ2_FN, PJ2_OUT, PJ2_IN, 0,
1078                 PJ1_FN, PJ1_OUT, PJ1_IN, 0,
1079                 PJ0_FN, PJ0_OUT, PJ0_IN, 0 }
1080         },
1081         { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2) {
1082                 PK7_FN, PK7_OUT, PK7_IN, 0,
1083                 PK6_FN, PK6_OUT, PK6_IN, 0,
1084                 PK5_FN, PK5_OUT, PK5_IN, 0,
1085                 PK4_FN, PK4_OUT, PK4_IN, 0,
1086                 PK3_FN, PK3_OUT, PK3_IN, 0,
1087                 PK2_FN, PK2_OUT, PK2_IN, 0,
1088                 PK1_FN, PK1_OUT, PK1_IN, 0,
1089                 PK0_FN, PK0_OUT, PK0_IN, 0 }
1090         },
1091         { PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2) {
1092                 PL7_FN, PL7_OUT, PL7_IN, 0,
1093                 PL6_FN, PL6_OUT, PL6_IN, 0,
1094                 PL5_FN, PL5_OUT, PL5_IN, 0,
1095                 PL4_FN, PL4_OUT, PL4_IN, 0,
1096                 PL3_FN, PL3_OUT, PL3_IN, 0,
1097                 PL2_FN, PL2_OUT, PL2_IN, 0,
1098                 PL1_FN, PL1_OUT, PL1_IN, 0,
1099                 PL0_FN, PL0_OUT, PL0_IN, 0 }
1100         },
1101         { PINMUX_CFG_REG("PMCR", 0xffe70016, 16, 2) {
1102                 0, 0, 0, 0,
1103                 0, 0, 0, 0,
1104                 0, 0, 0, 0,
1105                 0, 0, 0, 0,
1106                 0, 0, 0, 0,
1107                 0, 0, 0, 0,
1108                 PM1_FN, PM1_OUT, PM1_IN, 0,
1109                 PM0_FN, PM0_OUT, PM0_IN, 0 }
1110         },
1111         { PINMUX_CFG_REG("PNCR", 0xffe70018, 16, 2) {
1112                 PN7_FN, PN7_OUT, PN7_IN, 0,
1113                 PN6_FN, PN6_OUT, PN6_IN, 0,
1114                 PN5_FN, PN5_OUT, PN5_IN, 0,
1115                 PN4_FN, PN4_OUT, PN4_IN, 0,
1116                 PN3_FN, PN3_OUT, PN3_IN, 0,
1117                 PN2_FN, PN2_OUT, PN2_IN, 0,
1118                 PN1_FN, PN1_OUT, PN1_IN, 0,
1119                 PN0_FN, PN0_OUT, PN0_IN, 0 }
1120         },
1121         { PINMUX_CFG_REG("PPCR", 0xffe7001a, 16, 2) {
1122                 0, 0, 0, 0,
1123                 0, 0, 0, 0,
1124                 PP5_FN, PP5_OUT, PP5_IN, 0,
1125                 PP4_FN, PP4_OUT, PP4_IN, 0,
1126                 PP3_FN, PP3_OUT, PP3_IN, 0,
1127                 PP2_FN, PP2_OUT, PP2_IN, 0,
1128                 PP1_FN, PP1_OUT, PP1_IN, 0,
1129                 PP0_FN, PP0_OUT, PP0_IN, 0 }
1130         },
1131         { PINMUX_CFG_REG("PQCR", 0xffe7001c, 16, 2) {
1132                 0, 0, 0, 0,
1133                 0, 0, 0, 0,
1134                 0, 0, 0, 0,
1135                 PQ4_FN, PQ4_OUT, PQ4_IN, 0,
1136                 PQ3_FN, PQ3_OUT, PQ3_IN, 0,
1137                 PQ2_FN, PQ2_OUT, PQ2_IN, 0,
1138                 PQ1_FN, PQ1_OUT, PQ1_IN, 0,
1139                 PQ0_FN, PQ0_OUT, PQ0_IN, 0 }
1140         },
1141         { PINMUX_CFG_REG("PRCR", 0xffe7001e, 16, 2) {
1142                 0, 0, 0, 0,
1143                 0, 0, 0, 0,
1144                 0, 0, 0, 0,
1145                 0, 0, 0, 0,
1146                 PR3_FN, PR3_OUT, PR3_IN, 0,
1147                 PR2_FN, PR2_OUT, PR2_IN, 0,
1148                 PR1_FN, PR1_OUT, PR1_IN, 0,
1149                 PR0_FN, PR0_OUT, PR0_IN, 0 }
1150         },
1151         { PINMUX_CFG_REG("P1MSELR", 0xffe70080, 16, 1) {
1152                 P1MSEL15_0, P1MSEL15_1,
1153                 P1MSEL14_0, P1MSEL14_1,
1154                 P1MSEL13_0, P1MSEL13_1,
1155                 P1MSEL12_0, P1MSEL12_1,
1156                 P1MSEL11_0, P1MSEL11_1,
1157                 P1MSEL10_0, P1MSEL10_1,
1158                 P1MSEL9_0, P1MSEL9_1,
1159                 P1MSEL8_0, P1MSEL8_1,
1160                 P1MSEL7_0, P1MSEL7_1,
1161                 P1MSEL6_0, P1MSEL6_1,
1162                 P1MSEL5_0, 0,
1163                 P1MSEL4_0, P1MSEL4_1,
1164                 P1MSEL3_0, P1MSEL3_1,
1165                 P1MSEL2_0, P1MSEL2_1,
1166                 P1MSEL1_0, P1MSEL1_1,
1167                 P1MSEL0_0, P1MSEL0_1 }
1168         },
1169         { PINMUX_CFG_REG("P2MSELR", 0xffe70082, 16, 1) {
1170                 0, 0,
1171                 0, 0,
1172                 0, 0,
1173                 0, 0,
1174                 0, 0,
1175                 0, 0,
1176                 0, 0,
1177                 0, 0,
1178                 0, 0,
1179                 0, 0,
1180                 0, 0,
1181                 0, 0,
1182                 0, 0,
1183                 P2MSEL2_0, P2MSEL2_1,
1184                 P2MSEL1_0, P2MSEL1_1,
1185                 P2MSEL0_0, P2MSEL0_1 }
1186         },
1187         {}
1188 };
1189
1190 static const struct pinmux_data_reg pinmux_data_regs[] = {
1191         { PINMUX_DATA_REG("PADR", 0xffe70020, 8) {
1192                 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1193                 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1194         },
1195         { PINMUX_DATA_REG("PBDR", 0xffe70022, 8) {
1196                 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1197                 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1198         },
1199         { PINMUX_DATA_REG("PCDR", 0xffe70024, 8) {
1200                 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1201                 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1202         },
1203         { PINMUX_DATA_REG("PDDR", 0xffe70026, 8) {
1204                 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1205                 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1206         },
1207         { PINMUX_DATA_REG("PEDR", 0xffe70028, 8) {
1208                 0, 0, PE5_DATA, PE4_DATA,
1209                 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1210         },
1211         { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8) {
1212                 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1213                 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1214         },
1215         { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8) {
1216                 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
1217                 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
1218         },
1219         { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8) {
1220                 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
1221                 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
1222         },
1223         { PINMUX_DATA_REG("PJDR", 0xffe70030, 8) {
1224                 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
1225                 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
1226         },
1227         { PINMUX_DATA_REG("PKDR", 0xffe70032, 8) {
1228                 PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
1229                 PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
1230         },
1231         { PINMUX_DATA_REG("PLDR", 0xffe70034, 8) {
1232                 PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
1233                 PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA }
1234         },
1235         { PINMUX_DATA_REG("PMDR", 0xffe70036, 8) {
1236                 0, 0, 0, 0,
1237                 0, 0, PM1_DATA, PM0_DATA }
1238         },
1239         { PINMUX_DATA_REG("PNDR", 0xffe70038, 8) {
1240                 PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
1241                 PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA }
1242         },
1243         { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8) {
1244                 0, 0, PP5_DATA, PP4_DATA,
1245                 PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA }
1246         },
1247         { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8) {
1248                 0, 0, 0, PQ4_DATA,
1249                 PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA }
1250         },
1251         { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8) {
1252                 0, 0, 0, 0,
1253                 PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA }
1254         },
1255         { },
1256 };
1257
1258 const struct sh_pfc_soc_info sh7785_pinmux_info = {
1259         .name = "sh7785_pfc",
1260         .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1261         .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1262         .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1263
1264         .pins = pinmux_pins,
1265         .nr_pins = ARRAY_SIZE(pinmux_pins),
1266         .func_gpios = pinmux_func_gpios,
1267         .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
1268
1269         .cfg_regs = pinmux_config_regs,
1270         .data_regs = pinmux_data_regs,
1271
1272         .gpio_data = pinmux_data,
1273         .gpio_data_size = ARRAY_SIZE(pinmux_data),
1274 };