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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[linux/fpc-iii.git] / drivers / staging / sm7xxfb / sm7xxfb.c
blob6176d98744cc669a1d11305f5bc34631f1a55525
1 /*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
10 *
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
16 * more details.
17 *
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
19 */
20
21 #include <linux/io.h>
22 #include <linux/fb.h>
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/module.h>
28 #include <linux/console.h>
29 #include <linux/screen_info.h>
30
31 #ifdef CONFIG_PM
32 #include <linux/pm.h>
33 #endif
34
35 #include "sm7xx.h"
36
37 /*
38 * Private structure
39 */
40 struct smtcfb_info {
41 struct pci_dev *pdev;
42 struct fb_info fb;
43 u16 chip_id;
44 u8 chip_rev_id;
45
46 void __iomem *lfb; /* linear frame buffer */
47 void __iomem *dp_regs; /* drawing processor control regs */
48 void __iomem *vp_regs; /* video processor control regs */
49 void __iomem *cp_regs; /* capture processor control regs */
50 void __iomem *mmio; /* memory map IO port */
51
52 u_int width;
53 u_int height;
54 u_int hz;
55
56 u32 colreg[17];
57 };
58
59 void __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
60
61 static struct fb_var_screeninfo smtcfb_var = {
62 .xres = 1024,
63 .yres = 600,
64 .xres_virtual = 1024,
65 .yres_virtual = 600,
66 .bits_per_pixel = 16,
67 .red = {16, 8, 0},
68 .green = {8, 8, 0},
69 .blue = {0, 8, 0},
70 .activate = FB_ACTIVATE_NOW,
71 .height = -1,
72 .width = -1,
73 .vmode = FB_VMODE_NONINTERLACED,
74 .nonstd = 0,
75 .accel_flags = FB_ACCELF_TEXT,
76 };
77
78 static struct fb_fix_screeninfo smtcfb_fix = {
79 .id = "smXXXfb",
80 .type = FB_TYPE_PACKED_PIXELS,
81 .visual = FB_VISUAL_TRUECOLOR,
82 .line_length = 800 * 3,
83 .accel = FB_ACCEL_SMI_LYNX,
84 .type_aux = 0,
85 .xpanstep = 0,
86 .ypanstep = 0,
87 .ywrapstep = 0,
88 };
89
90 struct vesa_mode {
91 char index[6];
92 u16 lfb_width;
93 u16 lfb_height;
94 u16 lfb_depth;
95 };
96
97 static struct vesa_mode vesa_mode_table[] = {
98 {"0x301", 640, 480, 8},
99 {"0x303", 800, 600, 8},
100 {"0x305", 1024, 768, 8},
101 {"0x307", 1280, 1024, 8},
102
103 {"0x311", 640, 480, 16},
104 {"0x314", 800, 600, 16},
105 {"0x317", 1024, 768, 16},
106 {"0x31A", 1280, 1024, 16},
107
108 {"0x312", 640, 480, 24},
109 {"0x315", 800, 600, 24},
110 {"0x318", 1024, 768, 24},
111 {"0x31B", 1280, 1024, 24},
112 };
113
114 struct screen_info smtc_scr_info;
115
116 /* process command line options, get vga parameter */
117 static int __init sm7xx_vga_setup(char *options)
118 {
119 int i;
120
121 if (!options || !*options)
122 return -EINVAL;
123
124 smtc_scr_info.lfb_width = 0;
125 smtc_scr_info.lfb_height = 0;
126 smtc_scr_info.lfb_depth = 0;
127
128 pr_debug("sm7xx_vga_setup = %s\n", options);
129
130 for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
131 if (strstr(options, vesa_mode_table[i].index)) {
132 smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
133 smtc_scr_info.lfb_height =
134 vesa_mode_table[i].lfb_height;
135 smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
136 return 0;
137 }
138 }
139
140 return -1;
141 }
142 __setup("vga=", sm7xx_vga_setup);
143
144 static void sm712_setpalette(int regno, unsigned red, unsigned green,
145 unsigned blue, struct fb_info *info)
146 {
147 /* set bit 5:4 = 01 (write LCD RAM only) */
148 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
149
150 smtc_mmiowb(regno, dac_reg);
151 smtc_mmiowb(red >> 10, dac_val);
152 smtc_mmiowb(green >> 10, dac_val);
153 smtc_mmiowb(blue >> 10, dac_val);
154 }
155
156 /* chan_to_field
157 *
158 * convert a colour value into a field position
159 *
160 * from pxafb.c
161 */
162
163 static inline unsigned int chan_to_field(unsigned int chan,
164 struct fb_bitfield *bf)
165 {
166 chan &= 0xffff;
167 chan >>= 16 - bf->length;
168 return chan << bf->offset;
169 }
170
171 static int smtc_blank(int blank_mode, struct fb_info *info)
172 {
173 /* clear DPMS setting */
174 switch (blank_mode) {
175 case FB_BLANK_UNBLANK:
176 /* Screen On: HSync: On, VSync : On */
177 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
178 smtc_seqw(0x6a, 0x16);
179 smtc_seqw(0x6b, 0x02);
180 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
181 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
182 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
183 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
184 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
185 break;
186 case FB_BLANK_NORMAL:
187 /* Screen Off: HSync: On, VSync : On Soft blank */
188 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
189 smtc_seqw(0x6a, 0x16);
190 smtc_seqw(0x6b, 0x02);
191 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
192 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
193 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
194 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
195 break;
196 case FB_BLANK_VSYNC_SUSPEND:
197 /* Screen On: HSync: On, VSync : Off */
198 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
199 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
200 smtc_seqw(0x6a, 0x0c);
201 smtc_seqw(0x6b, 0x02);
202 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
203 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
204 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
205 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
206 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
207 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
208 break;
209 case FB_BLANK_HSYNC_SUSPEND:
210 /* Screen On: HSync: Off, VSync : On */
211 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
212 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
213 smtc_seqw(0x6a, 0x0c);
214 smtc_seqw(0x6b, 0x02);
215 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
216 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
217 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
218 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
219 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
220 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
221 break;
222 case FB_BLANK_POWERDOWN:
223 /* Screen On: HSync: Off, VSync : Off */
224 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
225 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
226 smtc_seqw(0x6a, 0x0c);
227 smtc_seqw(0x6b, 0x02);
228 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
229 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
230 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
231 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
232 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
233 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
234 break;
235 default:
236 return -EINVAL;
237 }
238
239 return 0;
240 }
241
242 static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
243 unsigned blue, unsigned trans, struct fb_info *info)
244 {
245 struct smtcfb_info *sfb;
246 u32 val;
247
248 sfb = info->par;
249
250 if (regno > 255)
251 return 1;
252
253 switch (sfb->fb.fix.visual) {
254 case FB_VISUAL_DIRECTCOLOR:
255 case FB_VISUAL_TRUECOLOR:
256 /*
257 * 16/32 bit true-colour, use pseudo-palette for 16 base color
258 */
259 if (regno < 16) {
260 if (sfb->fb.var.bits_per_pixel == 16) {
261 u32 *pal = sfb->fb.pseudo_palette;
262 val = chan_to_field(red, &sfb->fb.var.red);
263 val |= chan_to_field(green, &sfb->fb.var.green);
264 val |= chan_to_field(blue, &sfb->fb.var.blue);
265 #ifdef __BIG_ENDIAN
266 pal[regno] =
267 ((red & 0xf800) >> 8) |
268 ((green & 0xe000) >> 13) |
269 ((green & 0x1c00) << 3) |
270 ((blue & 0xf800) >> 3);
271 #else
272 pal[regno] = val;
273 #endif
274 } else {
275 u32 *pal = sfb->fb.pseudo_palette;
276 val = chan_to_field(red, &sfb->fb.var.red);
277 val |= chan_to_field(green, &sfb->fb.var.green);
278 val |= chan_to_field(blue, &sfb->fb.var.blue);
279 #ifdef __BIG_ENDIAN
280 val =
281 (val & 0xff00ff00 >> 8) |
282 (val & 0x00ff00ff << 8);
283 #endif
284 pal[regno] = val;
285 }
286 }
287 break;
288
289 case FB_VISUAL_PSEUDOCOLOR:
290 /* color depth 8 bit */
291 sm712_setpalette(regno, red, green, blue, info);
292 break;
293
294 default:
295 return 1; /* unknown type */
296 }
297
298 return 0;
299
300 }
301
302 #ifdef __BIG_ENDIAN
303 static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
304 count, loff_t *ppos)
305 {
306 unsigned long p = *ppos;
307
308 u32 *buffer, *dst;
309 u32 __iomem *src;
310 int c, i, cnt = 0, err = 0;
311 unsigned long total_size;
312
313 if (!info || !info->screen_base)
314 return -ENODEV;
315
316 if (info->state != FBINFO_STATE_RUNNING)
317 return -EPERM;
318
319 total_size = info->screen_size;
320
321 if (total_size == 0)
322 total_size = info->fix.smem_len;
323
324 if (p >= total_size)
325 return 0;
326
327 if (count >= total_size)
328 count = total_size;
329
330 if (count + p > total_size)
331 count = total_size - p;
332
333 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
334 if (!buffer)
335 return -ENOMEM;
336
337 src = (u32 __iomem *) (info->screen_base + p);
338
339 if (info->fbops->fb_sync)
340 info->fbops->fb_sync(info);
341
342 while (count) {
343 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
344 dst = buffer;
345 for (i = c >> 2; i--;) {
346 *dst = fb_readl(src++);
347 *dst =
348 (*dst & 0xff00ff00 >> 8) |
349 (*dst & 0x00ff00ff << 8);
350 dst++;
351 }
352 if (c & 3) {
353 u8 *dst8 = (u8 *) dst;
354 u8 __iomem *src8 = (u8 __iomem *) src;
355
356 for (i = c & 3; i--;) {
357 if (i & 1) {
358 *dst8++ = fb_readb(++src8);
359 } else {
360 *dst8++ = fb_readb(--src8);
361 src8 += 2;
362 }
363 }
364 src = (u32 __iomem *) src8;
365 }
366
367 if (copy_to_user(buf, buffer, c)) {
368 err = -EFAULT;
369 break;
370 }
371 *ppos += c;
372 buf += c;
373 cnt += c;
374 count -= c;
375 }
376
377 kfree(buffer);
378
379 return (err) ? err : cnt;
380 }
381
382 static ssize_t
383 smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
384 loff_t *ppos)
385 {
386 unsigned long p = *ppos;
387
388 u32 *buffer, *src;
389 u32 __iomem *dst;
390 int c, i, cnt = 0, err = 0;
391 unsigned long total_size;
392
393 if (!info || !info->screen_base)
394 return -ENODEV;
395
396 if (info->state != FBINFO_STATE_RUNNING)
397 return -EPERM;
398
399 total_size = info->screen_size;
400
401 if (total_size == 0)
402 total_size = info->fix.smem_len;
403
404 if (p > total_size)
405 return -EFBIG;
406
407 if (count > total_size) {
408 err = -EFBIG;
409 count = total_size;
410 }
411
412 if (count + p > total_size) {
413 if (!err)
414 err = -ENOSPC;
415
416 count = total_size - p;
417 }
418
419 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
420 if (!buffer)
421 return -ENOMEM;
422
423 dst = (u32 __iomem *) (info->screen_base + p);
424
425 if (info->fbops->fb_sync)
426 info->fbops->fb_sync(info);
427
428 while (count) {
429 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
430 src = buffer;
431
432 if (copy_from_user(src, buf, c)) {
433 err = -EFAULT;
434 break;
435 }
436
437 for (i = c >> 2; i--;) {
438 fb_writel((*src & 0xff00ff00 >> 8) |
439 (*src & 0x00ff00ff << 8), dst++);
440 src++;
441 }
442 if (c & 3) {
443 u8 *src8 = (u8 *) src;
444 u8 __iomem *dst8 = (u8 __iomem *) dst;
445
446 for (i = c & 3; i--;) {
447 if (i & 1) {
448 fb_writeb(*src8++, ++dst8);
449 } else {
450 fb_writeb(*src8++, --dst8);
451 dst8 += 2;
452 }
453 }
454 dst = (u32 __iomem *) dst8;
455 }
456
457 *ppos += c;
458 buf += c;
459 cnt += c;
460 count -= c;
461 }
462
463 kfree(buffer);
464
465 return (cnt) ? cnt : err;
466 }
467 #endif /* ! __BIG_ENDIAN */
468
469 static void sm7xx_set_timing(struct smtcfb_info *sfb)
470 {
471 int i = 0, j = 0;
472 u32 m_nScreenStride;
473
474 dev_dbg(&sfb->pdev->dev,
475 "sfb->width=%d sfb->height=%d "
476 "sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
477 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
478
479 for (j = 0; j < numVGAModes; j++) {
480 if (VGAMode[j].mmSizeX == sfb->width &&
481 VGAMode[j].mmSizeY == sfb->height &&
482 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
483 VGAMode[j].hz == sfb->hz) {
484
485 dev_dbg(&sfb->pdev->dev,
486 "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d "
487 "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
488 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
489 VGAMode[j].bpp, VGAMode[j].hz);
490
491 dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
492
493 smtc_mmiowb(0x0, 0x3c6);
494
495 smtc_seqw(0, 0x1);
496
497 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
498
499 /* init SEQ register SR00 - SR04 */
500 for (i = 0; i < SIZE_SR00_SR04; i++)
501 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
502
503 /* init SEQ register SR10 - SR24 */
504 for (i = 0; i < SIZE_SR10_SR24; i++)
505 smtc_seqw(i + 0x10,
506 VGAMode[j].Init_SR10_SR24[i]);
507
508 /* init SEQ register SR30 - SR75 */
509 for (i = 0; i < SIZE_SR30_SR75; i++)
510 if ((i + 0x30) != 0x62 &&
511 (i + 0x30) != 0x6a &&
512 (i + 0x30) != 0x6b)
513 smtc_seqw(i + 0x30,
514 VGAMode[j].Init_SR30_SR75[i]);
515
516 /* init SEQ register SR80 - SR93 */
517 for (i = 0; i < SIZE_SR80_SR93; i++)
518 smtc_seqw(i + 0x80,
519 VGAMode[j].Init_SR80_SR93[i]);
520
521 /* init SEQ register SRA0 - SRAF */
522 for (i = 0; i < SIZE_SRA0_SRAF; i++)
523 smtc_seqw(i + 0xa0,
524 VGAMode[j].Init_SRA0_SRAF[i]);
525
526 /* init Graphic register GR00 - GR08 */
527 for (i = 0; i < SIZE_GR00_GR08; i++)
528 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
529
530 /* init Attribute register AR00 - AR14 */
531 for (i = 0; i < SIZE_AR00_AR14; i++)
532 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
533
534 /* init CRTC register CR00 - CR18 */
535 for (i = 0; i < SIZE_CR00_CR18; i++)
536 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
537
538 /* init CRTC register CR30 - CR4D */
539 for (i = 0; i < SIZE_CR30_CR4D; i++)
540 smtc_crtcw(i + 0x30,
541 VGAMode[j].Init_CR30_CR4D[i]);
542
543 /* init CRTC register CR90 - CRA7 */
544 for (i = 0; i < SIZE_CR90_CRA7; i++)
545 smtc_crtcw(i + 0x90,
546 VGAMode[j].Init_CR90_CRA7[i]);
547 }
548 }
549 smtc_mmiowb(0x67, 0x3c2);
550
551 /* set VPR registers */
552 writel(0x0, sfb->vp_regs + 0x0C);
553 writel(0x0, sfb->vp_regs + 0x40);
554
555 /* set data width */
556 m_nScreenStride =
557 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
558 switch (sfb->fb.var.bits_per_pixel) {
559 case 8:
560 writel(0x0, sfb->vp_regs + 0x0);
561 break;
562 case 16:
563 writel(0x00020000, sfb->vp_regs + 0x0);
564 break;
565 case 24:
566 writel(0x00040000, sfb->vp_regs + 0x0);
567 break;
568 case 32:
569 writel(0x00030000, sfb->vp_regs + 0x0);
570 break;
571 }
572 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
573 sfb->vp_regs + 0x10);
574
575 }
576
577 static void smtc_set_timing(struct smtcfb_info *sfb)
578 {
579 switch (sfb->chip_id) {
580 case 0x710:
581 case 0x712:
582 case 0x720:
583 sm7xx_set_timing(sfb);
584 break;
585 }
586 }
587
588 static void smtcfb_setmode(struct smtcfb_info *sfb)
589 {
590 switch (sfb->fb.var.bits_per_pixel) {
591 case 32:
592 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
593 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
594 sfb->fb.var.red.length = 8;
595 sfb->fb.var.green.length = 8;
596 sfb->fb.var.blue.length = 8;
597 sfb->fb.var.red.offset = 16;
598 sfb->fb.var.green.offset = 8;
599 sfb->fb.var.blue.offset = 0;
600 break;
601 case 24:
602 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
603 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
604 sfb->fb.var.red.length = 8;
605 sfb->fb.var.green.length = 8;
606 sfb->fb.var.blue.length = 8;
607 sfb->fb.var.red.offset = 16;
608 sfb->fb.var.green.offset = 8;
609 sfb->fb.var.blue.offset = 0;
610 break;
611 case 8:
612 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
613 sfb->fb.fix.line_length = sfb->fb.var.xres;
614 sfb->fb.var.red.length = 3;
615 sfb->fb.var.green.length = 3;
616 sfb->fb.var.blue.length = 2;
617 sfb->fb.var.red.offset = 5;
618 sfb->fb.var.green.offset = 2;
619 sfb->fb.var.blue.offset = 0;
620 break;
621 case 16:
622 default:
623 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
624 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
625 sfb->fb.var.red.length = 5;
626 sfb->fb.var.green.length = 6;
627 sfb->fb.var.blue.length = 5;
628 sfb->fb.var.red.offset = 11;
629 sfb->fb.var.green.offset = 5;
630 sfb->fb.var.blue.offset = 0;
631 break;
632 }
633
634 sfb->width = sfb->fb.var.xres;
635 sfb->height = sfb->fb.var.yres;
636 sfb->hz = 60;
637 smtc_set_timing(sfb);
638 }
639
640 static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
641 {
642 /* sanity checks */
643 if (var->xres_virtual < var->xres)
644 var->xres_virtual = var->xres;
645
646 if (var->yres_virtual < var->yres)
647 var->yres_virtual = var->yres;
648
649 /* set valid default bpp */
650 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
651 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
652 var->bits_per_pixel = 16;
653
654 return 0;
655 }
656
657 static int smtc_set_par(struct fb_info *info)
658 {
659 smtcfb_setmode(info->par);
660
661 return 0;
662 }
663
664 static struct fb_ops smtcfb_ops = {
665 .owner = THIS_MODULE,
666 .fb_check_var = smtc_check_var,
667 .fb_set_par = smtc_set_par,
668 .fb_setcolreg = smtc_setcolreg,
669 .fb_blank = smtc_blank,
670 .fb_fillrect = cfb_fillrect,
671 .fb_imageblit = cfb_imageblit,
672 .fb_copyarea = cfb_copyarea,
673 #ifdef __BIG_ENDIAN
674 .fb_read = smtcfb_read,
675 .fb_write = smtcfb_write,
676 #endif
677 };
678
679 /*
680 * alloc struct smtcfb_info and assign default values
681 */
682 static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
683 {
684 struct smtcfb_info *sfb;
685
686 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
687
688 if (!sfb)
689 return NULL;
690
691 sfb->pdev = pdev;
692
693 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
694 sfb->fb.fbops = &smtcfb_ops;
695 sfb->fb.fix = smtcfb_fix;
696 sfb->fb.var = smtcfb_var;
697 sfb->fb.pseudo_palette = sfb->colreg;
698 sfb->fb.par = sfb;
699
700 return sfb;
701 }
702
703 /*
704 * free struct smtcfb_info
705 */
706 static void smtc_free_fb_info(struct smtcfb_info *sfb)
707 {
708 kfree(sfb);
709 }
710
711 /*
712 * Unmap in the memory mapped IO registers
713 */
714
715 static void smtc_unmap_mmio(struct smtcfb_info *sfb)
716 {
717 if (sfb && smtc_RegBaseAddress)
718 smtc_RegBaseAddress = NULL;
719 }
720
721 /*
722 * Map in the screen memory
723 */
724
725 static int smtc_map_smem(struct smtcfb_info *sfb,
726 struct pci_dev *pdev, u_long smem_len)
727 {
728
729 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
730
731 #ifdef __BIG_ENDIAN
732 if (sfb->fb.var.bits_per_pixel == 32)
733 sfb->fb.fix.smem_start += 0x800000;
734 #endif
735
736 sfb->fb.fix.smem_len = smem_len;
737
738 sfb->fb.screen_base = sfb->lfb;
739
740 if (!sfb->fb.screen_base) {
741 dev_err(&pdev->dev,
742 "%s: unable to map screen memory\n", sfb->fb.fix.id);
743 return -ENOMEM;
744 }
745
746 return 0;
747 }
748
749 /*
750 * Unmap in the screen memory
751 *
752 */
753 static void smtc_unmap_smem(struct smtcfb_info *sfb)
754 {
755 if (sfb && sfb->fb.screen_base) {
756 iounmap(sfb->fb.screen_base);
757 sfb->fb.screen_base = NULL;
758 }
759 }
760
761 /*
762 * We need to wake up the device and make sure its in linear memory mode.
763 */
764 static inline void sm7xx_init_hw(void)
765 {
766 outb_p(0x18, 0x3c4);
767 outb_p(0x11, 0x3c5);
768 }
769
770 static int smtcfb_pci_probe(struct pci_dev *pdev,
771 const struct pci_device_id *ent)
772 {
773 struct smtcfb_info *sfb;
774 u_long smem_size = 0x00800000; /* default 8MB */
775 int err;
776 unsigned long mmio_base;
777
778 dev_info(&pdev->dev, "Silicon Motion display driver.");
779
780 err = pci_enable_device(pdev); /* enable SMTC chip */
781 if (err)
782 return err;
783
784 sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
785
786 sfb = smtc_alloc_fb_info(pdev);
787
788 if (!sfb) {
789 err = -ENOMEM;
790 goto failed_free;
791 }
792
793 sfb->chip_id = ent->device;
794
795 pci_set_drvdata(pdev, sfb);
796
797 sm7xx_init_hw();
798
799 /* get mode parameter from smtc_scr_info */
800 if (smtc_scr_info.lfb_width != 0) {
801 sfb->fb.var.xres = smtc_scr_info.lfb_width;
802 sfb->fb.var.yres = smtc_scr_info.lfb_height;
803 sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
804 } else {
805 /* default resolution 1024x600 16bit mode */
806 sfb->fb.var.xres = SCREEN_X_RES;
807 sfb->fb.var.yres = SCREEN_Y_RES;
808 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
809 }
810
811 #ifdef __BIG_ENDIAN
812 if (sfb->fb.var.bits_per_pixel == 24)
813 sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
814 #endif
815 /* Map address and memory detection */
816 mmio_base = pci_resource_start(pdev, 0);
817 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
818
819 switch (sfb->chip_id) {
820 case 0x710:
821 case 0x712:
822 sfb->fb.fix.mmio_start = mmio_base + 0x00400000;
823 sfb->fb.fix.mmio_len = 0x00400000;
824 smem_size = SM712_VIDEOMEMORYSIZE;
825 #ifdef __BIG_ENDIAN
826 sfb->lfb = ioremap(mmio_base, 0x00c00000);
827 #else
828 sfb->lfb = ioremap(mmio_base, 0x00800000);
829 #endif
830 sfb->mmio = (smtc_RegBaseAddress =
831 sfb->lfb + 0x00700000);
832 sfb->dp_regs = sfb->lfb + 0x00408000;
833 sfb->vp_regs = sfb->lfb + 0x0040c000;
834 #ifdef __BIG_ENDIAN
835 if (sfb->fb.var.bits_per_pixel == 32) {
836 sfb->lfb += 0x800000;
837 dev_info(&pdev->dev, "sfb->lfb=%p", sfb->lfb);
838 }
839 #endif
840 if (!smtc_RegBaseAddress) {
841 dev_err(&pdev->dev,
842 "%s: unable to map memory mapped IO!",
843 sfb->fb.fix.id);
844 err = -ENOMEM;
845 goto failed_fb;
846 }
847
848 /* set MCLK = 14.31818 * (0x16 / 0x2) */
849 smtc_seqw(0x6a, 0x16);
850 smtc_seqw(0x6b, 0x02);
851 smtc_seqw(0x62, 0x3e);
852 /* enable PCI burst */
853 smtc_seqw(0x17, 0x20);
854 /* enable word swap */
855 #ifdef __BIG_ENDIAN
856 if (sfb->fb.var.bits_per_pixel == 32)
857 smtc_seqw(0x17, 0x30);
858 #endif
859 break;
860 case 0x720:
861 sfb->fb.fix.mmio_start = mmio_base;
862 sfb->fb.fix.mmio_len = 0x00200000;
863 smem_size = SM722_VIDEOMEMORYSIZE;
864 sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
865 sfb->lfb = sfb->dp_regs + 0x00200000;
866 sfb->mmio = (smtc_RegBaseAddress =
867 sfb->dp_regs + 0x000c0000);
868 sfb->vp_regs = sfb->dp_regs + 0x800;
869
870 smtc_seqw(0x62, 0xff);
871 smtc_seqw(0x6a, 0x0d);
872 smtc_seqw(0x6b, 0x02);
873 break;
874 default:
875 dev_err(&pdev->dev,
876 "No valid Silicon Motion display chip was detected!");
877
878 goto failed_fb;
879 }
880
881 /* can support 32 bpp */
882 if (15 == sfb->fb.var.bits_per_pixel)
883 sfb->fb.var.bits_per_pixel = 16;
884
885 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
886 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
887 err = smtc_map_smem(sfb, pdev, smem_size);
888 if (err)
889 goto failed;
890
891 smtcfb_setmode(sfb);
892
893 err = register_framebuffer(&sfb->fb);
894 if (err < 0)
895 goto failed;
896
897 dev_info(&pdev->dev,
898 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
899 sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
900 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
901
902 return 0;
903
904 failed:
905 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
906
907 smtc_unmap_smem(sfb);
908 smtc_unmap_mmio(sfb);
909 failed_fb:
910 smtc_free_fb_info(sfb);
911
912 failed_free:
913 pci_disable_device(pdev);
914
915 return err;
916 }
917
918 /*
919 * 0x710 (LynxEM)
920 * 0x712 (LynxEM+)
921 * 0x720 (Lynx3DM, Lynx3DM+)
922 */
923 static const struct pci_device_id smtcfb_pci_table[] = {
924 { PCI_DEVICE(0x126f, 0x710), },
925 { PCI_DEVICE(0x126f, 0x712), },
926 { PCI_DEVICE(0x126f, 0x720), },
927 {0,}
928 };
929
930 static void smtcfb_pci_remove(struct pci_dev *pdev)
931 {
932 struct smtcfb_info *sfb;
933
934 sfb = pci_get_drvdata(pdev);
935 smtc_unmap_smem(sfb);
936 smtc_unmap_mmio(sfb);
937 unregister_framebuffer(&sfb->fb);
938 smtc_free_fb_info(sfb);
939 }
940
941 #ifdef CONFIG_PM
942 static int smtcfb_pci_suspend(struct device *device)
943 {
944 struct pci_dev *pdev = to_pci_dev(device);
945 struct smtcfb_info *sfb;
946
947 sfb = pci_get_drvdata(pdev);
948
949 /* set the hw in sleep mode use external clock and self memory refresh
950 * so that we can turn off internal PLLs later on
951 */
952 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
953 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
954
955 console_lock();
956 fb_set_suspend(&sfb->fb, 1);
957 console_unlock();
958
959 /* additionally turn off all function blocks including internal PLLs */
960 smtc_seqw(0x21, 0xff);
961
962 return 0;
963 }
964
965 static int smtcfb_pci_resume(struct device *device)
966 {
967 struct pci_dev *pdev = to_pci_dev(device);
968 struct smtcfb_info *sfb;
969
970 sfb = pci_get_drvdata(pdev);
971
972 /* reinit hardware */
973 sm7xx_init_hw();
974 switch (sfb->chip_id) {
975 case 0x710:
976 case 0x712:
977 /* set MCLK = 14.31818 * (0x16 / 0x2) */
978 smtc_seqw(0x6a, 0x16);
979 smtc_seqw(0x6b, 0x02);
980 smtc_seqw(0x62, 0x3e);
981 /* enable PCI burst */
982 smtc_seqw(0x17, 0x20);
983 #ifdef __BIG_ENDIAN
984 if (sfb->fb.var.bits_per_pixel == 32)
985 smtc_seqw(0x17, 0x30);
986 #endif
987 break;
988 case 0x720:
989 smtc_seqw(0x62, 0xff);
990 smtc_seqw(0x6a, 0x0d);
991 smtc_seqw(0x6b, 0x02);
992 break;
993 }
994
995 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
996 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
997
998 smtcfb_setmode(sfb);
999
1000 console_lock();
1001 fb_set_suspend(&sfb->fb, 0);
1002 console_unlock();
1003
1004 return 0;
1005 }
1006
1007 static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
1008 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1009
1010 #else /* !CONFIG_PM */
1011
1012 #define SM7XX_PM_OPS NULL
1013
1014 #endif /* !CONFIG_PM */
1015
1016 static struct pci_driver smtcfb_driver = {
1017 .name = "smtcfb",
1018 .id_table = smtcfb_pci_table,
1019 .probe = smtcfb_pci_probe,
1020 .remove = smtcfb_pci_remove,
1021 .driver.pm = SM7XX_PM_OPS,
1022 };
1023
1024 module_pci_driver(smtcfb_driver);
1025
1026 MODULE_AUTHOR("Siliconmotion ");
1027 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1028 MODULE_LICENSE("GPL");
Linux with added FPC-III support