iommu/msm: Add iommu_group support
[linux/fpc-iii.git] / arch / sparc / kernel / entry.h
blob0f679421b468343c747ac48abd2046b7e6ce051e
1 #ifndef _ENTRY_H
2 #define _ENTRY_H
4 #include <linux/kernel.h>
5 #include <linux/types.h>
6 #include <linux/init.h>
8 /* irq */
9 void handler_irq(int irq, struct pt_regs *regs);
11 #ifdef CONFIG_SPARC32
12 /* traps */
13 void do_hw_interrupt(struct pt_regs *regs, unsigned long type);
14 void do_illegal_instruction(struct pt_regs *regs, unsigned long pc,
15 unsigned long npc, unsigned long psr);
17 void do_priv_instruction(struct pt_regs *regs, unsigned long pc,
18 unsigned long npc, unsigned long psr);
19 void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc,
20 unsigned long npc, unsigned long psr);
21 void do_fpd_trap(struct pt_regs *regs, unsigned long pc,
22 unsigned long npc, unsigned long psr);
23 void do_fpe_trap(struct pt_regs *regs, unsigned long pc,
24 unsigned long npc, unsigned long psr);
25 void handle_tag_overflow(struct pt_regs *regs, unsigned long pc,
26 unsigned long npc, unsigned long psr);
27 void handle_watchpoint(struct pt_regs *regs, unsigned long pc,
28 unsigned long npc, unsigned long psr);
29 void handle_reg_access(struct pt_regs *regs, unsigned long pc,
30 unsigned long npc, unsigned long psr);
31 void handle_cp_disabled(struct pt_regs *regs, unsigned long pc,
32 unsigned long npc, unsigned long psr);
33 void handle_cp_exception(struct pt_regs *regs, unsigned long pc,
34 unsigned long npc, unsigned long psr);
38 /* entry.S */
39 void fpsave(unsigned long *fpregs, unsigned long *fsr,
40 void *fpqueue, unsigned long *fpqdepth);
41 void fpload(unsigned long *fpregs, unsigned long *fsr);
43 #else /* CONFIG_SPARC32 */
45 #include <asm/trap_block.h>
47 struct popc_3insn_patch_entry {
48 unsigned int addr;
49 unsigned int insns[3];
51 extern struct popc_3insn_patch_entry __popc_3insn_patch,
52 __popc_3insn_patch_end;
54 struct popc_6insn_patch_entry {
55 unsigned int addr;
56 unsigned int insns[6];
58 extern struct popc_6insn_patch_entry __popc_6insn_patch,
59 __popc_6insn_patch_end;
61 struct pause_patch_entry {
62 unsigned int addr;
63 unsigned int insns[3];
65 extern struct pause_patch_entry __pause_3insn_patch,
66 __pause_3insn_patch_end;
68 void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
69 struct sun4v_1insn_patch_entry *);
70 void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
71 struct sun4v_2insn_patch_entry *);
72 void sun_m7_patch_2insn_range(struct sun4v_2insn_patch_entry *,
73 struct sun4v_2insn_patch_entry *);
74 extern unsigned int dcache_parity_tl1_occurred;
75 extern unsigned int icache_parity_tl1_occurred;
77 asmlinkage void sparc_breakpoint(struct pt_regs *regs);
78 void timer_interrupt(int irq, struct pt_regs *regs);
80 void do_notify_resume(struct pt_regs *regs,
81 unsigned long orig_i0,
82 unsigned long thread_info_flags);
84 asmlinkage int syscall_trace_enter(struct pt_regs *regs);
85 asmlinkage void syscall_trace_leave(struct pt_regs *regs);
87 void bad_trap_tl1(struct pt_regs *regs, long lvl);
89 void do_fpieee(struct pt_regs *regs);
90 void do_fpother(struct pt_regs *regs);
91 void do_tof(struct pt_regs *regs);
92 void do_div0(struct pt_regs *regs);
93 void do_illegal_instruction(struct pt_regs *regs);
94 void mem_address_unaligned(struct pt_regs *regs,
95 unsigned long sfar,
96 unsigned long sfsr);
97 void sun4v_do_mna(struct pt_regs *regs,
98 unsigned long addr,
99 unsigned long type_ctx);
100 void do_privop(struct pt_regs *regs);
101 void do_privact(struct pt_regs *regs);
102 void do_cee(struct pt_regs *regs);
103 void do_div0_tl1(struct pt_regs *regs);
104 void do_fpieee_tl1(struct pt_regs *regs);
105 void do_fpother_tl1(struct pt_regs *regs);
106 void do_ill_tl1(struct pt_regs *regs);
107 void do_irq_tl1(struct pt_regs *regs);
108 void do_lddfmna_tl1(struct pt_regs *regs);
109 void do_stdfmna_tl1(struct pt_regs *regs);
110 void do_paw(struct pt_regs *regs);
111 void do_paw_tl1(struct pt_regs *regs);
112 void do_vaw(struct pt_regs *regs);
113 void do_vaw_tl1(struct pt_regs *regs);
114 void do_tof_tl1(struct pt_regs *regs);
115 void do_getpsr(struct pt_regs *regs);
117 void spitfire_insn_access_exception(struct pt_regs *regs,
118 unsigned long sfsr,
119 unsigned long sfar);
120 void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
121 unsigned long sfsr,
122 unsigned long sfar);
123 void spitfire_data_access_exception(struct pt_regs *regs,
124 unsigned long sfsr,
125 unsigned long sfar);
126 void spitfire_data_access_exception_tl1(struct pt_regs *regs,
127 unsigned long sfsr,
128 unsigned long sfar);
129 void spitfire_access_error(struct pt_regs *regs,
130 unsigned long status_encoded,
131 unsigned long afar);
133 void cheetah_fecc_handler(struct pt_regs *regs,
134 unsigned long afsr,
135 unsigned long afar);
136 void cheetah_cee_handler(struct pt_regs *regs,
137 unsigned long afsr,
138 unsigned long afar);
139 void cheetah_deferred_handler(struct pt_regs *regs,
140 unsigned long afsr,
141 unsigned long afar);
142 void cheetah_plus_parity_error(int type, struct pt_regs *regs);
144 void sun4v_insn_access_exception(struct pt_regs *regs,
145 unsigned long addr,
146 unsigned long type_ctx);
147 void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
148 unsigned long addr,
149 unsigned long type_ctx);
150 void sun4v_data_access_exception(struct pt_regs *regs,
151 unsigned long addr,
152 unsigned long type_ctx);
153 void sun4v_data_access_exception_tl1(struct pt_regs *regs,
154 unsigned long addr,
155 unsigned long type_ctx);
156 void sun4v_resum_error(struct pt_regs *regs,
157 unsigned long offset);
158 void sun4v_resum_overflow(struct pt_regs *regs);
159 void sun4v_nonresum_error(struct pt_regs *regs,
160 unsigned long offset);
161 void sun4v_nonresum_overflow(struct pt_regs *regs);
163 extern unsigned long sun4v_err_itlb_vaddr;
164 extern unsigned long sun4v_err_itlb_ctx;
165 extern unsigned long sun4v_err_itlb_pte;
166 extern unsigned long sun4v_err_itlb_error;
168 void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
170 extern unsigned long sun4v_err_dtlb_vaddr;
171 extern unsigned long sun4v_err_dtlb_ctx;
172 extern unsigned long sun4v_err_dtlb_pte;
173 extern unsigned long sun4v_err_dtlb_error;
175 void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
176 void hypervisor_tlbop_error(unsigned long err,
177 unsigned long op);
178 void hypervisor_tlbop_error_xcall(unsigned long err,
179 unsigned long op);
181 /* WARNING: The error trap handlers in assembly know the precise
182 * layout of the following structure.
184 * C-level handlers in traps.c use this information to log the
185 * error and then determine how to recover (if possible).
187 struct cheetah_err_info {
188 /*0x00*/u64 afsr;
189 /*0x08*/u64 afar;
191 /* D-cache state */
192 /*0x10*/u64 dcache_data[4]; /* The actual data */
193 /*0x30*/u64 dcache_index; /* D-cache index */
194 /*0x38*/u64 dcache_tag; /* D-cache tag/valid */
195 /*0x40*/u64 dcache_utag; /* D-cache microtag */
196 /*0x48*/u64 dcache_stag; /* D-cache snooptag */
198 /* I-cache state */
199 /*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
200 /*0x90*/u64 icache_index; /* I-cache index */
201 /*0x98*/u64 icache_tag; /* I-cache phys tag */
202 /*0xa0*/u64 icache_utag; /* I-cache microtag */
203 /*0xa8*/u64 icache_stag; /* I-cache snooptag */
204 /*0xb0*/u64 icache_upper; /* I-cache upper-tag */
205 /*0xb8*/u64 icache_lower; /* I-cache lower-tag */
207 /* E-cache state */
208 /*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
209 /*0xe0*/u64 ecache_index; /* E-cache index */
210 /*0xe8*/u64 ecache_tag; /* E-cache tag/state */
212 /*0xf0*/u64 __pad[32 - 30];
214 #define CHAFSR_INVALID ((u64)-1L)
216 /* This is allocated at boot time based upon the largest hardware
217 * cpu ID in the system. We allocate two entries per cpu, one for
218 * TL==0 logging and one for TL >= 1 logging.
220 extern struct cheetah_err_info *cheetah_error_log;
222 /* UPA nodes send interrupt packet to UltraSparc with first data reg
223 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
224 * delivered. We must translate this into a non-vector IRQ so we can
225 * set the softint on this cpu.
227 * To make processing these packets efficient and race free we use
228 * an array of irq buckets below. The interrupt vector handler in
229 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
231 * If you make changes to ino_bucket, please update hand coded assembler
232 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
234 struct ino_bucket {
235 /*0x00*/unsigned long __irq_chain_pa;
237 /* Interrupt number assigned to this INO. */
238 /*0x08*/unsigned int __irq;
239 /*0x0c*/unsigned int __pad;
242 extern struct ino_bucket *ivector_table;
243 extern unsigned long ivector_table_pa;
245 void init_irqwork_curcpu(void);
246 void sun4v_register_mondo_queues(int this_cpu);
248 #endif /* CONFIG_SPARC32 */
249 #endif /* _ENTRY_H */