fs: make fiemap work from compat_ioctl
[linux/fpc-iii.git] / drivers / cpufreq / qoriq-cpufreq.c
blob4ada55b8856e1e290e043ce43f7f3b5ebfc484f2
1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * CPU Frequency Scaling driver for Freescale QorIQ SoCs.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/cpufreq.h>
16 #include <linux/cpu_cooling.h>
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/mutex.h>
22 #include <linux/of.h>
23 #include <linux/slab.h>
24 #include <linux/smp.h>
26 /**
27 * struct cpu_data
28 * @pclk: the parent clock of cpu
29 * @table: frequency table
31 struct cpu_data {
32 struct clk **pclk;
33 struct cpufreq_frequency_table *table;
34 struct thermal_cooling_device *cdev;
38 * Don't use cpufreq on this SoC -- used when the SoC would have otherwise
39 * matched a more generic compatible.
41 #define SOC_BLACKLIST 1
43 /**
44 * struct soc_data - SoC specific data
45 * @flags: SOC_xxx
47 struct soc_data {
48 u32 flags;
51 static u32 get_bus_freq(void)
53 struct device_node *soc;
54 u32 sysfreq;
55 struct clk *pltclk;
56 int ret;
58 /* get platform freq by searching bus-frequency property */
59 soc = of_find_node_by_type(NULL, "soc");
60 if (soc) {
61 ret = of_property_read_u32(soc, "bus-frequency", &sysfreq);
62 of_node_put(soc);
63 if (!ret)
64 return sysfreq;
67 /* get platform freq by its clock name */
68 pltclk = clk_get(NULL, "cg-pll0-div1");
69 if (IS_ERR(pltclk)) {
70 pr_err("%s: can't get bus frequency %ld\n",
71 __func__, PTR_ERR(pltclk));
72 return PTR_ERR(pltclk);
75 return clk_get_rate(pltclk);
78 static struct clk *cpu_to_clk(int cpu)
80 struct device_node *np;
81 struct clk *clk;
83 if (!cpu_present(cpu))
84 return NULL;
86 np = of_get_cpu_node(cpu, NULL);
87 if (!np)
88 return NULL;
90 clk = of_clk_get(np, 0);
91 of_node_put(np);
92 return clk;
95 /* traverse cpu nodes to get cpu mask of sharing clock wire */
96 static void set_affected_cpus(struct cpufreq_policy *policy)
98 struct cpumask *dstp = policy->cpus;
99 struct clk *clk;
100 int i;
102 for_each_present_cpu(i) {
103 clk = cpu_to_clk(i);
104 if (IS_ERR(clk)) {
105 pr_err("%s: no clock for cpu %d\n", __func__, i);
106 continue;
109 if (clk_is_match(policy->clk, clk))
110 cpumask_set_cpu(i, dstp);
114 /* reduce the duplicated frequencies in frequency table */
115 static void freq_table_redup(struct cpufreq_frequency_table *freq_table,
116 int count)
118 int i, j;
120 for (i = 1; i < count; i++) {
121 for (j = 0; j < i; j++) {
122 if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID ||
123 freq_table[j].frequency !=
124 freq_table[i].frequency)
125 continue;
127 freq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
128 break;
133 /* sort the frequencies in frequency table in descenting order */
134 static void freq_table_sort(struct cpufreq_frequency_table *freq_table,
135 int count)
137 int i, j, ind;
138 unsigned int freq, max_freq;
139 struct cpufreq_frequency_table table;
141 for (i = 0; i < count - 1; i++) {
142 max_freq = freq_table[i].frequency;
143 ind = i;
144 for (j = i + 1; j < count; j++) {
145 freq = freq_table[j].frequency;
146 if (freq == CPUFREQ_ENTRY_INVALID ||
147 freq <= max_freq)
148 continue;
149 ind = j;
150 max_freq = freq;
153 if (ind != i) {
154 /* exchange the frequencies */
155 table.driver_data = freq_table[i].driver_data;
156 table.frequency = freq_table[i].frequency;
157 freq_table[i].driver_data = freq_table[ind].driver_data;
158 freq_table[i].frequency = freq_table[ind].frequency;
159 freq_table[ind].driver_data = table.driver_data;
160 freq_table[ind].frequency = table.frequency;
165 static int qoriq_cpufreq_cpu_init(struct cpufreq_policy *policy)
167 struct device_node *np;
168 int i, count, ret;
169 u32 freq;
170 struct clk *clk;
171 const struct clk_hw *hwclk;
172 struct cpufreq_frequency_table *table;
173 struct cpu_data *data;
174 unsigned int cpu = policy->cpu;
175 u64 u64temp;
177 np = of_get_cpu_node(cpu, NULL);
178 if (!np)
179 return -ENODEV;
181 data = kzalloc(sizeof(*data), GFP_KERNEL);
182 if (!data)
183 goto err_np;
185 policy->clk = of_clk_get(np, 0);
186 if (IS_ERR(policy->clk)) {
187 pr_err("%s: no clock information\n", __func__);
188 goto err_nomem2;
191 hwclk = __clk_get_hw(policy->clk);
192 count = clk_hw_get_num_parents(hwclk);
194 data->pclk = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
195 if (!data->pclk) {
196 pr_err("%s: no memory\n", __func__);
197 goto err_nomem2;
200 table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL);
201 if (!table) {
202 pr_err("%s: no memory\n", __func__);
203 goto err_pclk;
206 for (i = 0; i < count; i++) {
207 clk = clk_hw_get_parent_by_index(hwclk, i)->clk;
208 data->pclk[i] = clk;
209 freq = clk_get_rate(clk);
210 table[i].frequency = freq / 1000;
211 table[i].driver_data = i;
213 freq_table_redup(table, count);
214 freq_table_sort(table, count);
215 table[i].frequency = CPUFREQ_TABLE_END;
217 /* set the min and max frequency properly */
218 ret = cpufreq_table_validate_and_show(policy, table);
219 if (ret) {
220 pr_err("invalid frequency table: %d\n", ret);
221 goto err_nomem1;
224 data->table = table;
226 /* update ->cpus if we have cluster, no harm if not */
227 set_affected_cpus(policy);
228 policy->driver_data = data;
230 /* Minimum transition latency is 12 platform clocks */
231 u64temp = 12ULL * NSEC_PER_SEC;
232 do_div(u64temp, get_bus_freq());
233 policy->cpuinfo.transition_latency = u64temp + 1;
235 of_node_put(np);
237 return 0;
239 err_nomem1:
240 kfree(table);
241 err_pclk:
242 kfree(data->pclk);
243 err_nomem2:
244 kfree(data);
245 err_np:
246 of_node_put(np);
248 return -ENODEV;
251 static int qoriq_cpufreq_cpu_exit(struct cpufreq_policy *policy)
253 struct cpu_data *data = policy->driver_data;
255 cpufreq_cooling_unregister(data->cdev);
256 kfree(data->pclk);
257 kfree(data->table);
258 kfree(data);
259 policy->driver_data = NULL;
261 return 0;
264 static int qoriq_cpufreq_target(struct cpufreq_policy *policy,
265 unsigned int index)
267 struct clk *parent;
268 struct cpu_data *data = policy->driver_data;
270 parent = data->pclk[data->table[index].driver_data];
271 return clk_set_parent(policy->clk, parent);
275 static void qoriq_cpufreq_ready(struct cpufreq_policy *policy)
277 struct cpu_data *cpud = policy->driver_data;
278 struct device_node *np = of_get_cpu_node(policy->cpu, NULL);
280 if (of_find_property(np, "#cooling-cells", NULL)) {
281 cpud->cdev = of_cpufreq_cooling_register(np, policy);
283 if (IS_ERR(cpud->cdev) && PTR_ERR(cpud->cdev) != -ENOSYS) {
284 pr_err("cpu%d is not running as cooling device: %ld\n",
285 policy->cpu, PTR_ERR(cpud->cdev));
287 cpud->cdev = NULL;
291 of_node_put(np);
294 static struct cpufreq_driver qoriq_cpufreq_driver = {
295 .name = "qoriq_cpufreq",
296 .flags = CPUFREQ_CONST_LOOPS,
297 .init = qoriq_cpufreq_cpu_init,
298 .exit = qoriq_cpufreq_cpu_exit,
299 .verify = cpufreq_generic_frequency_table_verify,
300 .target_index = qoriq_cpufreq_target,
301 .get = cpufreq_generic_get,
302 .ready = qoriq_cpufreq_ready,
303 .attr = cpufreq_generic_attr,
306 static const struct soc_data blacklist = {
307 .flags = SOC_BLACKLIST,
310 static const struct of_device_id node_matches[] __initconst = {
311 /* e6500 cannot use cpufreq due to erratum A-008083 */
312 { .compatible = "fsl,b4420-clockgen", &blacklist },
313 { .compatible = "fsl,b4860-clockgen", &blacklist },
314 { .compatible = "fsl,t2080-clockgen", &blacklist },
315 { .compatible = "fsl,t4240-clockgen", &blacklist },
317 { .compatible = "fsl,ls1012a-clockgen", },
318 { .compatible = "fsl,ls1021a-clockgen", },
319 { .compatible = "fsl,ls1043a-clockgen", },
320 { .compatible = "fsl,ls1046a-clockgen", },
321 { .compatible = "fsl,ls1088a-clockgen", },
322 { .compatible = "fsl,ls2080a-clockgen", },
323 { .compatible = "fsl,p4080-clockgen", },
324 { .compatible = "fsl,qoriq-clockgen-1.0", },
325 { .compatible = "fsl,qoriq-clockgen-2.0", },
329 static int __init qoriq_cpufreq_init(void)
331 int ret;
332 struct device_node *np;
333 const struct of_device_id *match;
334 const struct soc_data *data;
336 np = of_find_matching_node(NULL, node_matches);
337 if (!np)
338 return -ENODEV;
340 match = of_match_node(node_matches, np);
341 data = match->data;
343 of_node_put(np);
345 if (data && data->flags & SOC_BLACKLIST)
346 return -ENODEV;
348 ret = cpufreq_register_driver(&qoriq_cpufreq_driver);
349 if (!ret)
350 pr_info("Freescale QorIQ CPU frequency scaling driver\n");
352 return ret;
354 module_init(qoriq_cpufreq_init);
356 static void __exit qoriq_cpufreq_exit(void)
358 cpufreq_unregister_driver(&qoriq_cpufreq_driver);
360 module_exit(qoriq_cpufreq_exit);
362 MODULE_LICENSE("GPL");
363 MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
364 MODULE_DESCRIPTION("cpufreq driver for Freescale QorIQ series SoCs");