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acpiphp: Execute ACPI _REG method for hotadded devices
[linux/fpc-iii.git] / drivers / mtd / onenand / onenand_base.c
blobf63b1db3ffb3f0266658a787bc59dd09dd7f2a2a
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
9 * Credits:
10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
11 * auto-placement support, read-while load support, various fixes
12 *
13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
14 * Flex-OneNAND support
15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/init.h>
27 #include <linux/sched.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/jiffies.h>
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/onenand.h>
33 #include <linux/mtd/partitions.h>
34
35 #include <asm/io.h>
36
37 /*
38 * Multiblock erase if number of blocks to erase is 2 or more.
39 * Maximum number of blocks for simultaneous erase is 64.
40 */
41 #define MB_ERASE_MIN_BLK_COUNT 2
42 #define MB_ERASE_MAX_BLK_COUNT 64
43
44 /* Default Flex-OneNAND boundary and lock respectively */
45 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
46
47 module_param_array(flex_bdry, int, NULL, 0400);
48 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
49 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
50 "DIE_BDRY: SLC boundary of the die"
51 "LOCK: Locking information for SLC boundary"
52 " : 0->Set boundary in unlocked status"
53 " : 1->Set boundary in locked status");
54
55 /* Default OneNAND/Flex-OneNAND OTP options*/
56 static int otp;
57
58 module_param(otp, int, 0400);
59 MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
60 "Syntax : otp=LOCK_TYPE"
61 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
62 " : 0 -> Default (No Blocks Locked)"
63 " : 1 -> OTP Block lock"
64 " : 2 -> 1st Block lock"
65 " : 3 -> BOTH OTP Block and 1st Block lock");
66
67 /**
68 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
69 * For now, we expose only 64 out of 80 ecc bytes
70 */
71 static struct nand_ecclayout onenand_oob_128 = {
72 .eccbytes = 64,
73 .eccpos = {
74 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
75 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
76 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
77 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
78 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
79 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
80 102, 103, 104, 105
81 },
82 .oobfree = {
83 {2, 4}, {18, 4}, {34, 4}, {50, 4},
84 {66, 4}, {82, 4}, {98, 4}, {114, 4}
85 }
86 };
87
88 /**
89 * onenand_oob_64 - oob info for large (2KB) page
90 */
91 static struct nand_ecclayout onenand_oob_64 = {
92 .eccbytes = 20,
93 .eccpos = {
94 8, 9, 10, 11, 12,
95 24, 25, 26, 27, 28,
96 40, 41, 42, 43, 44,
97 56, 57, 58, 59, 60,
98 },
99 .oobfree = {
100 {2, 3}, {14, 2}, {18, 3}, {30, 2},
101 {34, 3}, {46, 2}, {50, 3}, {62, 2}
102 }
103 };
104
105 /**
106 * onenand_oob_32 - oob info for middle (1KB) page
107 */
108 static struct nand_ecclayout onenand_oob_32 = {
109 .eccbytes = 10,
110 .eccpos = {
111 8, 9, 10, 11, 12,
112 24, 25, 26, 27, 28,
113 },
114 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
115 };
116
117 static const unsigned char ffchars[] = {
118 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
119 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
120 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
121 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
122 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
123 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
124 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
125 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
126 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
127 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
128 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
129 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
130 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
131 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
132 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
133 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
134 };
135
136 /**
137 * onenand_readw - [OneNAND Interface] Read OneNAND register
138 * @param addr address to read
139 *
140 * Read OneNAND register
141 */
142 static unsigned short onenand_readw(void __iomem *addr)
143 {
144 return readw(addr);
145 }
146
147 /**
148 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
149 * @param value value to write
150 * @param addr address to write
151 *
152 * Write OneNAND register with value
153 */
154 static void onenand_writew(unsigned short value, void __iomem *addr)
155 {
156 writew(value, addr);
157 }
158
159 /**
160 * onenand_block_address - [DEFAULT] Get block address
161 * @param this onenand chip data structure
162 * @param block the block
163 * @return translated block address if DDP, otherwise same
164 *
165 * Setup Start Address 1 Register (F100h)
166 */
167 static int onenand_block_address(struct onenand_chip *this, int block)
168 {
169 /* Device Flash Core select, NAND Flash Block Address */
170 if (block & this->density_mask)
171 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
172
173 return block;
174 }
175
176 /**
177 * onenand_bufferram_address - [DEFAULT] Get bufferram address
178 * @param this onenand chip data structure
179 * @param block the block
180 * @return set DBS value if DDP, otherwise 0
181 *
182 * Setup Start Address 2 Register (F101h) for DDP
183 */
184 static int onenand_bufferram_address(struct onenand_chip *this, int block)
185 {
186 /* Device BufferRAM Select */
187 if (block & this->density_mask)
188 return ONENAND_DDP_CHIP1;
189
190 return ONENAND_DDP_CHIP0;
191 }
192
193 /**
194 * onenand_page_address - [DEFAULT] Get page address
195 * @param page the page address
196 * @param sector the sector address
197 * @return combined page and sector address
198 *
199 * Setup Start Address 8 Register (F107h)
200 */
201 static int onenand_page_address(int page, int sector)
202 {
203 /* Flash Page Address, Flash Sector Address */
204 int fpa, fsa;
205
206 fpa = page & ONENAND_FPA_MASK;
207 fsa = sector & ONENAND_FSA_MASK;
208
209 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
210 }
211
212 /**
213 * onenand_buffer_address - [DEFAULT] Get buffer address
214 * @param dataram1 DataRAM index
215 * @param sectors the sector address
216 * @param count the number of sectors
217 * @return the start buffer value
218 *
219 * Setup Start Buffer Register (F200h)
220 */
221 static int onenand_buffer_address(int dataram1, int sectors, int count)
222 {
223 int bsa, bsc;
224
225 /* BufferRAM Sector Address */
226 bsa = sectors & ONENAND_BSA_MASK;
227
228 if (dataram1)
229 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
230 else
231 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
232
233 /* BufferRAM Sector Count */
234 bsc = count & ONENAND_BSC_MASK;
235
236 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
237 }
238
239 /**
240 * flexonenand_block- For given address return block number
241 * @param this - OneNAND device structure
242 * @param addr - Address for which block number is needed
243 */
244 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
245 {
246 unsigned boundary, blk, die = 0;
247
248 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
249 die = 1;
250 addr -= this->diesize[0];
251 }
252
253 boundary = this->boundary[die];
254
255 blk = addr >> (this->erase_shift - 1);
256 if (blk > boundary)
257 blk = (blk + boundary + 1) >> 1;
258
259 blk += die ? this->density_mask : 0;
260 return blk;
261 }
262
263 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
264 {
265 if (!FLEXONENAND(this))
266 return addr >> this->erase_shift;
267 return flexonenand_block(this, addr);
268 }
269
270 /**
271 * flexonenand_addr - Return address of the block
272 * @this: OneNAND device structure
273 * @block: Block number on Flex-OneNAND
274 *
275 * Return address of the block
276 */
277 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
278 {
279 loff_t ofs = 0;
280 int die = 0, boundary;
281
282 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
283 block -= this->density_mask;
284 die = 1;
285 ofs = this->diesize[0];
286 }
287
288 boundary = this->boundary[die];
289 ofs += (loff_t)block << (this->erase_shift - 1);
290 if (block > (boundary + 1))
291 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
292 return ofs;
293 }
294
295 loff_t onenand_addr(struct onenand_chip *this, int block)
296 {
297 if (!FLEXONENAND(this))
298 return (loff_t)block << this->erase_shift;
299 return flexonenand_addr(this, block);
300 }
301 EXPORT_SYMBOL(onenand_addr);
302
303 /**
304 * onenand_get_density - [DEFAULT] Get OneNAND density
305 * @param dev_id OneNAND device ID
306 *
307 * Get OneNAND density from device ID
308 */
309 static inline int onenand_get_density(int dev_id)
310 {
311 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
312 return (density & ONENAND_DEVICE_DENSITY_MASK);
313 }
314
315 /**
316 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
317 * @param mtd MTD device structure
318 * @param addr address whose erase region needs to be identified
319 */
320 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
321 {
322 int i;
323
324 for (i = 0; i < mtd->numeraseregions; i++)
325 if (addr < mtd->eraseregions[i].offset)
326 break;
327 return i - 1;
328 }
329 EXPORT_SYMBOL(flexonenand_region);
330
331 /**
332 * onenand_command - [DEFAULT] Send command to OneNAND device
333 * @param mtd MTD device structure
334 * @param cmd the command to be sent
335 * @param addr offset to read from or write to
336 * @param len number of bytes to read or write
337 *
338 * Send command to OneNAND device. This function is used for middle/large page
339 * devices (1KB/2KB Bytes per page)
340 */
341 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
342 {
343 struct onenand_chip *this = mtd->priv;
344 int value, block, page;
345
346 /* Address translation */
347 switch (cmd) {
348 case ONENAND_CMD_UNLOCK:
349 case ONENAND_CMD_LOCK:
350 case ONENAND_CMD_LOCK_TIGHT:
351 case ONENAND_CMD_UNLOCK_ALL:
352 block = -1;
353 page = -1;
354 break;
355
356 case FLEXONENAND_CMD_PI_ACCESS:
357 /* addr contains die index */
358 block = addr * this->density_mask;
359 page = -1;
360 break;
361
362 case ONENAND_CMD_ERASE:
363 case ONENAND_CMD_MULTIBLOCK_ERASE:
364 case ONENAND_CMD_ERASE_VERIFY:
365 case ONENAND_CMD_BUFFERRAM:
366 case ONENAND_CMD_OTP_ACCESS:
367 block = onenand_block(this, addr);
368 page = -1;
369 break;
370
371 case FLEXONENAND_CMD_READ_PI:
372 cmd = ONENAND_CMD_READ;
373 block = addr * this->density_mask;
374 page = 0;
375 break;
376
377 default:
378 block = onenand_block(this, addr);
379 page = (int) (addr - onenand_addr(this, block)) >> this->page_shift;
380
381 if (ONENAND_IS_2PLANE(this)) {
382 /* Make the even block number */
383 block &= ~1;
384 /* Is it the odd plane? */
385 if (addr & this->writesize)
386 block++;
387 page >>= 1;
388 }
389 page &= this->page_mask;
390 break;
391 }
392
393 /* NOTE: The setting order of the registers is very important! */
394 if (cmd == ONENAND_CMD_BUFFERRAM) {
395 /* Select DataRAM for DDP */
396 value = onenand_bufferram_address(this, block);
397 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
398
399 if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this))
400 /* It is always BufferRAM0 */
401 ONENAND_SET_BUFFERRAM0(this);
402 else
403 /* Switch to the next data buffer */
404 ONENAND_SET_NEXT_BUFFERRAM(this);
405
406 return 0;
407 }
408
409 if (block != -1) {
410 /* Write 'DFS, FBA' of Flash */
411 value = onenand_block_address(this, block);
412 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
413
414 /* Select DataRAM for DDP */
415 value = onenand_bufferram_address(this, block);
416 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
417 }
418
419 if (page != -1) {
420 /* Now we use page size operation */
421 int sectors = 0, count = 0;
422 int dataram;
423
424 switch (cmd) {
425 case FLEXONENAND_CMD_RECOVER_LSB:
426 case ONENAND_CMD_READ:
427 case ONENAND_CMD_READOOB:
428 if (ONENAND_IS_MLC(this))
429 /* It is always BufferRAM0 */
430 dataram = ONENAND_SET_BUFFERRAM0(this);
431 else
432 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
433 break;
434
435 default:
436 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
437 cmd = ONENAND_CMD_2X_PROG;
438 dataram = ONENAND_CURRENT_BUFFERRAM(this);
439 break;
440 }
441
442 /* Write 'FPA, FSA' of Flash */
443 value = onenand_page_address(page, sectors);
444 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
445
446 /* Write 'BSA, BSC' of DataRAM */
447 value = onenand_buffer_address(dataram, sectors, count);
448 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
449 }
450
451 /* Interrupt clear */
452 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
453
454 /* Write command */
455 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
456
457 return 0;
458 }
459
460 /**
461 * onenand_read_ecc - return ecc status
462 * @param this onenand chip structure
463 */
464 static inline int onenand_read_ecc(struct onenand_chip *this)
465 {
466 int ecc, i, result = 0;
467
468 if (!FLEXONENAND(this))
469 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
470
471 for (i = 0; i < 4; i++) {
472 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i);
473 if (likely(!ecc))
474 continue;
475 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
476 return ONENAND_ECC_2BIT_ALL;
477 else
478 result = ONENAND_ECC_1BIT_ALL;
479 }
480
481 return result;
482 }
483
484 /**
485 * onenand_wait - [DEFAULT] wait until the command is done
486 * @param mtd MTD device structure
487 * @param state state to select the max. timeout value
488 *
489 * Wait for command done. This applies to all OneNAND command
490 * Read can take up to 30us, erase up to 2ms and program up to 350us
491 * according to general OneNAND specs
492 */
493 static int onenand_wait(struct mtd_info *mtd, int state)
494 {
495 struct onenand_chip * this = mtd->priv;
496 unsigned long timeout;
497 unsigned int flags = ONENAND_INT_MASTER;
498 unsigned int interrupt = 0;
499 unsigned int ctrl;
500
501 /* The 20 msec is enough */
502 timeout = jiffies + msecs_to_jiffies(20);
503 while (time_before(jiffies, timeout)) {
504 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
505
506 if (interrupt & flags)
507 break;
508
509 if (state != FL_READING && state != FL_PREPARING_ERASE)
510 cond_resched();
511 }
512 /* To get correct interrupt status in timeout case */
513 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
514
515 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
516
517 /*
518 * In the Spec. it checks the controller status first
519 * However if you get the correct information in case of
520 * power off recovery (POR) test, it should read ECC status first
521 */
522 if (interrupt & ONENAND_INT_READ) {
523 int ecc = onenand_read_ecc(this);
524 if (ecc) {
525 if (ecc & ONENAND_ECC_2BIT_ALL) {
526 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
527 __func__, ecc);
528 mtd->ecc_stats.failed++;
529 return -EBADMSG;
530 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
531 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
532 __func__, ecc);
533 mtd->ecc_stats.corrected++;
534 }
535 }
536 } else if (state == FL_READING) {
537 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
538 __func__, ctrl, interrupt);
539 return -EIO;
540 }
541
542 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
543 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
544 __func__, ctrl, interrupt);
545 return -EIO;
546 }
547
548 if (!(interrupt & ONENAND_INT_MASTER)) {
549 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
550 __func__, ctrl, interrupt);
551 return -EIO;
552 }
553
554 /* If there's controller error, it's a real error */
555 if (ctrl & ONENAND_CTRL_ERROR) {
556 printk(KERN_ERR "%s: controller error = 0x%04x\n",
557 __func__, ctrl);
558 if (ctrl & ONENAND_CTRL_LOCK)
559 printk(KERN_ERR "%s: it's locked error.\n", __func__);
560 return -EIO;
561 }
562
563 return 0;
564 }
565
566 /*
567 * onenand_interrupt - [DEFAULT] onenand interrupt handler
568 * @param irq onenand interrupt number
569 * @param dev_id interrupt data
570 *
571 * complete the work
572 */
573 static irqreturn_t onenand_interrupt(int irq, void *data)
574 {
575 struct onenand_chip *this = data;
576
577 /* To handle shared interrupt */
578 if (!this->complete.done)
579 complete(&this->complete);
580
581 return IRQ_HANDLED;
582 }
583
584 /*
585 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
586 * @param mtd MTD device structure
587 * @param state state to select the max. timeout value
588 *
589 * Wait for command done.
590 */
591 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
592 {
593 struct onenand_chip *this = mtd->priv;
594
595 wait_for_completion(&this->complete);
596
597 return onenand_wait(mtd, state);
598 }
599
600 /*
601 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
602 * @param mtd MTD device structure
603 * @param state state to select the max. timeout value
604 *
605 * Try interrupt based wait (It is used one-time)
606 */
607 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
608 {
609 struct onenand_chip *this = mtd->priv;
610 unsigned long remain, timeout;
611
612 /* We use interrupt wait first */
613 this->wait = onenand_interrupt_wait;
614
615 timeout = msecs_to_jiffies(100);
616 remain = wait_for_completion_timeout(&this->complete, timeout);
617 if (!remain) {
618 printk(KERN_INFO "OneNAND: There's no interrupt. "
619 "We use the normal wait\n");
620
621 /* Release the irq */
622 free_irq(this->irq, this);
623
624 this->wait = onenand_wait;
625 }
626
627 return onenand_wait(mtd, state);
628 }
629
630 /*
631 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
632 * @param mtd MTD device structure
633 *
634 * There's two method to wait onenand work
635 * 1. polling - read interrupt status register
636 * 2. interrupt - use the kernel interrupt method
637 */
638 static void onenand_setup_wait(struct mtd_info *mtd)
639 {
640 struct onenand_chip *this = mtd->priv;
641 int syscfg;
642
643 init_completion(&this->complete);
644
645 if (this->irq <= 0) {
646 this->wait = onenand_wait;
647 return;
648 }
649
650 if (request_irq(this->irq, &onenand_interrupt,
651 IRQF_SHARED, "onenand", this)) {
652 /* If we can't get irq, use the normal wait */
653 this->wait = onenand_wait;
654 return;
655 }
656
657 /* Enable interrupt */
658 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
659 syscfg |= ONENAND_SYS_CFG1_IOBE;
660 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
661
662 this->wait = onenand_try_interrupt_wait;
663 }
664
665 /**
666 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
667 * @param mtd MTD data structure
668 * @param area BufferRAM area
669 * @return offset given area
670 *
671 * Return BufferRAM offset given area
672 */
673 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
674 {
675 struct onenand_chip *this = mtd->priv;
676
677 if (ONENAND_CURRENT_BUFFERRAM(this)) {
678 /* Note: the 'this->writesize' is a real page size */
679 if (area == ONENAND_DATARAM)
680 return this->writesize;
681 if (area == ONENAND_SPARERAM)
682 return mtd->oobsize;
683 }
684
685 return 0;
686 }
687
688 /**
689 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
690 * @param mtd MTD data structure
691 * @param area BufferRAM area
692 * @param buffer the databuffer to put/get data
693 * @param offset offset to read from or write to
694 * @param count number of bytes to read/write
695 *
696 * Read the BufferRAM area
697 */
698 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
699 unsigned char *buffer, int offset, size_t count)
700 {
701 struct onenand_chip *this = mtd->priv;
702 void __iomem *bufferram;
703
704 bufferram = this->base + area;
705
706 bufferram += onenand_bufferram_offset(mtd, area);
707
708 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
709 unsigned short word;
710
711 /* Align with word(16-bit) size */
712 count--;
713
714 /* Read word and save byte */
715 word = this->read_word(bufferram + offset + count);
716 buffer[count] = (word & 0xff);
717 }
718
719 memcpy(buffer, bufferram + offset, count);
720
721 return 0;
722 }
723
724 /**
725 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
726 * @param mtd MTD data structure
727 * @param area BufferRAM area
728 * @param buffer the databuffer to put/get data
729 * @param offset offset to read from or write to
730 * @param count number of bytes to read/write
731 *
732 * Read the BufferRAM area with Sync. Burst Mode
733 */
734 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
735 unsigned char *buffer, int offset, size_t count)
736 {
737 struct onenand_chip *this = mtd->priv;
738 void __iomem *bufferram;
739
740 bufferram = this->base + area;
741
742 bufferram += onenand_bufferram_offset(mtd, area);
743
744 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
745
746 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
747 unsigned short word;
748
749 /* Align with word(16-bit) size */
750 count--;
751
752 /* Read word and save byte */
753 word = this->read_word(bufferram + offset + count);
754 buffer[count] = (word & 0xff);
755 }
756
757 memcpy(buffer, bufferram + offset, count);
758
759 this->mmcontrol(mtd, 0);
760
761 return 0;
762 }
763
764 /**
765 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
766 * @param mtd MTD data structure
767 * @param area BufferRAM area
768 * @param buffer the databuffer to put/get data
769 * @param offset offset to read from or write to
770 * @param count number of bytes to read/write
771 *
772 * Write the BufferRAM area
773 */
774 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
775 const unsigned char *buffer, int offset, size_t count)
776 {
777 struct onenand_chip *this = mtd->priv;
778 void __iomem *bufferram;
779
780 bufferram = this->base + area;
781
782 bufferram += onenand_bufferram_offset(mtd, area);
783
784 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
785 unsigned short word;
786 int byte_offset;
787
788 /* Align with word(16-bit) size */
789 count--;
790
791 /* Calculate byte access offset */
792 byte_offset = offset + count;
793
794 /* Read word and save byte */
795 word = this->read_word(bufferram + byte_offset);
796 word = (word & ~0xff) | buffer[count];
797 this->write_word(word, bufferram + byte_offset);
798 }
799
800 memcpy(bufferram + offset, buffer, count);
801
802 return 0;
803 }
804
805 /**
806 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
807 * @param mtd MTD data structure
808 * @param addr address to check
809 * @return blockpage address
810 *
811 * Get blockpage address at 2x program mode
812 */
813 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
814 {
815 struct onenand_chip *this = mtd->priv;
816 int blockpage, block, page;
817
818 /* Calculate the even block number */
819 block = (int) (addr >> this->erase_shift) & ~1;
820 /* Is it the odd plane? */
821 if (addr & this->writesize)
822 block++;
823 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
824 blockpage = (block << 7) | page;
825
826 return blockpage;
827 }
828
829 /**
830 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
831 * @param mtd MTD data structure
832 * @param addr address to check
833 * @return 1 if there are valid data, otherwise 0
834 *
835 * Check bufferram if there is data we required
836 */
837 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
838 {
839 struct onenand_chip *this = mtd->priv;
840 int blockpage, found = 0;
841 unsigned int i;
842
843 if (ONENAND_IS_2PLANE(this))
844 blockpage = onenand_get_2x_blockpage(mtd, addr);
845 else
846 blockpage = (int) (addr >> this->page_shift);
847
848 /* Is there valid data? */
849 i = ONENAND_CURRENT_BUFFERRAM(this);
850 if (this->bufferram[i].blockpage == blockpage)
851 found = 1;
852 else {
853 /* Check another BufferRAM */
854 i = ONENAND_NEXT_BUFFERRAM(this);
855 if (this->bufferram[i].blockpage == blockpage) {
856 ONENAND_SET_NEXT_BUFFERRAM(this);
857 found = 1;
858 }
859 }
860
861 if (found && ONENAND_IS_DDP(this)) {
862 /* Select DataRAM for DDP */
863 int block = onenand_block(this, addr);
864 int value = onenand_bufferram_address(this, block);
865 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
866 }
867
868 return found;
869 }
870
871 /**
872 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
873 * @param mtd MTD data structure
874 * @param addr address to update
875 * @param valid valid flag
876 *
877 * Update BufferRAM information
878 */
879 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
880 int valid)
881 {
882 struct onenand_chip *this = mtd->priv;
883 int blockpage;
884 unsigned int i;
885
886 if (ONENAND_IS_2PLANE(this))
887 blockpage = onenand_get_2x_blockpage(mtd, addr);
888 else
889 blockpage = (int) (addr >> this->page_shift);
890
891 /* Invalidate another BufferRAM */
892 i = ONENAND_NEXT_BUFFERRAM(this);
893 if (this->bufferram[i].blockpage == blockpage)
894 this->bufferram[i].blockpage = -1;
895
896 /* Update BufferRAM */
897 i = ONENAND_CURRENT_BUFFERRAM(this);
898 if (valid)
899 this->bufferram[i].blockpage = blockpage;
900 else
901 this->bufferram[i].blockpage = -1;
902 }
903
904 /**
905 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
906 * @param mtd MTD data structure
907 * @param addr start address to invalidate
908 * @param len length to invalidate
909 *
910 * Invalidate BufferRAM information
911 */
912 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
913 unsigned int len)
914 {
915 struct onenand_chip *this = mtd->priv;
916 int i;
917 loff_t end_addr = addr + len;
918
919 /* Invalidate BufferRAM */
920 for (i = 0; i < MAX_BUFFERRAM; i++) {
921 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
922 if (buf_addr >= addr && buf_addr < end_addr)
923 this->bufferram[i].blockpage = -1;
924 }
925 }
926
927 /**
928 * onenand_get_device - [GENERIC] Get chip for selected access
929 * @param mtd MTD device structure
930 * @param new_state the state which is requested
931 *
932 * Get the device and lock it for exclusive access
933 */
934 static int onenand_get_device(struct mtd_info *mtd, int new_state)
935 {
936 struct onenand_chip *this = mtd->priv;
937 DECLARE_WAITQUEUE(wait, current);
938
939 /*
940 * Grab the lock and see if the device is available
941 */
942 while (1) {
943 spin_lock(&this->chip_lock);
944 if (this->state == FL_READY) {
945 this->state = new_state;
946 spin_unlock(&this->chip_lock);
947 break;
948 }
949 if (new_state == FL_PM_SUSPENDED) {
950 spin_unlock(&this->chip_lock);
951 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
952 }
953 set_current_state(TASK_UNINTERRUPTIBLE);
954 add_wait_queue(&this->wq, &wait);
955 spin_unlock(&this->chip_lock);
956 schedule();
957 remove_wait_queue(&this->wq, &wait);
958 }
959
960 return 0;
961 }
962
963 /**
964 * onenand_release_device - [GENERIC] release chip
965 * @param mtd MTD device structure
966 *
967 * Deselect, release chip lock and wake up anyone waiting on the device
968 */
969 static void onenand_release_device(struct mtd_info *mtd)
970 {
971 struct onenand_chip *this = mtd->priv;
972
973 /* Release the chip */
974 spin_lock(&this->chip_lock);
975 this->state = FL_READY;
976 wake_up(&this->wq);
977 spin_unlock(&this->chip_lock);
978 }
979
980 /**
981 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
982 * @param mtd MTD device structure
983 * @param buf destination address
984 * @param column oob offset to read from
985 * @param thislen oob length to read
986 */
987 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
988 int thislen)
989 {
990 struct onenand_chip *this = mtd->priv;
991 struct nand_oobfree *free;
992 int readcol = column;
993 int readend = column + thislen;
994 int lastgap = 0;
995 unsigned int i;
996 uint8_t *oob_buf = this->oob_buf;
997
998 free = this->ecclayout->oobfree;
999 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1000 if (readcol >= lastgap)
1001 readcol += free->offset - lastgap;
1002 if (readend >= lastgap)
1003 readend += free->offset - lastgap;
1004 lastgap = free->offset + free->length;
1005 }
1006 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1007 free = this->ecclayout->oobfree;
1008 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1009 int free_end = free->offset + free->length;
1010 if (free->offset < readend && free_end > readcol) {
1011 int st = max_t(int,free->offset,readcol);
1012 int ed = min_t(int,free_end,readend);
1013 int n = ed - st;
1014 memcpy(buf, oob_buf + st, n);
1015 buf += n;
1016 } else if (column == 0)
1017 break;
1018 }
1019 return 0;
1020 }
1021
1022 /**
1023 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1024 * @param mtd MTD device structure
1025 * @param addr address to recover
1026 * @param status return value from onenand_wait / onenand_bbt_wait
1027 *
1028 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1029 * lower page address and MSB page has higher page address in paired pages.
1030 * If power off occurs during MSB page program, the paired LSB page data can
1031 * become corrupt. LSB page recovery read is a way to read LSB page though page
1032 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1033 * read after power up, issue LSB page recovery read.
1034 */
1035 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1036 {
1037 struct onenand_chip *this = mtd->priv;
1038 int i;
1039
1040 /* Recovery is only for Flex-OneNAND */
1041 if (!FLEXONENAND(this))
1042 return status;
1043
1044 /* check if we failed due to uncorrectable error */
1045 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
1046 return status;
1047
1048 /* check if address lies in MLC region */
1049 i = flexonenand_region(mtd, addr);
1050 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1051 return status;
1052
1053 /* We are attempting to reread, so decrement stats.failed
1054 * which was incremented by onenand_wait due to read failure
1055 */
1056 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1057 __func__);
1058 mtd->ecc_stats.failed--;
1059
1060 /* Issue the LSB page recovery command */
1061 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1062 return this->wait(mtd, FL_READING);
1063 }
1064
1065 /**
1066 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1067 * @param mtd MTD device structure
1068 * @param from offset to read from
1069 * @param ops: oob operation description structure
1070 *
1071 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1072 * So, read-while-load is not present.
1073 */
1074 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1075 struct mtd_oob_ops *ops)
1076 {
1077 struct onenand_chip *this = mtd->priv;
1078 struct mtd_ecc_stats stats;
1079 size_t len = ops->len;
1080 size_t ooblen = ops->ooblen;
1081 u_char *buf = ops->datbuf;
1082 u_char *oobbuf = ops->oobbuf;
1083 int read = 0, column, thislen;
1084 int oobread = 0, oobcolumn, thisooblen, oobsize;
1085 int ret = 0;
1086 int writesize = this->writesize;
1087
1088 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1089 __func__, (unsigned int) from, (int) len);
1090
1091 if (ops->mode == MTD_OOB_AUTO)
1092 oobsize = this->ecclayout->oobavail;
1093 else
1094 oobsize = mtd->oobsize;
1095
1096 oobcolumn = from & (mtd->oobsize - 1);
1097
1098 /* Do not allow reads past end of device */
1099 if (from + len > mtd->size) {
1100 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1101 __func__);
1102 ops->retlen = 0;
1103 ops->oobretlen = 0;
1104 return -EINVAL;
1105 }
1106
1107 stats = mtd->ecc_stats;
1108
1109 while (read < len) {
1110 cond_resched();
1111
1112 thislen = min_t(int, writesize, len - read);
1113
1114 column = from & (writesize - 1);
1115 if (column + thislen > writesize)
1116 thislen = writesize - column;
1117
1118 if (!onenand_check_bufferram(mtd, from)) {
1119 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1120
1121 ret = this->wait(mtd, FL_READING);
1122 if (unlikely(ret))
1123 ret = onenand_recover_lsb(mtd, from, ret);
1124 onenand_update_bufferram(mtd, from, !ret);
1125 if (ret == -EBADMSG)
1126 ret = 0;
1127 }
1128
1129 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1130 if (oobbuf) {
1131 thisooblen = oobsize - oobcolumn;
1132 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1133
1134 if (ops->mode == MTD_OOB_AUTO)
1135 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1136 else
1137 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1138 oobread += thisooblen;
1139 oobbuf += thisooblen;
1140 oobcolumn = 0;
1141 }
1142
1143 read += thislen;
1144 if (read == len)
1145 break;
1146
1147 from += thislen;
1148 buf += thislen;
1149 }
1150
1151 /*
1152 * Return success, if no ECC failures, else -EBADMSG
1153 * fs driver will take care of that, because
1154 * retlen == desired len and result == -EBADMSG
1155 */
1156 ops->retlen = read;
1157 ops->oobretlen = oobread;
1158
1159 if (ret)
1160 return ret;
1161
1162 if (mtd->ecc_stats.failed - stats.failed)
1163 return -EBADMSG;
1164
1165 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1166 }
1167
1168 /**
1169 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1170 * @param mtd MTD device structure
1171 * @param from offset to read from
1172 * @param ops: oob operation description structure
1173 *
1174 * OneNAND read main and/or out-of-band data
1175 */
1176 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1177 struct mtd_oob_ops *ops)
1178 {
1179 struct onenand_chip *this = mtd->priv;
1180 struct mtd_ecc_stats stats;
1181 size_t len = ops->len;
1182 size_t ooblen = ops->ooblen;
1183 u_char *buf = ops->datbuf;
1184 u_char *oobbuf = ops->oobbuf;
1185 int read = 0, column, thislen;
1186 int oobread = 0, oobcolumn, thisooblen, oobsize;
1187 int ret = 0, boundary = 0;
1188 int writesize = this->writesize;
1189
1190 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1191 __func__, (unsigned int) from, (int) len);
1192
1193 if (ops->mode == MTD_OOB_AUTO)
1194 oobsize = this->ecclayout->oobavail;
1195 else
1196 oobsize = mtd->oobsize;
1197
1198 oobcolumn = from & (mtd->oobsize - 1);
1199
1200 /* Do not allow reads past end of device */
1201 if ((from + len) > mtd->size) {
1202 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1203 __func__);
1204 ops->retlen = 0;
1205 ops->oobretlen = 0;
1206 return -EINVAL;
1207 }
1208
1209 stats = mtd->ecc_stats;
1210
1211 /* Read-while-load method */
1212
1213 /* Do first load to bufferRAM */
1214 if (read < len) {
1215 if (!onenand_check_bufferram(mtd, from)) {
1216 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1217 ret = this->wait(mtd, FL_READING);
1218 onenand_update_bufferram(mtd, from, !ret);
1219 if (ret == -EBADMSG)
1220 ret = 0;
1221 }
1222 }
1223
1224 thislen = min_t(int, writesize, len - read);
1225 column = from & (writesize - 1);
1226 if (column + thislen > writesize)
1227 thislen = writesize - column;
1228
1229 while (!ret) {
1230 /* If there is more to load then start next load */
1231 from += thislen;
1232 if (read + thislen < len) {
1233 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1234 /*
1235 * Chip boundary handling in DDP
1236 * Now we issued chip 1 read and pointed chip 1
1237 * bufferram so we have to point chip 0 bufferram.
1238 */
1239 if (ONENAND_IS_DDP(this) &&
1240 unlikely(from == (this->chipsize >> 1))) {
1241 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1242 boundary = 1;
1243 } else
1244 boundary = 0;
1245 ONENAND_SET_PREV_BUFFERRAM(this);
1246 }
1247 /* While load is going, read from last bufferRAM */
1248 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1249
1250 /* Read oob area if needed */
1251 if (oobbuf) {
1252 thisooblen = oobsize - oobcolumn;
1253 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1254
1255 if (ops->mode == MTD_OOB_AUTO)
1256 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1257 else
1258 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1259 oobread += thisooblen;
1260 oobbuf += thisooblen;
1261 oobcolumn = 0;
1262 }
1263
1264 /* See if we are done */
1265 read += thislen;
1266 if (read == len)
1267 break;
1268 /* Set up for next read from bufferRAM */
1269 if (unlikely(boundary))
1270 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1271 ONENAND_SET_NEXT_BUFFERRAM(this);
1272 buf += thislen;
1273 thislen = min_t(int, writesize, len - read);
1274 column = 0;
1275 cond_resched();
1276 /* Now wait for load */
1277 ret = this->wait(mtd, FL_READING);
1278 onenand_update_bufferram(mtd, from, !ret);
1279 if (ret == -EBADMSG)
1280 ret = 0;
1281 }
1282
1283 /*
1284 * Return success, if no ECC failures, else -EBADMSG
1285 * fs driver will take care of that, because
1286 * retlen == desired len and result == -EBADMSG
1287 */
1288 ops->retlen = read;
1289 ops->oobretlen = oobread;
1290
1291 if (ret)
1292 return ret;
1293
1294 if (mtd->ecc_stats.failed - stats.failed)
1295 return -EBADMSG;
1296
1297 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1298 }
1299
1300 /**
1301 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1302 * @param mtd MTD device structure
1303 * @param from offset to read from
1304 * @param ops: oob operation description structure
1305 *
1306 * OneNAND read out-of-band data from the spare area
1307 */
1308 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1309 struct mtd_oob_ops *ops)
1310 {
1311 struct onenand_chip *this = mtd->priv;
1312 struct mtd_ecc_stats stats;
1313 int read = 0, thislen, column, oobsize;
1314 size_t len = ops->ooblen;
1315 mtd_oob_mode_t mode = ops->mode;
1316 u_char *buf = ops->oobbuf;
1317 int ret = 0, readcmd;
1318
1319 from += ops->ooboffs;
1320
1321 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1322 __func__, (unsigned int) from, (int) len);
1323
1324 /* Initialize return length value */
1325 ops->oobretlen = 0;
1326
1327 if (mode == MTD_OOB_AUTO)
1328 oobsize = this->ecclayout->oobavail;
1329 else
1330 oobsize = mtd->oobsize;
1331
1332 column = from & (mtd->oobsize - 1);
1333
1334 if (unlikely(column >= oobsize)) {
1335 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1336 __func__);
1337 return -EINVAL;
1338 }
1339
1340 /* Do not allow reads past end of device */
1341 if (unlikely(from >= mtd->size ||
1342 column + len > ((mtd->size >> this->page_shift) -
1343 (from >> this->page_shift)) * oobsize)) {
1344 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1345 __func__);
1346 return -EINVAL;
1347 }
1348
1349 stats = mtd->ecc_stats;
1350
1351 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1352
1353 while (read < len) {
1354 cond_resched();
1355
1356 thislen = oobsize - column;
1357 thislen = min_t(int, thislen, len);
1358
1359 this->command(mtd, readcmd, from, mtd->oobsize);
1360
1361 onenand_update_bufferram(mtd, from, 0);
1362
1363 ret = this->wait(mtd, FL_READING);
1364 if (unlikely(ret))
1365 ret = onenand_recover_lsb(mtd, from, ret);
1366
1367 if (ret && ret != -EBADMSG) {
1368 printk(KERN_ERR "%s: read failed = 0x%x\n",
1369 __func__, ret);
1370 break;
1371 }
1372
1373 if (mode == MTD_OOB_AUTO)
1374 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1375 else
1376 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1377
1378 read += thislen;
1379
1380 if (read == len)
1381 break;
1382
1383 buf += thislen;
1384
1385 /* Read more? */
1386 if (read < len) {
1387 /* Page size */
1388 from += mtd->writesize;
1389 column = 0;
1390 }
1391 }
1392
1393 ops->oobretlen = read;
1394
1395 if (ret)
1396 return ret;
1397
1398 if (mtd->ecc_stats.failed - stats.failed)
1399 return -EBADMSG;
1400
1401 return 0;
1402 }
1403
1404 /**
1405 * onenand_read - [MTD Interface] Read data from flash
1406 * @param mtd MTD device structure
1407 * @param from offset to read from
1408 * @param len number of bytes to read
1409 * @param retlen pointer to variable to store the number of read bytes
1410 * @param buf the databuffer to put data
1411 *
1412 * Read with ecc
1413 */
1414 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1415 size_t *retlen, u_char *buf)
1416 {
1417 struct onenand_chip *this = mtd->priv;
1418 struct mtd_oob_ops ops = {
1419 .len = len,
1420 .ooblen = 0,
1421 .datbuf = buf,
1422 .oobbuf = NULL,
1423 };
1424 int ret;
1425
1426 onenand_get_device(mtd, FL_READING);
1427 ret = ONENAND_IS_MLC(this) ?
1428 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1429 onenand_read_ops_nolock(mtd, from, &ops);
1430 onenand_release_device(mtd);
1431
1432 *retlen = ops.retlen;
1433 return ret;
1434 }
1435
1436 /**
1437 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1438 * @param mtd: MTD device structure
1439 * @param from: offset to read from
1440 * @param ops: oob operation description structure
1441
1442 * Read main and/or out-of-band
1443 */
1444 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1445 struct mtd_oob_ops *ops)
1446 {
1447 struct onenand_chip *this = mtd->priv;
1448 int ret;
1449
1450 switch (ops->mode) {
1451 case MTD_OOB_PLACE:
1452 case MTD_OOB_AUTO:
1453 break;
1454 case MTD_OOB_RAW:
1455 /* Not implemented yet */
1456 default:
1457 return -EINVAL;
1458 }
1459
1460 onenand_get_device(mtd, FL_READING);
1461 if (ops->datbuf)
1462 ret = ONENAND_IS_MLC(this) ?
1463 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1464 onenand_read_ops_nolock(mtd, from, ops);
1465 else
1466 ret = onenand_read_oob_nolock(mtd, from, ops);
1467 onenand_release_device(mtd);
1468
1469 return ret;
1470 }
1471
1472 /**
1473 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1474 * @param mtd MTD device structure
1475 * @param state state to select the max. timeout value
1476 *
1477 * Wait for command done.
1478 */
1479 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1480 {
1481 struct onenand_chip *this = mtd->priv;
1482 unsigned long timeout;
1483 unsigned int interrupt;
1484 unsigned int ctrl;
1485
1486 /* The 20 msec is enough */
1487 timeout = jiffies + msecs_to_jiffies(20);
1488 while (time_before(jiffies, timeout)) {
1489 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1490 if (interrupt & ONENAND_INT_MASTER)
1491 break;
1492 }
1493 /* To get correct interrupt status in timeout case */
1494 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1495 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1496
1497 if (interrupt & ONENAND_INT_READ) {
1498 int ecc = onenand_read_ecc(this);
1499 if (ecc & ONENAND_ECC_2BIT_ALL) {
1500 printk(KERN_WARNING "%s: ecc error = 0x%04x, "
1501 "controller error 0x%04x\n",
1502 __func__, ecc, ctrl);
1503 return ONENAND_BBT_READ_ECC_ERROR;
1504 }
1505 } else {
1506 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
1507 __func__, ctrl, interrupt);
1508 return ONENAND_BBT_READ_FATAL_ERROR;
1509 }
1510
1511 /* Initial bad block case: 0x2400 or 0x0400 */
1512 if (ctrl & ONENAND_CTRL_ERROR) {
1513 printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
1514 __func__, ctrl);
1515 return ONENAND_BBT_READ_ERROR;
1516 }
1517
1518 return 0;
1519 }
1520
1521 /**
1522 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1523 * @param mtd MTD device structure
1524 * @param from offset to read from
1525 * @param ops oob operation description structure
1526 *
1527 * OneNAND read out-of-band data from the spare area for bbt scan
1528 */
1529 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1530 struct mtd_oob_ops *ops)
1531 {
1532 struct onenand_chip *this = mtd->priv;
1533 int read = 0, thislen, column;
1534 int ret = 0, readcmd;
1535 size_t len = ops->ooblen;
1536 u_char *buf = ops->oobbuf;
1537
1538 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
1539 __func__, (unsigned int) from, len);
1540
1541 /* Initialize return value */
1542 ops->oobretlen = 0;
1543
1544 /* Do not allow reads past end of device */
1545 if (unlikely((from + len) > mtd->size)) {
1546 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1547 __func__);
1548 return ONENAND_BBT_READ_FATAL_ERROR;
1549 }
1550
1551 /* Grab the lock and see if the device is available */
1552 onenand_get_device(mtd, FL_READING);
1553
1554 column = from & (mtd->oobsize - 1);
1555
1556 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1557
1558 while (read < len) {
1559 cond_resched();
1560
1561 thislen = mtd->oobsize - column;
1562 thislen = min_t(int, thislen, len);
1563
1564 this->command(mtd, readcmd, from, mtd->oobsize);
1565
1566 onenand_update_bufferram(mtd, from, 0);
1567
1568 ret = this->bbt_wait(mtd, FL_READING);
1569 if (unlikely(ret))
1570 ret = onenand_recover_lsb(mtd, from, ret);
1571
1572 if (ret)
1573 break;
1574
1575 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1576 read += thislen;
1577 if (read == len)
1578 break;
1579
1580 buf += thislen;
1581
1582 /* Read more? */
1583 if (read < len) {
1584 /* Update Page size */
1585 from += this->writesize;
1586 column = 0;
1587 }
1588 }
1589
1590 /* Deselect and wake up anyone waiting on the device */
1591 onenand_release_device(mtd);
1592
1593 ops->oobretlen = read;
1594 return ret;
1595 }
1596
1597 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1598 /**
1599 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1600 * @param mtd MTD device structure
1601 * @param buf the databuffer to verify
1602 * @param to offset to read from
1603 */
1604 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1605 {
1606 struct onenand_chip *this = mtd->priv;
1607 u_char *oob_buf = this->oob_buf;
1608 int status, i, readcmd;
1609
1610 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1611
1612 this->command(mtd, readcmd, to, mtd->oobsize);
1613 onenand_update_bufferram(mtd, to, 0);
1614 status = this->wait(mtd, FL_READING);
1615 if (status)
1616 return status;
1617
1618 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1619 for (i = 0; i < mtd->oobsize; i++)
1620 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1621 return -EBADMSG;
1622
1623 return 0;
1624 }
1625
1626 /**
1627 * onenand_verify - [GENERIC] verify the chip contents after a write
1628 * @param mtd MTD device structure
1629 * @param buf the databuffer to verify
1630 * @param addr offset to read from
1631 * @param len number of bytes to read and compare
1632 */
1633 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1634 {
1635 struct onenand_chip *this = mtd->priv;
1636 void __iomem *dataram;
1637 int ret = 0;
1638 int thislen, column;
1639
1640 while (len != 0) {
1641 thislen = min_t(int, this->writesize, len);
1642 column = addr & (this->writesize - 1);
1643 if (column + thislen > this->writesize)
1644 thislen = this->writesize - column;
1645
1646 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1647
1648 onenand_update_bufferram(mtd, addr, 0);
1649
1650 ret = this->wait(mtd, FL_READING);
1651 if (ret)
1652 return ret;
1653
1654 onenand_update_bufferram(mtd, addr, 1);
1655
1656 dataram = this->base + ONENAND_DATARAM;
1657 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1658
1659 if (memcmp(buf, dataram + column, thislen))
1660 return -EBADMSG;
1661
1662 len -= thislen;
1663 buf += thislen;
1664 addr += thislen;
1665 }
1666
1667 return 0;
1668 }
1669 #else
1670 #define onenand_verify(...) (0)
1671 #define onenand_verify_oob(...) (0)
1672 #endif
1673
1674 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1675
1676 static void onenand_panic_wait(struct mtd_info *mtd)
1677 {
1678 struct onenand_chip *this = mtd->priv;
1679 unsigned int interrupt;
1680 int i;
1681
1682 for (i = 0; i < 2000; i++) {
1683 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1684 if (interrupt & ONENAND_INT_MASTER)
1685 break;
1686 udelay(10);
1687 }
1688 }
1689
1690 /**
1691 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1692 * @param mtd MTD device structure
1693 * @param to offset to write to
1694 * @param len number of bytes to write
1695 * @param retlen pointer to variable to store the number of written bytes
1696 * @param buf the data to write
1697 *
1698 * Write with ECC
1699 */
1700 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1701 size_t *retlen, const u_char *buf)
1702 {
1703 struct onenand_chip *this = mtd->priv;
1704 int column, subpage;
1705 int written = 0;
1706 int ret = 0;
1707
1708 if (this->state == FL_PM_SUSPENDED)
1709 return -EBUSY;
1710
1711 /* Wait for any existing operation to clear */
1712 onenand_panic_wait(mtd);
1713
1714 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1715 __func__, (unsigned int) to, (int) len);
1716
1717 /* Initialize retlen, in case of early exit */
1718 *retlen = 0;
1719
1720 /* Do not allow writes past end of device */
1721 if (unlikely((to + len) > mtd->size)) {
1722 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1723 __func__);
1724 return -EINVAL;
1725 }
1726
1727 /* Reject writes, which are not page aligned */
1728 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1729 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1730 __func__);
1731 return -EINVAL;
1732 }
1733
1734 column = to & (mtd->writesize - 1);
1735
1736 /* Loop until all data write */
1737 while (written < len) {
1738 int thislen = min_t(int, mtd->writesize - column, len - written);
1739 u_char *wbuf = (u_char *) buf;
1740
1741 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1742
1743 /* Partial page write */
1744 subpage = thislen < mtd->writesize;
1745 if (subpage) {
1746 memset(this->page_buf, 0xff, mtd->writesize);
1747 memcpy(this->page_buf + column, buf, thislen);
1748 wbuf = this->page_buf;
1749 }
1750
1751 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1752 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1753
1754 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1755
1756 onenand_panic_wait(mtd);
1757
1758 /* In partial page write we don't update bufferram */
1759 onenand_update_bufferram(mtd, to, !ret && !subpage);
1760 if (ONENAND_IS_2PLANE(this)) {
1761 ONENAND_SET_BUFFERRAM1(this);
1762 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1763 }
1764
1765 if (ret) {
1766 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
1767 break;
1768 }
1769
1770 written += thislen;
1771
1772 if (written == len)
1773 break;
1774
1775 column = 0;
1776 to += thislen;
1777 buf += thislen;
1778 }
1779
1780 *retlen = written;
1781 return ret;
1782 }
1783
1784 /**
1785 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1786 * @param mtd MTD device structure
1787 * @param oob_buf oob buffer
1788 * @param buf source address
1789 * @param column oob offset to write to
1790 * @param thislen oob length to write
1791 */
1792 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1793 const u_char *buf, int column, int thislen)
1794 {
1795 struct onenand_chip *this = mtd->priv;
1796 struct nand_oobfree *free;
1797 int writecol = column;
1798 int writeend = column + thislen;
1799 int lastgap = 0;
1800 unsigned int i;
1801
1802 free = this->ecclayout->oobfree;
1803 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1804 if (writecol >= lastgap)
1805 writecol += free->offset - lastgap;
1806 if (writeend >= lastgap)
1807 writeend += free->offset - lastgap;
1808 lastgap = free->offset + free->length;
1809 }
1810 free = this->ecclayout->oobfree;
1811 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1812 int free_end = free->offset + free->length;
1813 if (free->offset < writeend && free_end > writecol) {
1814 int st = max_t(int,free->offset,writecol);
1815 int ed = min_t(int,free_end,writeend);
1816 int n = ed - st;
1817 memcpy(oob_buf + st, buf, n);
1818 buf += n;
1819 } else if (column == 0)
1820 break;
1821 }
1822 return 0;
1823 }
1824
1825 /**
1826 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1827 * @param mtd MTD device structure
1828 * @param to offset to write to
1829 * @param ops oob operation description structure
1830 *
1831 * Write main and/or oob with ECC
1832 */
1833 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1834 struct mtd_oob_ops *ops)
1835 {
1836 struct onenand_chip *this = mtd->priv;
1837 int written = 0, column, thislen = 0, subpage = 0;
1838 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1839 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1840 size_t len = ops->len;
1841 size_t ooblen = ops->ooblen;
1842 const u_char *buf = ops->datbuf;
1843 const u_char *oob = ops->oobbuf;
1844 u_char *oobbuf;
1845 int ret = 0;
1846
1847 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1848 __func__, (unsigned int) to, (int) len);
1849
1850 /* Initialize retlen, in case of early exit */
1851 ops->retlen = 0;
1852 ops->oobretlen = 0;
1853
1854 /* Do not allow writes past end of device */
1855 if (unlikely((to + len) > mtd->size)) {
1856 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1857 __func__);
1858 return -EINVAL;
1859 }
1860
1861 /* Reject writes, which are not page aligned */
1862 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1863 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1864 __func__);
1865 return -EINVAL;
1866 }
1867
1868 /* Check zero length */
1869 if (!len)
1870 return 0;
1871
1872 if (ops->mode == MTD_OOB_AUTO)
1873 oobsize = this->ecclayout->oobavail;
1874 else
1875 oobsize = mtd->oobsize;
1876
1877 oobcolumn = to & (mtd->oobsize - 1);
1878
1879 column = to & (mtd->writesize - 1);
1880
1881 /* Loop until all data write */
1882 while (1) {
1883 if (written < len) {
1884 u_char *wbuf = (u_char *) buf;
1885
1886 thislen = min_t(int, mtd->writesize - column, len - written);
1887 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1888
1889 cond_resched();
1890
1891 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1892
1893 /* Partial page write */
1894 subpage = thislen < mtd->writesize;
1895 if (subpage) {
1896 memset(this->page_buf, 0xff, mtd->writesize);
1897 memcpy(this->page_buf + column, buf, thislen);
1898 wbuf = this->page_buf;
1899 }
1900
1901 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1902
1903 if (oob) {
1904 oobbuf = this->oob_buf;
1905
1906 /* We send data to spare ram with oobsize
1907 * to prevent byte access */
1908 memset(oobbuf, 0xff, mtd->oobsize);
1909 if (ops->mode == MTD_OOB_AUTO)
1910 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1911 else
1912 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1913
1914 oobwritten += thisooblen;
1915 oob += thisooblen;
1916 oobcolumn = 0;
1917 } else
1918 oobbuf = (u_char *) ffchars;
1919
1920 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1921 } else
1922 ONENAND_SET_NEXT_BUFFERRAM(this);
1923
1924 /*
1925 * 2 PLANE, MLC, and Flex-OneNAND do not support
1926 * write-while-program feature.
1927 */
1928 if (!ONENAND_IS_2PLANE(this) && !first) {
1929 ONENAND_SET_PREV_BUFFERRAM(this);
1930
1931 ret = this->wait(mtd, FL_WRITING);
1932
1933 /* In partial page write we don't update bufferram */
1934 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1935 if (ret) {
1936 written -= prevlen;
1937 printk(KERN_ERR "%s: write failed %d\n",
1938 __func__, ret);
1939 break;
1940 }
1941
1942 if (written == len) {
1943 /* Only check verify write turn on */
1944 ret = onenand_verify(mtd, buf - len, to - len, len);
1945 if (ret)
1946 printk(KERN_ERR "%s: verify failed %d\n",
1947 __func__, ret);
1948 break;
1949 }
1950
1951 ONENAND_SET_NEXT_BUFFERRAM(this);
1952 }
1953
1954 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1955
1956 /*
1957 * 2 PLANE, MLC, and Flex-OneNAND wait here
1958 */
1959 if (ONENAND_IS_2PLANE(this)) {
1960 ret = this->wait(mtd, FL_WRITING);
1961
1962 /* In partial page write we don't update bufferram */
1963 onenand_update_bufferram(mtd, to, !ret && !subpage);
1964 if (ret) {
1965 printk(KERN_ERR "%s: write failed %d\n",
1966 __func__, ret);
1967 break;
1968 }
1969
1970 /* Only check verify write turn on */
1971 ret = onenand_verify(mtd, buf, to, thislen);
1972 if (ret) {
1973 printk(KERN_ERR "%s: verify failed %d\n",
1974 __func__, ret);
1975 break;
1976 }
1977
1978 written += thislen;
1979
1980 if (written == len)
1981 break;
1982
1983 } else
1984 written += thislen;
1985
1986 column = 0;
1987 prev_subpage = subpage;
1988 prev = to;
1989 prevlen = thislen;
1990 to += thislen;
1991 buf += thislen;
1992 first = 0;
1993 }
1994
1995 /* In error case, clear all bufferrams */
1996 if (written != len)
1997 onenand_invalidate_bufferram(mtd, 0, -1);
1998
1999 ops->retlen = written;
2000 ops->oobretlen = oobwritten;
2001
2002 return ret;
2003 }
2004
2005
2006 /**
2007 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
2008 * @param mtd MTD device structure
2009 * @param to offset to write to
2010 * @param len number of bytes to write
2011 * @param retlen pointer to variable to store the number of written bytes
2012 * @param buf the data to write
2013 * @param mode operation mode
2014 *
2015 * OneNAND write out-of-band
2016 */
2017 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2018 struct mtd_oob_ops *ops)
2019 {
2020 struct onenand_chip *this = mtd->priv;
2021 int column, ret = 0, oobsize;
2022 int written = 0, oobcmd;
2023 u_char *oobbuf;
2024 size_t len = ops->ooblen;
2025 const u_char *buf = ops->oobbuf;
2026 mtd_oob_mode_t mode = ops->mode;
2027
2028 to += ops->ooboffs;
2029
2030 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
2031 __func__, (unsigned int) to, (int) len);
2032
2033 /* Initialize retlen, in case of early exit */
2034 ops->oobretlen = 0;
2035
2036 if (mode == MTD_OOB_AUTO)
2037 oobsize = this->ecclayout->oobavail;
2038 else
2039 oobsize = mtd->oobsize;
2040
2041 column = to & (mtd->oobsize - 1);
2042
2043 if (unlikely(column >= oobsize)) {
2044 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2045 __func__);
2046 return -EINVAL;
2047 }
2048
2049 /* For compatibility with NAND: Do not allow write past end of page */
2050 if (unlikely(column + len > oobsize)) {
2051 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2052 __func__);
2053 return -EINVAL;
2054 }
2055
2056 /* Do not allow reads past end of device */
2057 if (unlikely(to >= mtd->size ||
2058 column + len > ((mtd->size >> this->page_shift) -
2059 (to >> this->page_shift)) * oobsize)) {
2060 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2061 __func__);
2062 return -EINVAL;
2063 }
2064
2065 oobbuf = this->oob_buf;
2066
2067 oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2068
2069 /* Loop until all data write */
2070 while (written < len) {
2071 int thislen = min_t(int, oobsize, len - written);
2072
2073 cond_resched();
2074
2075 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2076
2077 /* We send data to spare ram with oobsize
2078 * to prevent byte access */
2079 memset(oobbuf, 0xff, mtd->oobsize);
2080 if (mode == MTD_OOB_AUTO)
2081 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2082 else
2083 memcpy(oobbuf + column, buf, thislen);
2084 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2085
2086 if (ONENAND_IS_MLC(this)) {
2087 /* Set main area of DataRAM to 0xff*/
2088 memset(this->page_buf, 0xff, mtd->writesize);
2089 this->write_bufferram(mtd, ONENAND_DATARAM,
2090 this->page_buf, 0, mtd->writesize);
2091 }
2092
2093 this->command(mtd, oobcmd, to, mtd->oobsize);
2094
2095 onenand_update_bufferram(mtd, to, 0);
2096 if (ONENAND_IS_2PLANE(this)) {
2097 ONENAND_SET_BUFFERRAM1(this);
2098 onenand_update_bufferram(mtd, to + this->writesize, 0);
2099 }
2100
2101 ret = this->wait(mtd, FL_WRITING);
2102 if (ret) {
2103 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2104 break;
2105 }
2106
2107 ret = onenand_verify_oob(mtd, oobbuf, to);
2108 if (ret) {
2109 printk(KERN_ERR "%s: verify failed %d\n",
2110 __func__, ret);
2111 break;
2112 }
2113
2114 written += thislen;
2115 if (written == len)
2116 break;
2117
2118 to += mtd->writesize;
2119 buf += thislen;
2120 column = 0;
2121 }
2122
2123 ops->oobretlen = written;
2124
2125 return ret;
2126 }
2127
2128 /**
2129 * onenand_write - [MTD Interface] write buffer to FLASH
2130 * @param mtd MTD device structure
2131 * @param to offset to write to
2132 * @param len number of bytes to write
2133 * @param retlen pointer to variable to store the number of written bytes
2134 * @param buf the data to write
2135 *
2136 * Write with ECC
2137 */
2138 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2139 size_t *retlen, const u_char *buf)
2140 {
2141 struct mtd_oob_ops ops = {
2142 .len = len,
2143 .ooblen = 0,
2144 .datbuf = (u_char *) buf,
2145 .oobbuf = NULL,
2146 };
2147 int ret;
2148
2149 onenand_get_device(mtd, FL_WRITING);
2150 ret = onenand_write_ops_nolock(mtd, to, &ops);
2151 onenand_release_device(mtd);
2152
2153 *retlen = ops.retlen;
2154 return ret;
2155 }
2156
2157 /**
2158 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2159 * @param mtd: MTD device structure
2160 * @param to: offset to write
2161 * @param ops: oob operation description structure
2162 */
2163 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2164 struct mtd_oob_ops *ops)
2165 {
2166 int ret;
2167
2168 switch (ops->mode) {
2169 case MTD_OOB_PLACE:
2170 case MTD_OOB_AUTO:
2171 break;
2172 case MTD_OOB_RAW:
2173 /* Not implemented yet */
2174 default:
2175 return -EINVAL;
2176 }
2177
2178 onenand_get_device(mtd, FL_WRITING);
2179 if (ops->datbuf)
2180 ret = onenand_write_ops_nolock(mtd, to, ops);
2181 else
2182 ret = onenand_write_oob_nolock(mtd, to, ops);
2183 onenand_release_device(mtd);
2184
2185 return ret;
2186 }
2187
2188 /**
2189 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2190 * @param mtd MTD device structure
2191 * @param ofs offset from device start
2192 * @param allowbbt 1, if its allowed to access the bbt area
2193 *
2194 * Check, if the block is bad. Either by reading the bad block table or
2195 * calling of the scan function.
2196 */
2197 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2198 {
2199 struct onenand_chip *this = mtd->priv;
2200 struct bbm_info *bbm = this->bbm;
2201
2202 /* Return info from the table */
2203 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2204 }
2205
2206
2207 static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2208 struct erase_info *instr)
2209 {
2210 struct onenand_chip *this = mtd->priv;
2211 loff_t addr = instr->addr;
2212 int len = instr->len;
2213 unsigned int block_size = (1 << this->erase_shift);
2214 int ret = 0;
2215
2216 while (len) {
2217 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2218 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2219 if (ret) {
2220 printk(KERN_ERR "%s: Failed verify, block %d\n",
2221 __func__, onenand_block(this, addr));
2222 instr->state = MTD_ERASE_FAILED;
2223 instr->fail_addr = addr;
2224 return -1;
2225 }
2226 len -= block_size;
2227 addr += block_size;
2228 }
2229 return 0;
2230 }
2231
2232 /**
2233 * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
2234 * @param mtd MTD device structure
2235 * @param instr erase instruction
2236 * @param region erase region
2237 *
2238 * Erase one or more blocks up to 64 block at a time
2239 */
2240 static int onenand_multiblock_erase(struct mtd_info *mtd,
2241 struct erase_info *instr,
2242 unsigned int block_size)
2243 {
2244 struct onenand_chip *this = mtd->priv;
2245 loff_t addr = instr->addr;
2246 int len = instr->len;
2247 int eb_count = 0;
2248 int ret = 0;
2249 int bdry_block = 0;
2250
2251 instr->state = MTD_ERASING;
2252
2253 if (ONENAND_IS_DDP(this)) {
2254 loff_t bdry_addr = this->chipsize >> 1;
2255 if (addr < bdry_addr && (addr + len) > bdry_addr)
2256 bdry_block = bdry_addr >> this->erase_shift;
2257 }
2258
2259 /* Pre-check bbs */
2260 while (len) {
2261 /* Check if we have a bad block, we do not erase bad blocks */
2262 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2263 printk(KERN_WARNING "%s: attempt to erase a bad block "
2264 "at addr 0x%012llx\n",
2265 __func__, (unsigned long long) addr);
2266 instr->state = MTD_ERASE_FAILED;
2267 return -EIO;
2268 }
2269 len -= block_size;
2270 addr += block_size;
2271 }
2272
2273 len = instr->len;
2274 addr = instr->addr;
2275
2276 /* loop over 64 eb batches */
2277 while (len) {
2278 struct erase_info verify_instr = *instr;
2279 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2280
2281 verify_instr.addr = addr;
2282 verify_instr.len = 0;
2283
2284 /* do not cross chip boundary */
2285 if (bdry_block) {
2286 int this_block = (addr >> this->erase_shift);
2287
2288 if (this_block < bdry_block) {
2289 max_eb_count = min(max_eb_count,
2290 (bdry_block - this_block));
2291 }
2292 }
2293
2294 eb_count = 0;
2295
2296 while (len > block_size && eb_count < (max_eb_count - 1)) {
2297 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2298 addr, block_size);
2299 onenand_invalidate_bufferram(mtd, addr, block_size);
2300
2301 ret = this->wait(mtd, FL_PREPARING_ERASE);
2302 if (ret) {
2303 printk(KERN_ERR "%s: Failed multiblock erase, "
2304 "block %d\n", __func__,
2305 onenand_block(this, addr));
2306 instr->state = MTD_ERASE_FAILED;
2307 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2308 return -EIO;
2309 }
2310
2311 len -= block_size;
2312 addr += block_size;
2313 eb_count++;
2314 }
2315
2316 /* last block of 64-eb series */
2317 cond_resched();
2318 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2319 onenand_invalidate_bufferram(mtd, addr, block_size);
2320
2321 ret = this->wait(mtd, FL_ERASING);
2322 /* Check if it is write protected */
2323 if (ret) {
2324 printk(KERN_ERR "%s: Failed erase, block %d\n",
2325 __func__, onenand_block(this, addr));
2326 instr->state = MTD_ERASE_FAILED;
2327 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2328 return -EIO;
2329 }
2330
2331 len -= block_size;
2332 addr += block_size;
2333 eb_count++;
2334
2335 /* verify */
2336 verify_instr.len = eb_count * block_size;
2337 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2338 instr->state = verify_instr.state;
2339 instr->fail_addr = verify_instr.fail_addr;
2340 return -EIO;
2341 }
2342
2343 }
2344 return 0;
2345 }
2346
2347
2348 /**
2349 * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
2350 * @param mtd MTD device structure
2351 * @param instr erase instruction
2352 * @param region erase region
2353 * @param block_size erase block size
2354 *
2355 * Erase one or more blocks one block at a time
2356 */
2357 static int onenand_block_by_block_erase(struct mtd_info *mtd,
2358 struct erase_info *instr,
2359 struct mtd_erase_region_info *region,
2360 unsigned int block_size)
2361 {
2362 struct onenand_chip *this = mtd->priv;
2363 loff_t addr = instr->addr;
2364 int len = instr->len;
2365 loff_t region_end = 0;
2366 int ret = 0;
2367
2368 if (region) {
2369 /* region is set for Flex-OneNAND */
2370 region_end = region->offset + region->erasesize * region->numblocks;
2371 }
2372
2373 instr->state = MTD_ERASING;
2374
2375 /* Loop through the blocks */
2376 while (len) {
2377 cond_resched();
2378
2379 /* Check if we have a bad block, we do not erase bad blocks */
2380 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2381 printk(KERN_WARNING "%s: attempt to erase a bad block "
2382 "at addr 0x%012llx\n",
2383 __func__, (unsigned long long) addr);
2384 instr->state = MTD_ERASE_FAILED;
2385 return -EIO;
2386 }
2387
2388 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2389
2390 onenand_invalidate_bufferram(mtd, addr, block_size);
2391
2392 ret = this->wait(mtd, FL_ERASING);
2393 /* Check, if it is write protected */
2394 if (ret) {
2395 printk(KERN_ERR "%s: Failed erase, block %d\n",
2396 __func__, onenand_block(this, addr));
2397 instr->state = MTD_ERASE_FAILED;
2398 instr->fail_addr = addr;
2399 return -EIO;
2400 }
2401
2402 len -= block_size;
2403 addr += block_size;
2404
2405 if (addr == region_end) {
2406 if (!len)
2407 break;
2408 region++;
2409
2410 block_size = region->erasesize;
2411 region_end = region->offset + region->erasesize * region->numblocks;
2412
2413 if (len & (block_size - 1)) {
2414 /* FIXME: This should be handled at MTD partitioning level. */
2415 printk(KERN_ERR "%s: Unaligned address\n",
2416 __func__);
2417 return -EIO;
2418 }
2419 }
2420 }
2421 return 0;
2422 }
2423
2424 /**
2425 * onenand_erase - [MTD Interface] erase block(s)
2426 * @param mtd MTD device structure
2427 * @param instr erase instruction
2428 *
2429 * Erase one or more blocks
2430 */
2431 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2432 {
2433 struct onenand_chip *this = mtd->priv;
2434 unsigned int block_size;
2435 loff_t addr = instr->addr;
2436 loff_t len = instr->len;
2437 int ret = 0;
2438 struct mtd_erase_region_info *region = NULL;
2439 loff_t region_offset = 0;
2440
2441 DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
2442 (unsigned long long) instr->addr, (unsigned long long) instr->len);
2443
2444 /* Do not allow erase past end of device */
2445 if (unlikely((len + addr) > mtd->size)) {
2446 printk(KERN_ERR "%s: Erase past end of device\n", __func__);
2447 return -EINVAL;
2448 }
2449
2450 if (FLEXONENAND(this)) {
2451 /* Find the eraseregion of this address */
2452 int i = flexonenand_region(mtd, addr);
2453
2454 region = &mtd->eraseregions[i];
2455 block_size = region->erasesize;
2456
2457 /* Start address within region must align on block boundary.
2458 * Erase region's start offset is always block start address.
2459 */
2460 region_offset = region->offset;
2461 } else
2462 block_size = 1 << this->erase_shift;
2463
2464 /* Start address must align on block boundary */
2465 if (unlikely((addr - region_offset) & (block_size - 1))) {
2466 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2467 return -EINVAL;
2468 }
2469
2470 /* Length must align on block boundary */
2471 if (unlikely(len & (block_size - 1))) {
2472 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2473 return -EINVAL;
2474 }
2475
2476 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2477
2478 /* Grab the lock and see if the device is available */
2479 onenand_get_device(mtd, FL_ERASING);
2480
2481 if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2482 /* region is set for Flex-OneNAND (no mb erase) */
2483 ret = onenand_block_by_block_erase(mtd, instr,
2484 region, block_size);
2485 } else {
2486 ret = onenand_multiblock_erase(mtd, instr, block_size);
2487 }
2488
2489 /* Deselect and wake up anyone waiting on the device */
2490 onenand_release_device(mtd);
2491
2492 /* Do call back function */
2493 if (!ret) {
2494 instr->state = MTD_ERASE_DONE;
2495 mtd_erase_callback(instr);
2496 }
2497
2498 return ret;
2499 }
2500
2501 /**
2502 * onenand_sync - [MTD Interface] sync
2503 * @param mtd MTD device structure
2504 *
2505 * Sync is actually a wait for chip ready function
2506 */
2507 static void onenand_sync(struct mtd_info *mtd)
2508 {
2509 DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
2510
2511 /* Grab the lock and see if the device is available */
2512 onenand_get_device(mtd, FL_SYNCING);
2513
2514 /* Release it and go back */
2515 onenand_release_device(mtd);
2516 }
2517
2518 /**
2519 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2520 * @param mtd MTD device structure
2521 * @param ofs offset relative to mtd start
2522 *
2523 * Check whether the block is bad
2524 */
2525 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2526 {
2527 int ret;
2528
2529 /* Check for invalid offset */
2530 if (ofs > mtd->size)
2531 return -EINVAL;
2532
2533 onenand_get_device(mtd, FL_READING);
2534 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2535 onenand_release_device(mtd);
2536 return ret;
2537 }
2538
2539 /**
2540 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2541 * @param mtd MTD device structure
2542 * @param ofs offset from device start
2543 *
2544 * This is the default implementation, which can be overridden by
2545 * a hardware specific driver.
2546 */
2547 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2548 {
2549 struct onenand_chip *this = mtd->priv;
2550 struct bbm_info *bbm = this->bbm;
2551 u_char buf[2] = {0, 0};
2552 struct mtd_oob_ops ops = {
2553 .mode = MTD_OOB_PLACE,
2554 .ooblen = 2,
2555 .oobbuf = buf,
2556 .ooboffs = 0,
2557 };
2558 int block;
2559
2560 /* Get block number */
2561 block = onenand_block(this, ofs);
2562 if (bbm->bbt)
2563 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2564
2565 /* We write two bytes, so we don't have to mess with 16-bit access */
2566 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
2567 /* FIXME : What to do when marking SLC block in partition
2568 * with MLC erasesize? For now, it is not advisable to
2569 * create partitions containing both SLC and MLC regions.
2570 */
2571 return onenand_write_oob_nolock(mtd, ofs, &ops);
2572 }
2573
2574 /**
2575 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2576 * @param mtd MTD device structure
2577 * @param ofs offset relative to mtd start
2578 *
2579 * Mark the block as bad
2580 */
2581 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2582 {
2583 struct onenand_chip *this = mtd->priv;
2584 int ret;
2585
2586 ret = onenand_block_isbad(mtd, ofs);
2587 if (ret) {
2588 /* If it was bad already, return success and do nothing */
2589 if (ret > 0)
2590 return 0;
2591 return ret;
2592 }
2593
2594 onenand_get_device(mtd, FL_WRITING);
2595 ret = this->block_markbad(mtd, ofs);
2596 onenand_release_device(mtd);
2597 return ret;
2598 }
2599
2600 /**
2601 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2602 * @param mtd MTD device structure
2603 * @param ofs offset relative to mtd start
2604 * @param len number of bytes to lock or unlock
2605 * @param cmd lock or unlock command
2606 *
2607 * Lock or unlock one or more blocks
2608 */
2609 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2610 {
2611 struct onenand_chip *this = mtd->priv;
2612 int start, end, block, value, status;
2613 int wp_status_mask;
2614
2615 start = onenand_block(this, ofs);
2616 end = onenand_block(this, ofs + len) - 1;
2617
2618 if (cmd == ONENAND_CMD_LOCK)
2619 wp_status_mask = ONENAND_WP_LS;
2620 else
2621 wp_status_mask = ONENAND_WP_US;
2622
2623 /* Continuous lock scheme */
2624 if (this->options & ONENAND_HAS_CONT_LOCK) {
2625 /* Set start block address */
2626 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2627 /* Set end block address */
2628 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2629 /* Write lock command */
2630 this->command(mtd, cmd, 0, 0);
2631
2632 /* There's no return value */
2633 this->wait(mtd, FL_LOCKING);
2634
2635 /* Sanity check */
2636 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2637 & ONENAND_CTRL_ONGO)
2638 continue;
2639
2640 /* Check lock status */
2641 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2642 if (!(status & wp_status_mask))
2643 printk(KERN_ERR "%s: wp status = 0x%x\n",
2644 __func__, status);
2645
2646 return 0;
2647 }
2648
2649 /* Block lock scheme */
2650 for (block = start; block < end + 1; block++) {
2651 /* Set block address */
2652 value = onenand_block_address(this, block);
2653 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2654 /* Select DataRAM for DDP */
2655 value = onenand_bufferram_address(this, block);
2656 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2657 /* Set start block address */
2658 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2659 /* Write lock command */
2660 this->command(mtd, cmd, 0, 0);
2661
2662 /* There's no return value */
2663 this->wait(mtd, FL_LOCKING);
2664
2665 /* Sanity check */
2666 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2667 & ONENAND_CTRL_ONGO)
2668 continue;
2669
2670 /* Check lock status */
2671 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2672 if (!(status & wp_status_mask))
2673 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2674 __func__, block, status);
2675 }
2676
2677 return 0;
2678 }
2679
2680 /**
2681 * onenand_lock - [MTD Interface] Lock block(s)
2682 * @param mtd MTD device structure
2683 * @param ofs offset relative to mtd start
2684 * @param len number of bytes to unlock
2685 *
2686 * Lock one or more blocks
2687 */
2688 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2689 {
2690 int ret;
2691
2692 onenand_get_device(mtd, FL_LOCKING);
2693 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2694 onenand_release_device(mtd);
2695 return ret;
2696 }
2697
2698 /**
2699 * onenand_unlock - [MTD Interface] Unlock block(s)
2700 * @param mtd MTD device structure
2701 * @param ofs offset relative to mtd start
2702 * @param len number of bytes to unlock
2703 *
2704 * Unlock one or more blocks
2705 */
2706 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2707 {
2708 int ret;
2709
2710 onenand_get_device(mtd, FL_LOCKING);
2711 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2712 onenand_release_device(mtd);
2713 return ret;
2714 }
2715
2716 /**
2717 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2718 * @param this onenand chip data structure
2719 *
2720 * Check lock status
2721 */
2722 static int onenand_check_lock_status(struct onenand_chip *this)
2723 {
2724 unsigned int value, block, status;
2725 unsigned int end;
2726
2727 end = this->chipsize >> this->erase_shift;
2728 for (block = 0; block < end; block++) {
2729 /* Set block address */
2730 value = onenand_block_address(this, block);
2731 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2732 /* Select DataRAM for DDP */
2733 value = onenand_bufferram_address(this, block);
2734 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2735 /* Set start block address */
2736 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2737
2738 /* Check lock status */
2739 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2740 if (!(status & ONENAND_WP_US)) {
2741 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2742 __func__, block, status);
2743 return 0;
2744 }
2745 }
2746
2747 return 1;
2748 }
2749
2750 /**
2751 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2752 * @param mtd MTD device structure
2753 *
2754 * Unlock all blocks
2755 */
2756 static void onenand_unlock_all(struct mtd_info *mtd)
2757 {
2758 struct onenand_chip *this = mtd->priv;
2759 loff_t ofs = 0;
2760 loff_t len = mtd->size;
2761
2762 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2763 /* Set start block address */
2764 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2765 /* Write unlock command */
2766 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2767
2768 /* There's no return value */
2769 this->wait(mtd, FL_LOCKING);
2770
2771 /* Sanity check */
2772 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2773 & ONENAND_CTRL_ONGO)
2774 continue;
2775
2776 /* Don't check lock status */
2777 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2778 return;
2779
2780 /* Check lock status */
2781 if (onenand_check_lock_status(this))
2782 return;
2783
2784 /* Workaround for all block unlock in DDP */
2785 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2786 /* All blocks on another chip */
2787 ofs = this->chipsize >> 1;
2788 len = this->chipsize >> 1;
2789 }
2790 }
2791
2792 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2793 }
2794
2795 #ifdef CONFIG_MTD_ONENAND_OTP
2796
2797 /**
2798 * onenand_otp_command - Send OTP specific command to OneNAND device
2799 * @param mtd MTD device structure
2800 * @param cmd the command to be sent
2801 * @param addr offset to read from or write to
2802 * @param len number of bytes to read or write
2803 */
2804 static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2805 size_t len)
2806 {
2807 struct onenand_chip *this = mtd->priv;
2808 int value, block, page;
2809
2810 /* Address translation */
2811 switch (cmd) {
2812 case ONENAND_CMD_OTP_ACCESS:
2813 block = (int) (addr >> this->erase_shift);
2814 page = -1;
2815 break;
2816
2817 default:
2818 block = (int) (addr >> this->erase_shift);
2819 page = (int) (addr >> this->page_shift);
2820
2821 if (ONENAND_IS_2PLANE(this)) {
2822 /* Make the even block number */
2823 block &= ~1;
2824 /* Is it the odd plane? */
2825 if (addr & this->writesize)
2826 block++;
2827 page >>= 1;
2828 }
2829 page &= this->page_mask;
2830 break;
2831 }
2832
2833 if (block != -1) {
2834 /* Write 'DFS, FBA' of Flash */
2835 value = onenand_block_address(this, block);
2836 this->write_word(value, this->base +
2837 ONENAND_REG_START_ADDRESS1);
2838 }
2839
2840 if (page != -1) {
2841 /* Now we use page size operation */
2842 int sectors = 4, count = 4;
2843 int dataram;
2844
2845 switch (cmd) {
2846 default:
2847 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2848 cmd = ONENAND_CMD_2X_PROG;
2849 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2850 break;
2851 }
2852
2853 /* Write 'FPA, FSA' of Flash */
2854 value = onenand_page_address(page, sectors);
2855 this->write_word(value, this->base +
2856 ONENAND_REG_START_ADDRESS8);
2857
2858 /* Write 'BSA, BSC' of DataRAM */
2859 value = onenand_buffer_address(dataram, sectors, count);
2860 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2861 }
2862
2863 /* Interrupt clear */
2864 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2865
2866 /* Write command */
2867 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2868
2869 return 0;
2870 }
2871
2872 /**
2873 * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
2874 * @param mtd MTD device structure
2875 * @param to offset to write to
2876 * @param len number of bytes to write
2877 * @param retlen pointer to variable to store the number of written bytes
2878 * @param buf the data to write
2879 *
2880 * OneNAND write out-of-band only for OTP
2881 */
2882 static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2883 struct mtd_oob_ops *ops)
2884 {
2885 struct onenand_chip *this = mtd->priv;
2886 int column, ret = 0, oobsize;
2887 int written = 0;
2888 u_char *oobbuf;
2889 size_t len = ops->ooblen;
2890 const u_char *buf = ops->oobbuf;
2891 int block, value, status;
2892
2893 to += ops->ooboffs;
2894
2895 /* Initialize retlen, in case of early exit */
2896 ops->oobretlen = 0;
2897
2898 oobsize = mtd->oobsize;
2899
2900 column = to & (mtd->oobsize - 1);
2901
2902 oobbuf = this->oob_buf;
2903
2904 /* Loop until all data write */
2905 while (written < len) {
2906 int thislen = min_t(int, oobsize, len - written);
2907
2908 cond_resched();
2909
2910 block = (int) (to >> this->erase_shift);
2911 /*
2912 * Write 'DFS, FBA' of Flash
2913 * Add: F100h DQ=DFS, FBA
2914 */
2915
2916 value = onenand_block_address(this, block);
2917 this->write_word(value, this->base +
2918 ONENAND_REG_START_ADDRESS1);
2919
2920 /*
2921 * Select DataRAM for DDP
2922 * Add: F101h DQ=DBS
2923 */
2924
2925 value = onenand_bufferram_address(this, block);
2926 this->write_word(value, this->base +
2927 ONENAND_REG_START_ADDRESS2);
2928 ONENAND_SET_NEXT_BUFFERRAM(this);
2929
2930 /*
2931 * Enter OTP access mode
2932 */
2933 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2934 this->wait(mtd, FL_OTPING);
2935
2936 /* We send data to spare ram with oobsize
2937 * to prevent byte access */
2938 memcpy(oobbuf + column, buf, thislen);
2939
2940 /*
2941 * Write Data into DataRAM
2942 * Add: 8th Word
2943 * in sector0/spare/page0
2944 * DQ=XXFCh
2945 */
2946 this->write_bufferram(mtd, ONENAND_SPARERAM,
2947 oobbuf, 0, mtd->oobsize);
2948
2949 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2950 onenand_update_bufferram(mtd, to, 0);
2951 if (ONENAND_IS_2PLANE(this)) {
2952 ONENAND_SET_BUFFERRAM1(this);
2953 onenand_update_bufferram(mtd, to + this->writesize, 0);
2954 }
2955
2956 ret = this->wait(mtd, FL_WRITING);
2957 if (ret) {
2958 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2959 break;
2960 }
2961
2962 /* Exit OTP access mode */
2963 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2964 this->wait(mtd, FL_RESETING);
2965
2966 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2967 status &= 0x60;
2968
2969 if (status == 0x60) {
2970 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2971 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2972 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2973 } else if (status == 0x20) {
2974 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2975 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2976 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2977 } else if (status == 0x40) {
2978 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2979 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2980 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2981 } else {
2982 printk(KERN_DEBUG "Reboot to check\n");
2983 }
2984
2985 written += thislen;
2986 if (written == len)
2987 break;
2988
2989 to += mtd->writesize;
2990 buf += thislen;
2991 column = 0;
2992 }
2993
2994 ops->oobretlen = written;
2995
2996 return ret;
2997 }
2998
2999 /* Internal OTP operation */
3000 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
3001 size_t *retlen, u_char *buf);
3002
3003 /**
3004 * do_otp_read - [DEFAULT] Read OTP block area
3005 * @param mtd MTD device structure
3006 * @param from The offset to read
3007 * @param len number of bytes to read
3008 * @param retlen pointer to variable to store the number of readbytes
3009 * @param buf the databuffer to put/get data
3010 *
3011 * Read OTP block area.
3012 */
3013 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3014 size_t *retlen, u_char *buf)
3015 {
3016 struct onenand_chip *this = mtd->priv;
3017 struct mtd_oob_ops ops = {
3018 .len = len,
3019 .ooblen = 0,
3020 .datbuf = buf,
3021 .oobbuf = NULL,
3022 };
3023 int ret;
3024
3025 /* Enter OTP access mode */
3026 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3027 this->wait(mtd, FL_OTPING);
3028
3029 ret = ONENAND_IS_MLC(this) ?
3030 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3031 onenand_read_ops_nolock(mtd, from, &ops);
3032
3033 /* Exit OTP access mode */
3034 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3035 this->wait(mtd, FL_RESETING);
3036
3037 return ret;
3038 }
3039
3040 /**
3041 * do_otp_write - [DEFAULT] Write OTP block area
3042 * @param mtd MTD device structure
3043 * @param to The offset to write
3044 * @param len number of bytes to write
3045 * @param retlen pointer to variable to store the number of write bytes
3046 * @param buf the databuffer to put/get data
3047 *
3048 * Write OTP block area.
3049 */
3050 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
3051 size_t *retlen, u_char *buf)
3052 {
3053 struct onenand_chip *this = mtd->priv;
3054 unsigned char *pbuf = buf;
3055 int ret;
3056 struct mtd_oob_ops ops;
3057
3058 /* Force buffer page aligned */
3059 if (len < mtd->writesize) {
3060 memcpy(this->page_buf, buf, len);
3061 memset(this->page_buf + len, 0xff, mtd->writesize - len);
3062 pbuf = this->page_buf;
3063 len = mtd->writesize;
3064 }
3065
3066 /* Enter OTP access mode */
3067 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3068 this->wait(mtd, FL_OTPING);
3069
3070 ops.len = len;
3071 ops.ooblen = 0;
3072 ops.datbuf = pbuf;
3073 ops.oobbuf = NULL;
3074 ret = onenand_write_ops_nolock(mtd, to, &ops);
3075 *retlen = ops.retlen;
3076
3077 /* Exit OTP access mode */
3078 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3079 this->wait(mtd, FL_RESETING);
3080
3081 return ret;
3082 }
3083
3084 /**
3085 * do_otp_lock - [DEFAULT] Lock OTP block area
3086 * @param mtd MTD device structure
3087 * @param from The offset to lock
3088 * @param len number of bytes to lock
3089 * @param retlen pointer to variable to store the number of lock bytes
3090 * @param buf the databuffer to put/get data
3091 *
3092 * Lock OTP block area.
3093 */
3094 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
3095 size_t *retlen, u_char *buf)
3096 {
3097 struct onenand_chip *this = mtd->priv;
3098 struct mtd_oob_ops ops;
3099 int ret;
3100
3101 if (FLEXONENAND(this)) {
3102
3103 /* Enter OTP access mode */
3104 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3105 this->wait(mtd, FL_OTPING);
3106 /*
3107 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3108 * main area of page 49.
3109 */
3110 ops.len = mtd->writesize;
3111 ops.ooblen = 0;
3112 ops.datbuf = buf;
3113 ops.oobbuf = NULL;
3114 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3115 *retlen = ops.retlen;
3116
3117 /* Exit OTP access mode */
3118 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3119 this->wait(mtd, FL_RESETING);
3120 } else {
3121 ops.mode = MTD_OOB_PLACE;
3122 ops.ooblen = len;
3123 ops.oobbuf = buf;
3124 ops.ooboffs = 0;
3125 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
3126 *retlen = ops.oobretlen;
3127 }
3128
3129 return ret;
3130 }
3131
3132 /**
3133 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3134 * @param mtd MTD device structure
3135 * @param from The offset to read/write
3136 * @param len number of bytes to read/write
3137 * @param retlen pointer to variable to store the number of read bytes
3138 * @param buf the databuffer to put/get data
3139 * @param action do given action
3140 * @param mode specify user and factory
3141 *
3142 * Handle OTP operation.
3143 */
3144 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3145 size_t *retlen, u_char *buf,
3146 otp_op_t action, int mode)
3147 {
3148 struct onenand_chip *this = mtd->priv;
3149 int otp_pages;
3150 int density;
3151 int ret = 0;
3152
3153 *retlen = 0;
3154
3155 density = onenand_get_density(this->device_id);
3156 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3157 otp_pages = 20;
3158 else
3159 otp_pages = 50;
3160
3161 if (mode == MTD_OTP_FACTORY) {
3162 from += mtd->writesize * otp_pages;
3163 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
3164 }
3165
3166 /* Check User/Factory boundary */
3167 if (mode == MTD_OTP_USER) {
3168 if (mtd->writesize * otp_pages < from + len)
3169 return 0;
3170 } else {
3171 if (mtd->writesize * otp_pages < len)
3172 return 0;
3173 }
3174
3175 onenand_get_device(mtd, FL_OTPING);
3176 while (len > 0 && otp_pages > 0) {
3177 if (!action) { /* OTP Info functions */
3178 struct otp_info *otpinfo;
3179
3180 len -= sizeof(struct otp_info);
3181 if (len <= 0) {
3182 ret = -ENOSPC;
3183 break;
3184 }
3185
3186 otpinfo = (struct otp_info *) buf;
3187 otpinfo->start = from;
3188 otpinfo->length = mtd->writesize;
3189 otpinfo->locked = 0;
3190
3191 from += mtd->writesize;
3192 buf += sizeof(struct otp_info);
3193 *retlen += sizeof(struct otp_info);
3194 } else {
3195 size_t tmp_retlen;
3196
3197 ret = action(mtd, from, len, &tmp_retlen, buf);
3198
3199 buf += tmp_retlen;
3200 len -= tmp_retlen;
3201 *retlen += tmp_retlen;
3202
3203 if (ret)
3204 break;
3205 }
3206 otp_pages--;
3207 }
3208 onenand_release_device(mtd);
3209
3210 return ret;
3211 }
3212
3213 /**
3214 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3215 * @param mtd MTD device structure
3216 * @param buf the databuffer to put/get data
3217 * @param len number of bytes to read
3218 *
3219 * Read factory OTP info.
3220 */
3221 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
3222 struct otp_info *buf, size_t len)
3223 {
3224 size_t retlen;
3225 int ret;
3226
3227 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
3228
3229 return ret ? : retlen;
3230 }
3231
3232 /**
3233 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3234 * @param mtd MTD device structure
3235 * @param from The offset to read
3236 * @param len number of bytes to read
3237 * @param retlen pointer to variable to store the number of read bytes
3238 * @param buf the databuffer to put/get data
3239 *
3240 * Read factory OTP area.
3241 */
3242 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3243 size_t len, size_t *retlen, u_char *buf)
3244 {
3245 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3246 }
3247
3248 /**
3249 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3250 * @param mtd MTD device structure
3251 * @param buf the databuffer to put/get data
3252 * @param len number of bytes to read
3253 *
3254 * Read user OTP info.
3255 */
3256 static int onenand_get_user_prot_info(struct mtd_info *mtd,
3257 struct otp_info *buf, size_t len)
3258 {
3259 size_t retlen;
3260 int ret;
3261
3262 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
3263
3264 return ret ? : retlen;
3265 }
3266
3267 /**
3268 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3269 * @param mtd MTD device structure
3270 * @param from The offset to read
3271 * @param len number of bytes to read
3272 * @param retlen pointer to variable to store the number of read bytes
3273 * @param buf the databuffer to put/get data
3274 *
3275 * Read user OTP area.
3276 */
3277 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3278 size_t len, size_t *retlen, u_char *buf)
3279 {
3280 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3281 }
3282
3283 /**
3284 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3285 * @param mtd MTD device structure
3286 * @param from The offset to write
3287 * @param len number of bytes to write
3288 * @param retlen pointer to variable to store the number of write bytes
3289 * @param buf the databuffer to put/get data
3290 *
3291 * Write user OTP area.
3292 */
3293 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3294 size_t len, size_t *retlen, u_char *buf)
3295 {
3296 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3297 }
3298
3299 /**
3300 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3301 * @param mtd MTD device structure
3302 * @param from The offset to lock
3303 * @param len number of bytes to unlock
3304 *
3305 * Write lock mark on spare area in page 0 in OTP block
3306 */
3307 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3308 size_t len)
3309 {
3310 struct onenand_chip *this = mtd->priv;
3311 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
3312 size_t retlen;
3313 int ret;
3314 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
3315
3316 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3317 : mtd->oobsize);
3318 /*
3319 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3320 * We write 16 bytes spare area instead of 2 bytes.
3321 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3322 * main area of page 49.
3323 */
3324
3325 from = 0;
3326 len = FLEXONENAND(this) ? mtd->writesize : 16;
3327
3328 /*
3329 * Note: OTP lock operation
3330 * OTP block : 0xXXFC XX 1111 1100
3331 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3332 * Both : 0xXXF0 (If chip support) XX 1111 0000
3333 */
3334 if (FLEXONENAND(this))
3335 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3336
3337 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3338 if (otp == 1)
3339 buf[otp_lock_offset] = 0xFC;
3340 else if (otp == 2)
3341 buf[otp_lock_offset] = 0xF3;
3342 else if (otp == 3)
3343 buf[otp_lock_offset] = 0xF0;
3344 else if (otp != 0)
3345 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3346
3347 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
3348
3349 return ret ? : retlen;
3350 }
3351
3352 #endif /* CONFIG_MTD_ONENAND_OTP */
3353
3354 /**
3355 * onenand_check_features - Check and set OneNAND features
3356 * @param mtd MTD data structure
3357 *
3358 * Check and set OneNAND features
3359 * - lock scheme
3360 * - two plane
3361 */
3362 static void onenand_check_features(struct mtd_info *mtd)
3363 {
3364 struct onenand_chip *this = mtd->priv;
3365 unsigned int density, process;
3366
3367 /* Lock scheme depends on density and process */
3368 density = onenand_get_density(this->device_id);
3369 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
3370
3371 /* Lock scheme */
3372 switch (density) {
3373 case ONENAND_DEVICE_DENSITY_4Gb:
3374 this->options |= ONENAND_HAS_2PLANE;
3375
3376 case ONENAND_DEVICE_DENSITY_2Gb:
3377 /* 2Gb DDP does not have 2 plane */
3378 if (!ONENAND_IS_DDP(this))
3379 this->options |= ONENAND_HAS_2PLANE;
3380 this->options |= ONENAND_HAS_UNLOCK_ALL;
3381
3382 case ONENAND_DEVICE_DENSITY_1Gb:
3383 /* A-Die has all block unlock */
3384 if (process)
3385 this->options |= ONENAND_HAS_UNLOCK_ALL;
3386 break;
3387
3388 default:
3389 /* Some OneNAND has continuous lock scheme */
3390 if (!process)
3391 this->options |= ONENAND_HAS_CONT_LOCK;
3392 break;
3393 }
3394
3395 if (ONENAND_IS_MLC(this))
3396 this->options &= ~ONENAND_HAS_2PLANE;
3397
3398 if (FLEXONENAND(this)) {
3399 this->options &= ~ONENAND_HAS_CONT_LOCK;
3400 this->options |= ONENAND_HAS_UNLOCK_ALL;
3401 }
3402
3403 if (this->options & ONENAND_HAS_CONT_LOCK)
3404 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3405 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3406 printk(KERN_DEBUG "Chip support all block unlock\n");
3407 if (this->options & ONENAND_HAS_2PLANE)
3408 printk(KERN_DEBUG "Chip has 2 plane\n");
3409 }
3410
3411 /**
3412 * onenand_print_device_info - Print device & version ID
3413 * @param device device ID
3414 * @param version version ID
3415 *
3416 * Print device & version ID
3417 */
3418 static void onenand_print_device_info(int device, int version)
3419 {
3420 int vcc, demuxed, ddp, density, flexonenand;
3421
3422 vcc = device & ONENAND_DEVICE_VCC_MASK;
3423 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3424 ddp = device & ONENAND_DEVICE_IS_DDP;
3425 density = onenand_get_density(device);
3426 flexonenand = device & DEVICE_IS_FLEXONENAND;
3427 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3428 demuxed ? "" : "Muxed ",
3429 flexonenand ? "Flex-" : "",
3430 ddp ? "(DDP)" : "",
3431 (16 << density),
3432 vcc ? "2.65/3.3" : "1.8",
3433 device);
3434 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
3435 }
3436
3437 static const struct onenand_manufacturers onenand_manuf_ids[] = {
3438 {ONENAND_MFR_SAMSUNG, "Samsung"},
3439 {ONENAND_MFR_NUMONYX, "Numonyx"},
3440 };
3441
3442 /**
3443 * onenand_check_maf - Check manufacturer ID
3444 * @param manuf manufacturer ID
3445 *
3446 * Check manufacturer ID
3447 */
3448 static int onenand_check_maf(int manuf)
3449 {
3450 int size = ARRAY_SIZE(onenand_manuf_ids);
3451 char *name;
3452 int i;
3453
3454 for (i = 0; i < size; i++)
3455 if (manuf == onenand_manuf_ids[i].id)
3456 break;
3457
3458 if (i < size)
3459 name = onenand_manuf_ids[i].name;
3460 else
3461 name = "Unknown";
3462
3463 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
3464
3465 return (i == size);
3466 }
3467
3468 /**
3469 * flexonenand_get_boundary - Reads the SLC boundary
3470 * @param onenand_info - onenand info structure
3471 **/
3472 static int flexonenand_get_boundary(struct mtd_info *mtd)
3473 {
3474 struct onenand_chip *this = mtd->priv;
3475 unsigned die, bdry;
3476 int ret, syscfg, locked;
3477
3478 /* Disable ECC */
3479 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3480 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3481
3482 for (die = 0; die < this->dies; die++) {
3483 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3484 this->wait(mtd, FL_SYNCING);
3485
3486 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3487 ret = this->wait(mtd, FL_READING);
3488
3489 bdry = this->read_word(this->base + ONENAND_DATARAM);
3490 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3491 locked = 0;
3492 else
3493 locked = 1;
3494 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3495
3496 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3497 ret = this->wait(mtd, FL_RESETING);
3498
3499 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3500 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3501 }
3502
3503 /* Enable ECC */
3504 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3505 return 0;
3506 }
3507
3508 /**
3509 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3510 * boundary[], diesize[], mtd->size, mtd->erasesize
3511 * @param mtd - MTD device structure
3512 */
3513 static void flexonenand_get_size(struct mtd_info *mtd)
3514 {
3515 struct onenand_chip *this = mtd->priv;
3516 int die, i, eraseshift, density;
3517 int blksperdie, maxbdry;
3518 loff_t ofs;
3519
3520 density = onenand_get_density(this->device_id);
3521 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3522 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3523 maxbdry = blksperdie - 1;
3524 eraseshift = this->erase_shift - 1;
3525
3526 mtd->numeraseregions = this->dies << 1;
3527
3528 /* This fills up the device boundary */
3529 flexonenand_get_boundary(mtd);
3530 die = ofs = 0;
3531 i = -1;
3532 for (; die < this->dies; die++) {
3533 if (!die || this->boundary[die-1] != maxbdry) {
3534 i++;
3535 mtd->eraseregions[i].offset = ofs;
3536 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3537 mtd->eraseregions[i].numblocks =
3538 this->boundary[die] + 1;
3539 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3540 eraseshift++;
3541 } else {
3542 mtd->numeraseregions -= 1;
3543 mtd->eraseregions[i].numblocks +=
3544 this->boundary[die] + 1;
3545 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3546 }
3547 if (this->boundary[die] != maxbdry) {
3548 i++;
3549 mtd->eraseregions[i].offset = ofs;
3550 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3551 mtd->eraseregions[i].numblocks = maxbdry ^
3552 this->boundary[die];
3553 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3554 eraseshift--;
3555 } else
3556 mtd->numeraseregions -= 1;
3557 }
3558
3559 /* Expose MLC erase size except when all blocks are SLC */
3560 mtd->erasesize = 1 << this->erase_shift;
3561 if (mtd->numeraseregions == 1)
3562 mtd->erasesize >>= 1;
3563
3564 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3565 for (i = 0; i < mtd->numeraseregions; i++)
3566 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3567 " numblocks: %04u]\n",
3568 (unsigned int) mtd->eraseregions[i].offset,
3569 mtd->eraseregions[i].erasesize,
3570 mtd->eraseregions[i].numblocks);
3571
3572 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3573 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3574 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3575 << (this->erase_shift - 1);
3576 mtd->size += this->diesize[die];
3577 }
3578 }
3579
3580 /**
3581 * flexonenand_check_blocks_erased - Check if blocks are erased
3582 * @param mtd_info - mtd info structure
3583 * @param start - first erase block to check
3584 * @param end - last erase block to check
3585 *
3586 * Converting an unerased block from MLC to SLC
3587 * causes byte values to change. Since both data and its ECC
3588 * have changed, reads on the block give uncorrectable error.
3589 * This might lead to the block being detected as bad.
3590 *
3591 * Avoid this by ensuring that the block to be converted is
3592 * erased.
3593 */
3594 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3595 {
3596 struct onenand_chip *this = mtd->priv;
3597 int i, ret;
3598 int block;
3599 struct mtd_oob_ops ops = {
3600 .mode = MTD_OOB_PLACE,
3601 .ooboffs = 0,
3602 .ooblen = mtd->oobsize,
3603 .datbuf = NULL,
3604 .oobbuf = this->oob_buf,
3605 };
3606 loff_t addr;
3607
3608 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3609
3610 for (block = start; block <= end; block++) {
3611 addr = flexonenand_addr(this, block);
3612 if (onenand_block_isbad_nolock(mtd, addr, 0))
3613 continue;
3614
3615 /*
3616 * Since main area write results in ECC write to spare,
3617 * it is sufficient to check only ECC bytes for change.
3618 */
3619 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3620 if (ret)
3621 return ret;
3622
3623 for (i = 0; i < mtd->oobsize; i++)
3624 if (this->oob_buf[i] != 0xff)
3625 break;
3626
3627 if (i != mtd->oobsize) {
3628 printk(KERN_WARNING "%s: Block %d not erased.\n",
3629 __func__, block);
3630 return 1;
3631 }
3632 }
3633
3634 return 0;
3635 }
3636
3637 /**
3638 * flexonenand_set_boundary - Writes the SLC boundary
3639 * @param mtd - mtd info structure
3640 */
3641 int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3642 int boundary, int lock)
3643 {
3644 struct onenand_chip *this = mtd->priv;
3645 int ret, density, blksperdie, old, new, thisboundary;
3646 loff_t addr;
3647
3648 /* Change only once for SDP Flex-OneNAND */
3649 if (die && (!ONENAND_IS_DDP(this)))
3650 return 0;
3651
3652 /* boundary value of -1 indicates no required change */
3653 if (boundary < 0 || boundary == this->boundary[die])
3654 return 0;
3655
3656 density = onenand_get_density(this->device_id);
3657 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3658 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3659
3660 if (boundary >= blksperdie) {
3661 printk(KERN_ERR "%s: Invalid boundary value. "
3662 "Boundary not changed.\n", __func__);
3663 return -EINVAL;
3664 }
3665
3666 /* Check if converting blocks are erased */
3667 old = this->boundary[die] + (die * this->density_mask);
3668 new = boundary + (die * this->density_mask);
3669 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3670 if (ret) {
3671 printk(KERN_ERR "%s: Please erase blocks "
3672 "before boundary change\n", __func__);
3673 return ret;
3674 }
3675
3676 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3677 this->wait(mtd, FL_SYNCING);
3678
3679 /* Check is boundary is locked */
3680 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3681 ret = this->wait(mtd, FL_READING);
3682
3683 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3684 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
3685 printk(KERN_ERR "%s: boundary locked\n", __func__);
3686 ret = 1;
3687 goto out;
3688 }
3689
3690 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
3691 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3692
3693 addr = die ? this->diesize[0] : 0;
3694
3695 boundary &= FLEXONENAND_PI_MASK;
3696 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3697
3698 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3699 ret = this->wait(mtd, FL_ERASING);
3700 if (ret) {
3701 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3702 __func__, die);
3703 goto out;
3704 }
3705
3706 this->write_word(boundary, this->base + ONENAND_DATARAM);
3707 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3708 ret = this->wait(mtd, FL_WRITING);
3709 if (ret) {
3710 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3711 __func__, die);
3712 goto out;
3713 }
3714
3715 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3716 ret = this->wait(mtd, FL_WRITING);
3717 out:
3718 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3719 this->wait(mtd, FL_RESETING);
3720 if (!ret)
3721 /* Recalculate device size on boundary change*/
3722 flexonenand_get_size(mtd);
3723
3724 return ret;
3725 }
3726
3727 /**
3728 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3729 * @param mtd MTD device structure
3730 *
3731 * OneNAND detection method:
3732 * Compare the values from command with ones from register
3733 */
3734 static int onenand_probe(struct mtd_info *mtd)
3735 {
3736 struct onenand_chip *this = mtd->priv;
3737 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
3738 int density;
3739 int syscfg;
3740
3741 /* Save system configuration 1 */
3742 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3743 /* Clear Sync. Burst Read mode to read BootRAM */
3744 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
3745
3746 /* Send the command for reading device ID from BootRAM */
3747 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3748
3749 /* Read manufacturer and device IDs from BootRAM */
3750 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3751 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3752
3753 /* Reset OneNAND to read default register values */
3754 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3755 /* Wait reset */
3756 this->wait(mtd, FL_RESETING);
3757
3758 /* Restore system configuration 1 */
3759 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3760
3761 /* Check manufacturer ID */
3762 if (onenand_check_maf(bram_maf_id))
3763 return -ENXIO;
3764
3765 /* Read manufacturer and device IDs from Register */
3766 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3767 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3768 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3769 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3770
3771 /* Check OneNAND device */
3772 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3773 return -ENXIO;
3774
3775 /* Flash device information */
3776 onenand_print_device_info(dev_id, ver_id);
3777 this->device_id = dev_id;
3778 this->version_id = ver_id;
3779
3780 density = onenand_get_density(dev_id);
3781 if (FLEXONENAND(this)) {
3782 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3783 /* Maximum possible erase regions */
3784 mtd->numeraseregions = this->dies << 1;
3785 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3786 * (this->dies << 1), GFP_KERNEL);
3787 if (!mtd->eraseregions)
3788 return -ENOMEM;
3789 }
3790
3791 /*
3792 * For Flex-OneNAND, chipsize represents maximum possible device size.
3793 * mtd->size represents the actual device size.
3794 */
3795 this->chipsize = (16 << density) << 20;
3796
3797 /* OneNAND page size & block size */
3798 /* The data buffer size is equal to page size */
3799 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3800 /* We use the full BufferRAM */
3801 if (ONENAND_IS_MLC(this))
3802 mtd->writesize <<= 1;
3803
3804 mtd->oobsize = mtd->writesize >> 5;
3805 /* Pages per a block are always 64 in OneNAND */
3806 mtd->erasesize = mtd->writesize << 6;
3807 /*
3808 * Flex-OneNAND SLC area has 64 pages per block.
3809 * Flex-OneNAND MLC area has 128 pages per block.
3810 * Expose MLC erase size to find erase_shift and page_mask.
3811 */
3812 if (FLEXONENAND(this))
3813 mtd->erasesize <<= 1;
3814
3815 this->erase_shift = ffs(mtd->erasesize) - 1;
3816 this->page_shift = ffs(mtd->writesize) - 1;
3817 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
3818 /* Set density mask. it is used for DDP */
3819 if (ONENAND_IS_DDP(this))
3820 this->density_mask = this->chipsize >> (this->erase_shift + 1);
3821 /* It's real page size */
3822 this->writesize = mtd->writesize;
3823
3824 /* REVISIT: Multichip handling */
3825
3826 if (FLEXONENAND(this))
3827 flexonenand_get_size(mtd);
3828 else
3829 mtd->size = this->chipsize;
3830
3831 /* Check OneNAND features */
3832 onenand_check_features(mtd);
3833
3834 /*
3835 * We emulate the 4KiB page and 256KiB erase block size
3836 * But oobsize is still 64 bytes.
3837 * It is only valid if you turn on 2X program support,
3838 * Otherwise it will be ignored by compiler.
3839 */
3840 if (ONENAND_IS_2PLANE(this)) {
3841 mtd->writesize <<= 1;
3842 mtd->erasesize <<= 1;
3843 }
3844
3845 return 0;
3846 }
3847
3848 /**
3849 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3850 * @param mtd MTD device structure
3851 */
3852 static int onenand_suspend(struct mtd_info *mtd)
3853 {
3854 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3855 }
3856
3857 /**
3858 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3859 * @param mtd MTD device structure
3860 */
3861 static void onenand_resume(struct mtd_info *mtd)
3862 {
3863 struct onenand_chip *this = mtd->priv;
3864
3865 if (this->state == FL_PM_SUSPENDED)
3866 onenand_release_device(mtd);
3867 else
3868 printk(KERN_ERR "%s: resume() called for the chip which is not "
3869 "in suspended state\n", __func__);
3870 }
3871
3872 /**
3873 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3874 * @param mtd MTD device structure
3875 * @param maxchips Number of chips to scan for
3876 *
3877 * This fills out all the not initialized function pointers
3878 * with the defaults.
3879 * The flash ID is read and the mtd/chip structures are
3880 * filled with the appropriate values.
3881 */
3882 int onenand_scan(struct mtd_info *mtd, int maxchips)
3883 {
3884 int i, ret;
3885 struct onenand_chip *this = mtd->priv;
3886
3887 if (!this->read_word)
3888 this->read_word = onenand_readw;
3889 if (!this->write_word)
3890 this->write_word = onenand_writew;
3891
3892 if (!this->command)
3893 this->command = onenand_command;
3894 if (!this->wait)
3895 onenand_setup_wait(mtd);
3896 if (!this->bbt_wait)
3897 this->bbt_wait = onenand_bbt_wait;
3898 if (!this->unlock_all)
3899 this->unlock_all = onenand_unlock_all;
3900
3901 if (!this->read_bufferram)
3902 this->read_bufferram = onenand_read_bufferram;
3903 if (!this->write_bufferram)
3904 this->write_bufferram = onenand_write_bufferram;
3905
3906 if (!this->block_markbad)
3907 this->block_markbad = onenand_default_block_markbad;
3908 if (!this->scan_bbt)
3909 this->scan_bbt = onenand_default_bbt;
3910
3911 if (onenand_probe(mtd))
3912 return -ENXIO;
3913
3914 /* Set Sync. Burst Read after probing */
3915 if (this->mmcontrol) {
3916 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3917 this->read_bufferram = onenand_sync_read_bufferram;
3918 }
3919
3920 /* Allocate buffers, if necessary */
3921 if (!this->page_buf) {
3922 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3923 if (!this->page_buf) {
3924 printk(KERN_ERR "%s: Can't allocate page_buf\n",
3925 __func__);
3926 return -ENOMEM;
3927 }
3928 this->options |= ONENAND_PAGEBUF_ALLOC;
3929 }
3930 if (!this->oob_buf) {
3931 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
3932 if (!this->oob_buf) {
3933 printk(KERN_ERR "%s: Can't allocate oob_buf\n",
3934 __func__);
3935 if (this->options & ONENAND_PAGEBUF_ALLOC) {
3936 this->options &= ~ONENAND_PAGEBUF_ALLOC;
3937 kfree(this->page_buf);
3938 }
3939 return -ENOMEM;
3940 }
3941 this->options |= ONENAND_OOBBUF_ALLOC;
3942 }
3943
3944 this->state = FL_READY;
3945 init_waitqueue_head(&this->wq);
3946 spin_lock_init(&this->chip_lock);
3947
3948 /*
3949 * Allow subpage writes up to oobsize.
3950 */
3951 switch (mtd->oobsize) {
3952 case 128:
3953 this->ecclayout = &onenand_oob_128;
3954 mtd->subpage_sft = 0;
3955 break;
3956 case 64:
3957 this->ecclayout = &onenand_oob_64;
3958 mtd->subpage_sft = 2;
3959 break;
3960
3961 case 32:
3962 this->ecclayout = &onenand_oob_32;
3963 mtd->subpage_sft = 1;
3964 break;
3965
3966 default:
3967 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
3968 __func__, mtd->oobsize);
3969 mtd->subpage_sft = 0;
3970 /* To prevent kernel oops */
3971 this->ecclayout = &onenand_oob_32;
3972 break;
3973 }
3974
3975 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
3976
3977 /*
3978 * The number of bytes available for a client to place data into
3979 * the out of band area
3980 */
3981 this->ecclayout->oobavail = 0;
3982 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
3983 this->ecclayout->oobfree[i].length; i++)
3984 this->ecclayout->oobavail +=
3985 this->ecclayout->oobfree[i].length;
3986 mtd->oobavail = this->ecclayout->oobavail;
3987
3988 mtd->ecclayout = this->ecclayout;
3989
3990 /* Fill in remaining MTD driver data */
3991 mtd->type = MTD_NANDFLASH;
3992 mtd->flags = MTD_CAP_NANDFLASH;
3993 mtd->erase = onenand_erase;
3994 mtd->point = NULL;
3995 mtd->unpoint = NULL;
3996 mtd->read = onenand_read;
3997 mtd->write = onenand_write;
3998 mtd->read_oob = onenand_read_oob;
3999 mtd->write_oob = onenand_write_oob;
4000 mtd->panic_write = onenand_panic_write;
4001 #ifdef CONFIG_MTD_ONENAND_OTP
4002 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
4003 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
4004 mtd->get_user_prot_info = onenand_get_user_prot_info;
4005 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
4006 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
4007 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
4008 #endif
4009 mtd->sync = onenand_sync;
4010 mtd->lock = onenand_lock;
4011 mtd->unlock = onenand_unlock;
4012 mtd->suspend = onenand_suspend;
4013 mtd->resume = onenand_resume;
4014 mtd->block_isbad = onenand_block_isbad;
4015 mtd->block_markbad = onenand_block_markbad;
4016 mtd->owner = THIS_MODULE;
4017
4018 /* Unlock whole block */
4019 this->unlock_all(mtd);
4020
4021 ret = this->scan_bbt(mtd);
4022 if ((!FLEXONENAND(this)) || ret)
4023 return ret;
4024
4025 /* Change Flex-OneNAND boundaries if required */
4026 for (i = 0; i < MAX_DIES; i++)
4027 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
4028 flex_bdry[(2 * i) + 1]);
4029
4030 return 0;
4031 }
4032
4033 /**
4034 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
4035 * @param mtd MTD device structure
4036 */
4037 void onenand_release(struct mtd_info *mtd)
4038 {
4039 struct onenand_chip *this = mtd->priv;
4040
4041 #ifdef CONFIG_MTD_PARTITIONS
4042 /* Deregister partitions */
4043 del_mtd_partitions (mtd);
4044 #endif
4045 /* Deregister the device */
4046 del_mtd_device (mtd);
4047
4048 /* Free bad block table memory, if allocated */
4049 if (this->bbm) {
4050 struct bbm_info *bbm = this->bbm;
4051 kfree(bbm->bbt);
4052 kfree(this->bbm);
4053 }
4054 /* Buffers allocated by onenand_scan */
4055 if (this->options & ONENAND_PAGEBUF_ALLOC)
4056 kfree(this->page_buf);
4057 if (this->options & ONENAND_OOBBUF_ALLOC)
4058 kfree(this->oob_buf);
4059 kfree(mtd->eraseregions);
4060 }
4061
4062 EXPORT_SYMBOL_GPL(onenand_scan);
4063 EXPORT_SYMBOL_GPL(onenand_release);
4064
4065 MODULE_LICENSE("GPL");
4066 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4067 MODULE_DESCRIPTION("Generic OneNAND flash driver code");
Linux with added FPC-III support