arch/powerpc/platforms/86xx/gef_sbc610.c

   1 /*
   2  * GE Fanuc SBC610 board support
   3  *
   4  * Author: Martyn Welch <martyn.welch@gefanuc.com>
   5  *
   6  * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
  14  * Copyright 2006 Freescale Semiconductor Inc.
  15  *
  16  * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
  17  */
  18
  19 #include <linux/stddef.h>
  20 #include <linux/kernel.h>
  21 #include <linux/pci.h>
  22 #include <linux/kdev_t.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of_platform.h>
  26
  27 #include <asm/system.h>
  28 #include <asm/time.h>
  29 #include <asm/machdep.h>
  30 #include <asm/pci-bridge.h>
  31 #include <asm/mpc86xx.h>
  32 #include <asm/prom.h>
  33 #include <mm/mmu_decl.h>
  34 #include <asm/udbg.h>
  35
  36 #include <asm/mpic.h>
  37
  38 #include <sysdev/fsl_pci.h>
  39 #include <sysdev/fsl_soc.h>
  40
  41 #include "mpc86xx.h"
  42 #include "gef_pic.h"
  43
  44 #undef DEBUG
  45
  46 #ifdef DEBUG
  47 #define DBG (fmt...) do { printk(KERN_ERR "SBC610: " fmt); } while (0)
  48 #else
  49 #define DBG (fmt...) do { } while (0)
  50 #endif
  51
  52 void __iomem *sbc610_regs;
  53
  54 static void __init gef_sbc610_init_irq(void)
  55 {
  56         struct device_node *cascade_node = NULL;
  57
  58         mpc86xx_init_irq();
  59
  60         /*
  61          * There is a simple interrupt handler in the main FPGA, this needs
  62          * to be cascaded into the MPIC
  63          */
  64         cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
  65         if (!cascade_node) {
  66                 printk(KERN_WARNING "SBC610: No FPGA PIC\n");
  67                 return;
  68         }
  69
  70         gef_pic_init(cascade_node);
  71         of_node_put(cascade_node);
  72 }
  73
  74 static void __init gef_sbc610_setup_arch(void)
  75 {
  76         struct device_node *regs;
  77 #ifdef CONFIG_PCI
  78         struct device_node *np;
  79
  80         for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
  81                 fsl_add_bridge(np, 1);
  82         }
  83 #endif
  84
  85         printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n");
  86
  87 #ifdef CONFIG_SMP
  88         mpc86xx_smp_init();
  89 #endif
  90
  91         /* Remap basic board registers */
  92         regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
  93         if (regs) {
  94                 sbc610_regs = of_iomap(regs, 0);
  95                 if (sbc610_regs == NULL)
  96                         printk(KERN_WARNING "Unable to map board registers\n");
  97                 of_node_put(regs);
  98         }
  99 }
 100
 101 /* Return the PCB revision */
 102 static unsigned int gef_sbc610_get_pcb_rev(void)
 103 {
 104         unsigned int reg;
 105
 106         reg = ioread32(sbc610_regs);
 107         return (reg >> 8) & 0xff;
 108 }
 109
 110 /* Return the board (software) revision */
 111 static unsigned int gef_sbc610_get_board_rev(void)
 112 {
 113         unsigned int reg;
 114
 115         reg = ioread32(sbc610_regs);
 116         return (reg >> 16) & 0xff;
 117 }
 118
 119 /* Return the FPGA revision */
 120 static unsigned int gef_sbc610_get_fpga_rev(void)
 121 {
 122         unsigned int reg;
 123
 124         reg = ioread32(sbc610_regs);
 125         return (reg >> 24) & 0xf;
 126 }
 127
 128 static void gef_sbc610_show_cpuinfo(struct seq_file *m)
 129 {
 130         uint svid = mfspr(SPRN_SVR);
 131
 132         seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
 133
 134         seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
 135                 ('A' + gef_sbc610_get_board_rev() - 1));
 136         seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
 137
 138         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 139 }
 140
 141 static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev)
 142 {
 143         unsigned int val;
 144
 145         printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
 146
 147         /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
 148         pci_read_config_dword(pdev, 0xe0, &val);
 149         pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
 150
 151         /* System clock is 48-MHz Oscillator and EHCI Enabled. */
 152         pci_write_config_dword(pdev, 0xe4, 1 << 5);
 153 }
 154 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
 155         gef_sbc610_nec_fixup);
 156
 157 /*
 158  * Called very early, device-tree isn't unflattened
 159  *
 160  * This function is called to determine whether the BSP is compatible with the
 161  * supplied device-tree, which is assumed to be the correct one for the actual
 162  * board. It is expected thati, in the future, a kernel may support multiple
 163  * boards.
 164  */
 165 static int __init gef_sbc610_probe(void)
 166 {
 167         unsigned long root = of_get_flat_dt_root();
 168
 169         if (of_flat_dt_is_compatible(root, "gef,sbc610"))
 170                 return 1;
 171
 172         return 0;
 173 }
 174
 175 static long __init mpc86xx_time_init(void)
 176 {
 177         unsigned int temp;
 178
 179         /* Set the time base to zero */
 180         mtspr(SPRN_TBWL, 0);
 181         mtspr(SPRN_TBWU, 0);
 182
 183         temp = mfspr(SPRN_HID0);
 184         temp |= HID0_TBEN;
 185         mtspr(SPRN_HID0, temp);
 186         asm volatile("isync");
 187
 188         return 0;
 189 }
 190
 191 static __initdata struct of_device_id of_bus_ids[] = {
 192         { .compatible = "simple-bus", },
 193         {},
 194 };
 195
 196 static int __init declare_of_platform_devices(void)
 197 {
 198         printk(KERN_DEBUG "Probe platform devices\n");
 199         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 200
 201         return 0;
 202 }
 203 machine_device_initcall(gef_sbc610, declare_of_platform_devices);
 204
 205 define_machine(gef_sbc610) {
 206         .name                   = "GE Fanuc SBC610",
 207         .probe                  = gef_sbc610_probe,
 208         .setup_arch             = gef_sbc610_setup_arch,
 209         .init_IRQ               = gef_sbc610_init_irq,
 210         .show_cpuinfo           = gef_sbc610_show_cpuinfo,
 211         .get_irq                = mpic_get_irq,
 212         .restart                = fsl_rstcr_restart,
 213         .time_init              = mpc86xx_time_init,
 214         .calibrate_decr         = generic_calibrate_decr,
 215         .progress               = udbg_progress,
 216 #ifdef CONFIG_PCI
 217         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 218 #endif
 219 };