drivers/net/sfc/tenxpress.c

   1 /****************************************************************************
   2  * Driver for Solarflare 802.3an compliant PHY
   3  * Copyright 2007 Solarflare Communications Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published
   7  * by the Free Software Foundation, incorporated herein by reference.
   8  */
   9
  10 #include <linux/delay.h>
  11 #include <linux/seq_file.h>
  12 #include "efx.h"
  13 #include "gmii.h"
  14 #include "mdio_10g.h"
  15 #include "falcon.h"
  16 #include "phy.h"
  17 #include "falcon_hwdefs.h"
  18 #include "boards.h"
  19 #include "mac.h"
  20
  21 /* We expect these MMDs to be in the package */
  22 /* AN not here as mdio_check_mmds() requires STAT2 support */
  23 #define TENXPRESS_REQUIRED_DEVS (MDIO_MMDREG_DEVS0_PMAPMD | \
  24                                  MDIO_MMDREG_DEVS0_PCS    | \
  25                                  MDIO_MMDREG_DEVS0_PHYXS)
  26
  27 #define TENXPRESS_LOOPBACKS ((1 << LOOPBACK_PHYXS) |    \
  28                              (1 << LOOPBACK_PCS) |      \
  29                              (1 << LOOPBACK_PMAPMD) |   \
  30                              (1 << LOOPBACK_NETWORK))
  31
  32 /* We complain if we fail to see the link partner as 10G capable this many
  33  * times in a row (must be > 1 as sampling the autoneg. registers is racy)
  34  */
  35 #define MAX_BAD_LP_TRIES        (5)
  36
  37 /* Extended control register */
  38 #define PMA_PMD_XCONTROL_REG 0xc000
  39 #define PMA_PMD_LNPGA_POWERDOWN_LBN 8
  40 #define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1
  41
  42 /* extended status register */
  43 #define PMA_PMD_XSTATUS_REG 0xc001
  44 #define PMA_PMD_XSTAT_FLP_LBN   (12)
  45
  46 /* LED control register */
  47 #define PMA_PMD_LED_CTRL_REG    (0xc007)
  48 #define PMA_PMA_LED_ACTIVITY_LBN        (3)
  49
  50 /* LED function override register */
  51 #define PMA_PMD_LED_OVERR_REG   (0xc009)
  52 /* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
  53 #define PMA_PMD_LED_LINK_LBN    (0)
  54 #define PMA_PMD_LED_SPEED_LBN   (2)
  55 #define PMA_PMD_LED_TX_LBN      (4)
  56 #define PMA_PMD_LED_RX_LBN      (6)
  57 /* Override settings */
  58 #define PMA_PMD_LED_AUTO        (0)     /* H/W control */
  59 #define PMA_PMD_LED_ON          (1)
  60 #define PMA_PMD_LED_OFF         (2)
  61 #define PMA_PMD_LED_FLASH       (3)
  62 /* All LEDs under hardware control */
  63 #define PMA_PMD_LED_FULL_AUTO   (0)
  64 /* Green and Amber under hardware control, Red off */
  65 #define PMA_PMD_LED_DEFAULT     (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
  66
  67
  68 /* Special Software reset register */
  69 #define PMA_PMD_EXT_CTRL_REG 49152
  70 #define PMA_PMD_EXT_SSR_LBN 15
  71
  72 /* Misc register defines */
  73 #define PCS_CLOCK_CTRL_REG 0xd801
  74 #define PLL312_RST_N_LBN 2
  75
  76 #define PCS_SOFT_RST2_REG 0xd806
  77 #define SERDES_RST_N_LBN 13
  78 #define XGXS_RST_N_LBN 12
  79
  80 #define PCS_TEST_SELECT_REG 0xd807      /* PRM 10.5.8 */
  81 #define CLK312_EN_LBN 3
  82
  83 /* PHYXS registers */
  84 #define PHYXS_TEST1         (49162)
  85 #define LOOPBACK_NEAR_LBN   (8)
  86 #define LOOPBACK_NEAR_WIDTH (1)
  87
  88 /* Boot status register */
  89 #define PCS_BOOT_STATUS_REG     (0xd000)
  90 #define PCS_BOOT_FATAL_ERR_LBN  (0)
  91 #define PCS_BOOT_PROGRESS_LBN   (1)
  92 #define PCS_BOOT_PROGRESS_WIDTH (2)
  93 #define PCS_BOOT_COMPLETE_LBN   (3)
  94 #define PCS_BOOT_MAX_DELAY      (100)
  95 #define PCS_BOOT_POLL_DELAY     (10)
  96
  97 /* Time to wait between powering down the LNPGA and turning off the power
  98  * rails */
  99 #define LNPGA_PDOWN_WAIT        (HZ / 5)
 100
 101 static int crc_error_reset_threshold = 100;
 102 module_param(crc_error_reset_threshold, int, 0644);
 103 MODULE_PARM_DESC(crc_error_reset_threshold,
 104                  "Max number of CRC errors before XAUI reset");
 105
 106 struct tenxpress_phy_data {
 107         enum efx_loopback_mode loopback_mode;
 108         atomic_t bad_crc_count;
 109         enum efx_phy_mode phy_mode;
 110         int bad_lp_tries;
 111 };
 112
 113 void tenxpress_crc_err(struct efx_nic *efx)
 114 {
 115         struct tenxpress_phy_data *phy_data = efx->phy_data;
 116         if (phy_data != NULL)
 117                 atomic_inc(&phy_data->bad_crc_count);
 118 }
 119
 120 /* Check that the C166 has booted successfully */
 121 static int tenxpress_phy_check(struct efx_nic *efx)
 122 {
 123         int phy_id = efx->mii.phy_id;
 124         int count = PCS_BOOT_MAX_DELAY / PCS_BOOT_POLL_DELAY;
 125         int boot_stat;
 126
 127         /* Wait for the boot to complete (or not) */
 128         while (count) {
 129                 boot_stat = mdio_clause45_read(efx, phy_id,
 130                                                MDIO_MMD_PCS,
 131                                                PCS_BOOT_STATUS_REG);
 132                 if (boot_stat & (1 << PCS_BOOT_COMPLETE_LBN))
 133                         break;
 134                 count--;
 135                 udelay(PCS_BOOT_POLL_DELAY);
 136         }
 137
 138         if (!count) {
 139                 EFX_ERR(efx, "%s: PHY boot timed out. Last status "
 140                         "%x\n", __func__,
 141                         (boot_stat >> PCS_BOOT_PROGRESS_LBN) &
 142                         ((1 << PCS_BOOT_PROGRESS_WIDTH) - 1));
 143                 return -ETIMEDOUT;
 144         }
 145
 146         return 0;
 147 }
 148
 149 static int tenxpress_init(struct efx_nic *efx)
 150 {
 151         int rc, reg;
 152
 153         /* Turn on the clock  */
 154         reg = (1 << CLK312_EN_LBN);
 155         mdio_clause45_write(efx, efx->mii.phy_id,
 156                             MDIO_MMD_PCS, PCS_TEST_SELECT_REG, reg);
 157
 158         rc = tenxpress_phy_check(efx);
 159         if (rc < 0)
 160                 return rc;
 161
 162         /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
 163         reg = mdio_clause45_read(efx, efx->mii.phy_id,
 164                                  MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG);
 165         reg |= (1 << PMA_PMA_LED_ACTIVITY_LBN);
 166         mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
 167                             PMA_PMD_LED_CTRL_REG, reg);
 168
 169         reg = PMA_PMD_LED_DEFAULT;
 170         mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
 171                             PMA_PMD_LED_OVERR_REG, reg);
 172
 173         return rc;
 174 }
 175
 176 static int tenxpress_phy_init(struct efx_nic *efx)
 177 {
 178         struct tenxpress_phy_data *phy_data;
 179         int rc = 0;
 180
 181         phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
 182         if (!phy_data)
 183                 return -ENOMEM;
 184         efx->phy_data = phy_data;
 185         phy_data->phy_mode = efx->phy_mode;
 186
 187         rc = mdio_clause45_wait_reset_mmds(efx,
 188                                            TENXPRESS_REQUIRED_DEVS);
 189         if (rc < 0)
 190                 goto fail;
 191
 192         rc = mdio_clause45_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
 193         if (rc < 0)
 194                 goto fail;
 195
 196         rc = tenxpress_init(efx);
 197         if (rc < 0)
 198                 goto fail;
 199
 200         schedule_timeout_uninterruptible(HZ / 5); /* 200ms */
 201
 202         /* Let XGXS and SerDes out of reset and resets 10XPress */
 203         falcon_reset_xaui(efx);
 204
 205         return 0;
 206
 207  fail:
 208         kfree(efx->phy_data);
 209         efx->phy_data = NULL;
 210         return rc;
 211 }
 212
 213 static int tenxpress_special_reset(struct efx_nic *efx)
 214 {
 215         int rc, reg;
 216
 217         /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
 218          * a special software reset can glitch the XGMAC sufficiently for stats
 219          * requests to fail. Since we don't ofen special_reset, just lock. */
 220         spin_lock(&efx->stats_lock);
 221
 222         /* Initiate reset */
 223         reg = mdio_clause45_read(efx, efx->mii.phy_id,
 224                                  MDIO_MMD_PMAPMD, PMA_PMD_EXT_CTRL_REG);
 225         reg |= (1 << PMA_PMD_EXT_SSR_LBN);
 226         mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
 227                             PMA_PMD_EXT_CTRL_REG, reg);
 228
 229         mdelay(200);
 230
 231         /* Wait for the blocks to come out of reset */
 232         rc = mdio_clause45_wait_reset_mmds(efx,
 233                                            TENXPRESS_REQUIRED_DEVS);
 234         if (rc < 0)
 235                 goto unlock;
 236
 237         /* Try and reconfigure the device */
 238         rc = tenxpress_init(efx);
 239         if (rc < 0)
 240                 goto unlock;
 241
 242 unlock:
 243         spin_unlock(&efx->stats_lock);
 244         return rc;
 245 }
 246
 247 static void tenxpress_set_bad_lp(struct efx_nic *efx, bool bad_lp)
 248 {
 249         struct tenxpress_phy_data *pd = efx->phy_data;
 250         int reg;
 251
 252         /* Nothing to do if all is well and was previously so. */
 253         if (!(bad_lp || pd->bad_lp_tries))
 254                 return;
 255
 256         reg = mdio_clause45_read(efx, efx->mii.phy_id,
 257                                  MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG);
 258
 259         if (bad_lp)
 260                 pd->bad_lp_tries++;
 261         else
 262                 pd->bad_lp_tries = 0;
 263
 264         if (pd->bad_lp_tries == MAX_BAD_LP_TRIES) {
 265                 pd->bad_lp_tries = 0;   /* Restart count */
 266                 reg &= ~(PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN);
 267                 reg |= (PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN);
 268                 EFX_ERR(efx, "This NIC appears to be plugged into"
 269                         " a port that is not 10GBASE-T capable.\n"
 270                         " This PHY is 10GBASE-T ONLY, so no link can"
 271                         " be established.\n");
 272         } else {
 273                 reg |= (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN);
 274         }
 275         mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
 276                             PMA_PMD_LED_OVERR_REG, reg);
 277 }
 278
 279 /* Check link status and return a boolean OK value. If the link is NOT
 280  * OK we have a quick rummage round to see if we appear to be plugged
 281  * into a non-10GBT port and if so warn the user that they won't get
 282  * link any time soon as we are 10GBT only, unless caller specified
 283  * not to do this check (it isn't useful in loopback) */
 284 static bool tenxpress_link_ok(struct efx_nic *efx, bool check_lp)
 285 {
 286         bool ok = mdio_clause45_links_ok(efx, TENXPRESS_REQUIRED_DEVS);
 287
 288         if (ok) {
 289                 tenxpress_set_bad_lp(efx, false);
 290         } else if (check_lp) {
 291                 /* Are we plugged into the wrong sort of link? */
 292                 bool bad_lp = false;
 293                 int phy_id = efx->mii.phy_id;
 294                 int an_stat = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
 295                                                  MDIO_AN_STATUS);
 296                 int xphy_stat = mdio_clause45_read(efx, phy_id,
 297                                                    MDIO_MMD_PMAPMD,
 298                                                    PMA_PMD_XSTATUS_REG);
 299                 /* Are we plugged into anything that sends FLPs? If
 300                  * not we can't distinguish between not being plugged
 301                  * in and being plugged into a non-AN antique. The FLP
 302                  * bit has the advantage of not clearing when autoneg
 303                  * restarts. */
 304                 if (!(xphy_stat & (1 << PMA_PMD_XSTAT_FLP_LBN))) {
 305                         tenxpress_set_bad_lp(efx, false);
 306                         return ok;
 307                 }
 308
 309                 /* If it can do 10GBT it must be XNP capable */
 310                 bad_lp = !(an_stat & (1 << MDIO_AN_STATUS_XNP_LBN));
 311                 if (!bad_lp && (an_stat & (1 << MDIO_AN_STATUS_PAGE_LBN))) {
 312                         bad_lp = !(mdio_clause45_read(efx, phy_id,
 313                                         MDIO_MMD_AN, MDIO_AN_10GBT_STATUS) &
 314                                         (1 << MDIO_AN_10GBT_STATUS_LP_10G_LBN));
 315                 }
 316                 tenxpress_set_bad_lp(efx, bad_lp);
 317         }
 318         return ok;
 319 }
 320
 321 static void tenxpress_phyxs_loopback(struct efx_nic *efx)
 322 {
 323         int phy_id = efx->mii.phy_id;
 324         int ctrl1, ctrl2;
 325
 326         ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
 327                                            PHYXS_TEST1);
 328         if (efx->loopback_mode == LOOPBACK_PHYXS)
 329                 ctrl2 |= (1 << LOOPBACK_NEAR_LBN);
 330         else
 331                 ctrl2 &= ~(1 << LOOPBACK_NEAR_LBN);
 332         if (ctrl1 != ctrl2)
 333                 mdio_clause45_write(efx, phy_id, MDIO_MMD_PHYXS,
 334                                     PHYXS_TEST1, ctrl2);
 335 }
 336
 337 static void tenxpress_phy_reconfigure(struct efx_nic *efx)
 338 {
 339         struct tenxpress_phy_data *phy_data = efx->phy_data;
 340         bool loop_change = LOOPBACK_OUT_OF(phy_data, efx,
 341                                            TENXPRESS_LOOPBACKS);
 342
 343         if (efx->phy_mode & PHY_MODE_SPECIAL) {
 344                 phy_data->phy_mode = efx->phy_mode;
 345                 return;
 346         }
 347
 348         /* When coming out of transmit disable, coming out of low power
 349          * mode, or moving out of any PHY internal loopback mode,
 350          * perform a special software reset */
 351         if ((efx->phy_mode == PHY_MODE_NORMAL &&
 352              phy_data->phy_mode != PHY_MODE_NORMAL) ||
 353             loop_change) {
 354                 tenxpress_special_reset(efx);
 355                 falcon_reset_xaui(efx);
 356         }
 357
 358         mdio_clause45_transmit_disable(efx);
 359         mdio_clause45_phy_reconfigure(efx);
 360         tenxpress_phyxs_loopback(efx);
 361
 362         phy_data->loopback_mode = efx->loopback_mode;
 363         phy_data->phy_mode = efx->phy_mode;
 364         efx->link_up = tenxpress_link_ok(efx, false);
 365         efx->link_options = GM_LPA_10000FULL;
 366 }
 367
 368 static void tenxpress_phy_clear_interrupt(struct efx_nic *efx)
 369 {
 370         /* Nothing done here - LASI interrupts aren't reliable so poll  */
 371 }
 372
 373
 374 /* Poll PHY for interrupt */
 375 static int tenxpress_phy_check_hw(struct efx_nic *efx)
 376 {
 377         struct tenxpress_phy_data *phy_data = efx->phy_data;
 378         bool link_ok;
 379         int rc = 0;
 380
 381         link_ok = tenxpress_link_ok(efx, true);
 382
 383         if (link_ok != efx->link_up)
 384                 falcon_xmac_sim_phy_event(efx);
 385
 386         if (phy_data->phy_mode != PHY_MODE_NORMAL)
 387                 return 0;
 388
 389         if (atomic_read(&phy_data->bad_crc_count) > crc_error_reset_threshold) {
 390                 EFX_ERR(efx, "Resetting XAUI due to too many CRC errors\n");
 391                 falcon_reset_xaui(efx);
 392                 atomic_set(&phy_data->bad_crc_count, 0);
 393         }
 394
 395         rc = efx->board_info.monitor(efx);
 396         if (rc) {
 397                 EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
 398                         (rc == -ERANGE) ? "reported fault" : "failed");
 399                 if (efx->phy_mode & PHY_MODE_OFF) {
 400                         /* Assume that board has shut PHY off */
 401                         phy_data->phy_mode = PHY_MODE_OFF;
 402                 } else {
 403                         efx->phy_mode |= PHY_MODE_LOW_POWER;
 404                         mdio_clause45_set_mmds_lpower(efx, true,
 405                                                       efx->phy_op->mmds);
 406                         phy_data->phy_mode |= PHY_MODE_LOW_POWER;
 407                 }
 408         }
 409
 410         return rc;
 411 }
 412
 413 static void tenxpress_phy_fini(struct efx_nic *efx)
 414 {
 415         int reg;
 416
 417         /* Power down the LNPGA */
 418         reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
 419         mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
 420                             PMA_PMD_XCONTROL_REG, reg);
 421
 422         /* Waiting here ensures that the board fini, which can turn off the
 423          * power to the PHY, won't get run until the LNPGA powerdown has been
 424          * given long enough to complete. */
 425         schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
 426
 427         kfree(efx->phy_data);
 428         efx->phy_data = NULL;
 429 }
 430
 431
 432 /* Set the RX and TX LEDs and Link LED flashing. The other LEDs
 433  * (which probably aren't wired anyway) are left in AUTO mode */
 434 void tenxpress_phy_blink(struct efx_nic *efx, bool blink)
 435 {
 436         int reg;
 437
 438         if (blink)
 439                 reg = (PMA_PMD_LED_FLASH << PMA_PMD_LED_TX_LBN) |
 440                         (PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN) |
 441                         (PMA_PMD_LED_FLASH << PMA_PMD_LED_LINK_LBN);
 442         else
 443                 reg = PMA_PMD_LED_DEFAULT;
 444
 445         mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
 446                             PMA_PMD_LED_OVERR_REG, reg);
 447 }
 448
 449 static int tenxpress_phy_test(struct efx_nic *efx)
 450 {
 451         /* BIST is automatically run after a special software reset */
 452         return tenxpress_special_reset(efx);
 453 }
 454
 455 struct efx_phy_operations falcon_tenxpress_phy_ops = {
 456         .init             = tenxpress_phy_init,
 457         .reconfigure      = tenxpress_phy_reconfigure,
 458         .check_hw         = tenxpress_phy_check_hw,
 459         .fini             = tenxpress_phy_fini,
 460         .clear_interrupt  = tenxpress_phy_clear_interrupt,
 461         .test             = tenxpress_phy_test,
 462         .mmds             = TENXPRESS_REQUIRED_DEVS,
 463         .loopbacks        = TENXPRESS_LOOPBACKS,
 464 };