1 #ifndef _UAPI_ASM_SCORE_PTRACE_H
2 #define _UAPI_ASM_SCORE_PTRACE_H
4 #define PTRACE_GETREGS 12
5 #define PTRACE_SETREGS 13
7 #define SINGLESTEP16_INSN 0x7006
8 #define SINGLESTEP32_INSN 0x840C8000
9 #define BREAKPOINT16_INSN 0x7002 /* work on SPG300 */
10 #define BREAKPOINT32_INSN 0x84048000 /* work on SPG300 */
12 /* Define instruction mask */
13 #define INSN32_MASK 0x80008000
15 #define J32 0x88008000 /* 1_00010_0000000000_1_000000000000000 */
16 #define J32M 0xFC008000 /* 1_11111_0000000000_1_000000000000000 */
18 #define B32 0x90008000 /* 1_00100_0000000000_1_000000000000000 */
19 #define B32M 0xFC008000
20 #define BL32 0x90008001 /* 1_00100_0000000000_1_000000000000001 */
22 #define BR32 0x80008008 /* 1_00000_0000000000_1_00000000_000100_0 */
23 #define BR32M 0xFFE0807E
24 #define BRL32 0x80008009 /* 1_00000_0000000000_1_00000000_000100_1 */
27 #define B32_SET (J32 | B32 | BL32 | BR32 | BRL32)
29 #define J16 0x3000 /* 0_011_....... */
31 #define B16 0x4000 /* 0_100_....... */
33 #define BR16 0x0004 /* 0_000.......0100 */
35 #define B16_SET (J16 | B16 | BR16)
39 * This struct defines the way the registers are stored on the stack during a
40 * system call/exception. As usual the registers k0/k1 aren't being saved.
43 unsigned long pad0
[6]; /* stack arguments */
44 unsigned long orig_r4
;
45 unsigned long orig_r7
;
48 unsigned long regs
[32];
53 unsigned long sr0
; /* cnt */
54 unsigned long sr1
; /* lcr */
55 unsigned long sr2
; /* scr */
57 unsigned long cp0_epc
;
58 unsigned long cp0_ema
;
59 unsigned long cp0_psr
;
60 unsigned long cp0_ecr
;
61 unsigned long cp0_condition
;
65 #endif /* _UAPI_ASM_SCORE_PTRACE_H */